Abstract: A composite material suitable for labeling a substrate. The composite material, which is preferably a ceramic composite, comprises a fired ceramic body and a layer thereon. The fired ceramic body includes a base layer that comprising a glassy phase and a refractory phase, the glassy phase being capable of wetting a substrate at an application temperature. There is sufficient color contrast between the top layer and the fired ceramic body such that a code pattern (e.g., a bar code) present (or formed) is optically discernible. Methods of making and using the same are also taught.

Abstract: A semiconductor wafer has a front side 1, a back side 2, a top layer 3, a bottom layer 4, an upper inner layer 5 lying below the top layer 3, a lower inner layer 6 lying above the bottom layer 4, a central region 7 between the layers 5 and 6 an uneven distribution of crystal lattice defects. The concentration of the defects exhibits a first maximum (max1) in the central region 7 and a second maximum (max2) in the bottom layer 4.

Abstract: A photocatalyst article exhibits high photocatalytic activity even in environments illuminated by weak ultraviolet light or visible light, expresses excellent anti-fogging and anti-soiling properties, and retains good anti-fogging and anti-soiling performance over long periods and therefore has a high utilization value as an anti-fogging, anti-soiling article. The photocatalyst article contains an oxide semiconductor and a compound which contains at least one type of element selected from the group comprised of Mg, Sc, V, Cr, Mn, Y, Nb, Mo, Ru, W, and Re, at a content such that the ratio (A/B) of the number of metal atoms of the abovementioned element (A) to the number of atoms of metal that comprise the abovementioned oxide semiconductor (B) will be about 0.20 to 2.

Abstract: A novel process for creating aesthetically pleasing multicolor designs and patterns in cast materials, particularly cementitious materials, which may be used to imitate natural stone in appearance. The process includes the steps of preparing multiple colors of the casting material, geometrically loading these colors in a three dimensional array in a holding container according to formulas corresponding to particular patterns to be created, placing the geometrically loaded colors into a mold by means which include pouring, extruding and spraying, consolidating the mixtures in the mold and allowing them to set, and removing the cast structure from the mold followed by polishing and sealing if required. A removable matrix in the holding container provides the ability to reliably repeat patterns according to the loading formulas.

Abstract: An optically coated article comprising a polymeric substrate, such as aromatic polycarbonate, and a plurality of optical coating layers comprising alternate layers of silicon dioxide and amorphous hydrogenated silicon or variations thereof, produced by plasma enhanced chemical vapor deposition. The article is characterized by essentially constant optical characteristics over a wide temperature range.

Abstract: High-frequency ceramics containing SiO2, Al2O3, MgO, ZnO and B2O3 as constituent components, said ceramics comprising: 30 to 50% by weight of a crystal phase containing ZnO and Al2O3; 5 to 15% by weight of a crystal phase containing SiO2 and MgO; and 40 to 60% by weight of an amorphous phase comprising substantially SiO2 or SiO2 and B2O3; wherein the content of the SiO2 crystal phase is suppressed to be not larger than 6% by weight. The ceramics has a dielectric loss at 60 GHz of not larger than 15×10−4, exhibiting excellent high-frequency characteristics, and is very useful as an insulating substrate for the wiring boards that deal with high-frequency signals.

Abstract: A barrier film for a semiconductor device structure. The barrier film includes a compound including nitrogen and at least one of titanium or tantalum, nitrogen in a concentration that varies within the barrier film, and oxygen in a concentration that varies within the barrier film.

Abstract: In a mounting structure including a first electrode and a second electrode electrically connected to each other via a conductive adhesive, the periphery of an adhesion portion between at least one of the electrodes and the conductive adhesive is covered with an electrical insulating layer, whereby the adhesion portion is reinforced from the periphery. The electrical insulating layer may be formed by dissolving a binder resin component of the conductive adhesive in a solvent. This increases the concentration of a conductive filler in the conductive adhesive, so that the conductivity of the adhesion portion is also enhanced.

Abstract: A laminated structure which has a substrate formed of a synthetic resin or glass and a silicon carbide coating layer formed by sputtering, wherein the light transmittance of the silicon carbide coating layer is 80% or less. Preferably, the silicon carbide coating layer has a light reflectance of 10 to 50%, the synthetic resin is polycarbonate, the impurity ratio on the surface of the silicon carbide coating layer is 1.0×1012 atoms/cm2 or less, and the silicon carbide layer has a thickness of 15 to 100 nm. The laminated structure is suitable for a recording medium such as a CD-ROM and a DVD-ROM since it has a silicon carbide layer excellent in oxidation resistance, chlorine resistance, moisture resistance, and the like.

Abstract: A hybrid silicon-on-silicon substrate. A thin film (2101) of single-crystal silicon is bonded to a target wafer (46). A high-quality bond is formed between the thin film and the target wafer during a high-temperature annealing process. It is believed that the high-temperature annealing process forms covalent bonds between the layers at the interface (2305). The resulting hybrid wafer is suitable for use in integrated circuit manufacturing processes, similar to wafers with an epitaxial layer.

Abstract: This invention relates to a corrosion-resistant member comprising a ceramic substrate and a silicon carbide film formed through a chemical vapor deposition process and having a resistivity at room temperature of 20-500 &OHgr;·cm, and a method of manufacturing the same as well as an heating apparatus using the same.

Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process including growing a single crystal silicon ingot from molten silicon, and as part of the growth process, controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.

Abstract: A barrier layer can be provided over a photoresist film to prevent outgassing. The barrier layer can be relatively highly transmissive to radiation at the actinic wavelength. The barrier layer can be removed before the photoresist layer is developed.

Abstract: A thermally conductive substrate having a structure in which inorganic filler for improving the thermal conductivity and thermosetting resin composition are included. The thermosetting resin composition has a flexibility in the not-hardened state, and becomes rigid after hardening. The thermally conductive substrate has excellent thermal radiation characteristics. The method of manufacturing the thermally conductive substrate includes: piling up (a) the thermally conductive sheets comprising 70 to 95 weight parts of an inorganic filler, and 4.

Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.

Abstract: A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to an oxygen precipitation heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less. A silicon wafer produced as described above shows little decrease in resistivity even after a heat treatment in device production etc. Further, if a silicon wafer is produced and heat-treated so that the wafer should have the above-defined initial interstitial oxygen concentration and residual interstitial oxygen concentration, slip dislocations in a subsequent heat treatment process are prevented irrespective of resistivity.

Abstract: An electrical contact for a silicon carbide component comprises a material that is in thermodynamic equilibrium with silicon carbide. The electrical contact is typically formed of Ti3SiC2 that is deposited on the silicon carbide component.

Abstract: A B-doped Si1−x−yGexCy layer 102 (where 0<x<1, 0.01≦y<1) is epitaxially grown on a Si substrate 101 using a UHV-CVD process. In the meantime, in-situ doping is performed using B2H6 as a source gas of boron (B) which is an impurity (dopant). Next, the Si1−x−yGexCy layer 102 is annealed to form a B-doped Si1−x−yGexCy crystalline layer 103. In this case, the annealing temperature is set preferably at between 700° C. and 1200° C., both inclusive, and more preferably at between 900° C. and 1000° C., both inclusive.

Abstract: An apparatus in accordance with this invention includes an alignment mark that is formed in a substrate. The alignment mark extends across a dice line so that, upon dicing the substrate, the mark is exposed in the substrate's side edge. The mark is formed at a predetermined distance from a position at which a feature is desired to be formed on the substrate's side edge using a mask. Accordingly, the mark is a positional reference that can be used for highly accurate placement of the feature on the side surface of the substrate with the mask. Preferably, the mark is formed of metal or other material enhanced to a size that is readily detectable by an alignment system with which the mark is to be used. The invention also includes methods for making the alignment mark.

Abstract: A method for metallizing integrated circuits is disclosed. In one aspect, an integrated circuit is metallized by depositing liner material on a substrate followed by one or more metal layers. The liner material is selected from the group of tantalum (Ta), tantalum nitride (TaN), niobium (Nb), niobium nitride (NbN), vanadium (V), vanadium nitride (VN), and combinations thereof. The liner material is preferably conformably deposited on the substrate using physical vapor deposition (PVD). The one or more metal layers are deposited on the barrier layer using chemical vapor deposition (CVD), physical vapor deposition (PVD), or a combination of both CVD and PVD.