Abstract: A transmitter includes a combiner for combining plural data signal sets into a single set of data signals. An I/Q modulator modulates the single sets of data signals onto for example an intermediate frequency (IF) carrier signal. A frequency upconverter converts the frequency of the IF signal to a radio frequency signal which, when amplified in a power amplifier, is transmitted via antenna. Using the present invention, plural sets of quadrature modulated signals separated in frequency are transmitted on a single RF carrier rather than on two carriers.

Abstract: The invention provides a variable bit rate discrimination method and apparatus wherein a transmission bit rate of data received by a mobile station in a mobile communication which employs a spectrum spreading method can be discriminated readily to realize reduction in time required for decoding processing and miniaturization in circuit scale. A variable bit rate including four different transmission bit rates is used as a transmission rate of a traffic channel from a base station to a mobile station, and transmission data are encoded using convolutional encoder for error correction and transmitted. In the mobile station, received data are decoded for the four individual transmission bit rates using Viterbi decoders to obtain path metric values which are sum totals of errors of the received data. Then, one of the transmission bit rates which exhibits a lowest one of the path metric values is selected as a bit rate used for transmission of the transmission data.

Abstract: A system for determining whether information broadcast by a general transmitter is relevant to a particular user based on the location, velocity and/or time of an object of interest includes a remote terminal, a general broadcasting unit, a transmitter at the general broadcasting unit for broadcasting messages including a segment comprising a region, a velocity and/or a time corresponding to an event, as well as an event specific tag, and storage for storing selection criteria including current position, time and/or velocity information of the user and/or manually entered data of interest. The selection criteria may also include event specific tags. The receiver at the remote terminal receives the messages from the transmitter at the general broadcasting unit. A navigational receiver may also be used to acquire navigational information from an appropriate external source.

Abstract: Digital HDTV signals are exemplary of vestigial sideband (VSB) signals, which signals include a pilot carrier and sidebands generated in response to symbol codes descriptive of digital signals. A radio receiver for such VSB signals includes automatic gain control (AGC) circuitry that generates AGC signal by synchronously detecting the pilot carrier.

Abstract: In a modem, after scrambling data which are time-divided into main data and secondary data, a 2 W-4 W conversion circuit sends the data to the two-wire line. An estimated echo component is subtracted from a signal which is available from the 2 W-4 W conversion circuit. Following this, the signal from the 2 W-4 W conversion circuit is demodulated, descrambled and separated into main data and secondary data. A generator polynomial for scrambling is different from a generator polynomial for descrambling. The modem comprises a line-trouble-detect part which samples data of the secondary channel, by multipoint sampling, to obtain the secondary data and detects the number of inversion points in the descrambled secondary channel data per unit time period. The line-trouble-detect part outputs a line-trouble signal which indicates that there is a trouble on the line if the number of detected inversion points is more than a predetermined number.

Abstract: A peak and valley detection system and method are shown for a selective call receiving device (10). The peak and valley detection system quickly and accurately detects and tracks to the peak and valley of a two level and/or four-level signal. A signal value representing a received signal is compared by a CPU (28) to the sum of a peak variable and attack constant. The peak variable is updated to a first value if the received signal value is less than the sum and is updated to a second value if the received signal value is not less than the sum. Similarly, the received signal is compared by the CPU (28) to a difference between a valley variable and attack constant. The valley variable is updated to a third value if the received signal value is greater than the difference value and updated to a fourth value if the received signal value is not greater than the difference value. The peak and valley variables attack and decay at non-constant rates and independently of one another.

Abstract: An apparatus and method for transmission of data. A four bit data word is converted into an eight bit code word having a run-length of (0,1) which includes four binary ones and four binary zeros is defined where the start and end bits comprise a 01 or 10 pair to ensure the (1,0) run-length across word boundaries. A hashing code is used to generate the code words and decode received code words.

Abstract: A spread spectrum code pulse position modulated communication system is disclosed. The communication system includes a spread spectrum code pulse position modulated receiver that compensates for the delay spread of a transmission medium, such as a wireless radio channel of a local area network. Delay spread may cause signal components of one transmitted spread spectrum codeword to spill over into chip positions of adjacent symbols, causing intersymbol interference, or into chip positions on quadrature channels of a given symbol interval, such as in a QPSK implementation, causing interchip interference. The disclosed receiver decodes a transmitted spread spectrum code pulse position modulated signal in the presence of such delay spread, utilizing a tentative symbol estimator to sample the matched filter data.

Abstract: A communication device (300) includes a digital modulator (301), a Digital Signal Processor (306), and an amplifier (312). The digital modulator (301) includes an information generator (304) and a peak suppression device (402). The peak suppression device (402) includes a symbol mapper (404) and a symbol scaler (406). The information generated by the generator (401) are mapped on a constellation diagram via the symbol mapper (404). The mapped information is then scaled at the scaler (406) in order to reduce the peak-to-average ratio of the signal at the input to the amplifier (312).

Abstract: A digital receiver includes an antenna for picking up signals, a converter for converting an incoming signal to a predetermined intermediate frequency, and baseband processor. The receiver further includes an analog/digital converter using oversampling relative to the bandwidth of the signal and receiving the intermediate frequency signal at its input, and decimation filters receiving the output signal from the analog/digital converter and having their outputs connected to the baseband processor.

Abstract: A digital communication system includes a first station, a second station and a network therebetween. The first station includes a clock selecting device for selecting one clock from a plurality of different clocks; and a transmitting device for transmitting frames to the second station based on the selected clock. The second station includes an evaluating device for evaluating transmission quality of data in each of the frames received from the first station; and a quality message inserting device for inserting the evaluated transmission quality as a quality message into a part of the corresponding frame to be transmitted to the first station.

Abstract: A system and method for decoding by identification of the most likely phase coded signal corresponding to received data. The present invention has particular application to communication with signals that experience spurious random phase perturbations. The generalized estimator-correlator uses a maximum a posteriori (MAP) estimator to generate phase estimates for correlation with incoming data samples and for correlation with mean phases indicative of unique hypothesized signals. The result is a MAP likelihood statistic for each hypothesized transmission, wherein the highest value statistic identifies the transmitted signal.

Abstract: The invention relates to an asynchronous time-division multiplex transmission system comprising an interconnection element, which element transmits cells supplied by auxiliary lines (6) and destined for a trunk line (8) at a preset interconnection element transmission rate and which comprises cell filters (7) coupled to each of the auxiliary lines, which filters pass the cells for storage in intersection buffers (15) coupled to each cell filter when the path identification contained in the cells is allocated to the trunk line. An output buffer (17) supplying cells to the trunk line is connected to the outputs of the intersection buffers. The cells are transmitted between the intersection buffers and the output buffer at a temporary transmission rate which is increased relative to the element transmission rate.

Abstract: A finite impulse response filter performs an FFT on a signal, multiplies it by a transfer function in the frequency domain, and then performs an inverse FFT. The transfer function is dynamically computed in real-time by detecting signal energy in the frequency domain and turning off bins that contain the signal. The signal is delayed prior to turning off the bin in a FIFO memory by an amount equal to the time required to compute the transfer function. In this way, relatively fast changes in the interference environment can be tracked and rejected. For example, short duration narrow band interference signals in the presence of a wideband signal of interest, including direct sequence (DS) spread-spectrum signals in the presence of frequency hopped (FH) spread spectrum signals are rejected. The received signal quality of DS spread spectrum signals is improved.

Abstract: A convolutional encoder may be accomplished by providing a first register, a plurality of logic gates, a sampler, a second register, and a sequencer. In operation, the first register receives digital information at a code rate which convolutionally encoded by the plurality of logic gates to produce, based on the code rate, encoded samples. The sampler extracts the encoded samples at an extraction rate and provides them to the second register. To control this operation, the sequencer generates the code rate and the extraction rate based on a count value.

Abstract: A device 11 includes a sync unit 20 to identify and achieve synchronization with the cell boundaries of a 53-byte ATM cell stream. Each cell starts with a 5-byte header in which the 5th byte is a CRC byte. Instead of testing all possible bytes to see whether they are cell boundaries, a CRC circuit 21 computes CRCs for successive 5-byte blocks, under the control of a 5-state header counter 22. If such a block is a header, its CRC is a predetermined value, and a match signal is sent to a logic circuit 23, which starts a 53-state cell counter 24 and stops the header counter 22. A 4-state repeat counter 25 checks that the next 5 blocks checked by the CRC circuit 21 are also headers, as confirmation. Synchronization is achieved within at most 5 cells, because the test period of the testing circuitry (which could be longer than the header length) is coprime with the cell length.

Abstract: A communication device (300) includes a digital modulator (301), a digital to analog converter (308), an RF mixer (310) (306), and an amplifier(312). The digital modulator (301) includes an information generator (304) and a signal processor (306). The processor responds (306) to the generator (304) by alternately mapping the digital information onto a first (502) or a second (504) constellation diagram to produce data symbols. The processor (306) processes the data symbols alternately from the first and second constellation diagrams (502, 504) in order to minimize the peak to average power ratio at the amplifier (312). This alternating scheme allows the power amplifier to operate more efficiently and thereby conserve precious battery energy.

Abstract: A jitter attenuator receives data and a receive clock extracted from an input data stream. A transmit clock is generated for retransmitting the data. The transmit clock has less jitter than the receive clock but has the same average frequency. An elastic buffer or FIFO is necessary to buffer the data. The receive clock is divided into a series of write clocks for writing data into the elastic buffer, and the transmit clock is also divided into a series of read clocks for reading data from the elastic buffer. A series of multi-phase clocks is used to generate the transmit clock. The multi-phase clocks all have the same frequency but are offset in phase from one another. A phase selector, under control of a counter, selects one of the multi-phase clocks to be the transmit clock. The counter is incremented or decremented by a phase comparator. The phase comparator compares the phase of one of the write clocks to the phase of one of the read clocks.

Abstract: With this method and equipment the sensitivity of receivers, whose gain control criterion is a constant noise signal level, can be controlled independently of the received data signal, so that the reception of long datastreams is possible. For this purpose a diode (D1) is provided, whose anode is connected to a voltage source, and whose cathode is connected with a current source (Q4) and with the cathode of a second diode (D2) whose anode is connected to a capacitor (C12). A voltage is applied across the capacitor (C12) which is smaller in the rest state than a second voltage applied via the first diode (D1), so that the second diode (D2) is reverse-biased. After reception of a data signal a discharge pulse (EP) is generated dependent on an output of a signal detector, through which the second voltage is reduced to a value that is smaller than the first voltage.

Abstract: A multichannel frequency phase variable signal source is described having particular application in the simulation of an emitter environment for testing interferometer receivers. An improved direct digital frequency synthesizer produces phase information for initiating the operation of a related frequency synthesizer at a different phase point from those of the remainder of the synthesizers forming the multi channel source. An improved direct digital frequency synthesizer is described for varying this phase information.