Abstract: A memory controller combines information about which memory component segments are not being refreshed with the information about which rows are going to be refreshed next, to determine, for the current refresh command, the total number of rows that are going to be refreshed. Based on this total number of rows, the memory controller selects how long to wait after the refresh command before issuing a next subsequent command. When the combination of masked segments and the refresh scheme results in less than the ‘nominal’ number of rows typically refreshed in response to a single refresh command, the waiting period before the next command (e.g., non-refresh command) is issued may be reduced from the ‘nominal’ minimum time period, thereby allowing the next command to be issued earlier.

Abstract: Embodiments of the present disclosure generally relate to a target device handling overlap write commands. In one embodiment, a target device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes a random accumulated buffer, a sequential accumulated buffer, and an overlap accumulated buffer. The controller is configured to receive a new write command, classify the new write command, and write data associated with the new write command to one of the random accumulated buffer, the sequential accumulated buffer, or the overlap accumulated buffer. Once the overlap accumulated buffer becomes available, the controller first flushes to the non-volatile memory the data in the random accumulated buffer and the sequential accumulated buffer that was received prior in sequence to the data in the overlap accumulated buffer. The controller then flushes the available overlap accumulated buffer, ensuring that new write commands override prior write commands.

Abstract: The embodiments of the present disclosure relate to a storage device sharing system and operation method thereof. According to embodiments of the present disclosure, the storage device sharing system may include i) a plurality of storage devices, each storage device including a first memory buffer including a plurality of first type memory blocks and a second memory buffer including a plurality of second type memory blocks, and ii) a host device configured to determine, based on sharing state set for a first storage device among the plurality of storage devices, whether to set the first memory buffer of the first storage device as an area for storing data to be written to a second storage device among the plurality of storage devices.

Abstract: A protocol for processing write operations can include recording each write operation in a log using a PDESC (page descriptor)-PB (page block) pair. The log entry for the write operation can be included in a container of logged writes. In a dual node system, the protocol when processing the write operation, that writes first data, can include incrementing a corresponding one of two counters of the container, where the corresponding counter is associated with one of the system's nodes which received the write operation and and caches the first data. Each container can be associated with an logical block address (LBA) range of a logical device, where logged writes that write to target addresses in the particular LBA range are included in the container. Nodes can independently determine flush ownership using the container's counters and can flush containers based on the flush ownership.

Abstract: While a compiler compiles source code to create an executable binary, code is added into the compiled source code that, when executed, identifies and stores in a metadata table base and bounds information associated with memory allocations. Additionally, additional code is added into the compiled source code that performs memory safety checks during execution. This updated compiled source code automatically determines a safety of memory access requests during execution by performing an out-of-bounds (OOB) check using the base and bounds information retrieved and stored in the metadata table. This enables the identification and avoidance of unsafe memory operations during the implementation of the executable by a GPU.

Abstract: A method may include, in an operating system of an information handling system: responsive to a determination that a storage resource of the information handling system is experiencing a predictor of a failure of the storage resource, issuing a command to the storage resource to reload firmware code of the storage resource; responsive to the storage resource reloading the firmware code and reset of the storage resource following reloading of the firmware code, determining whether the predictor persists; and responsive to determining whether the predictor persists, performing a responsive action.

Abstract: Techniques are provided for block allocation for persistent memory during aggregate transition. In a high availability pair including first and second nodes, the first node makes a determination that control of a first aggregate is to transition from the first node to the second node. A portion of available free storage space is allocated from a first persistent memory of the first node as allocated pages within the first persistent memory. Metadata information for the allocated pages is updated with an identifier of the first aggregate to create updated metadata information reserving the allocated pages for the first aggregate. The updated metadata information is mirrored to the second node, so that the second node also reserves those pages. Control of the first aggregate is transitioned to the second node. As a result, the nodes do not attempt allocating the same free pages to different aggregates during a transition.

Abstract: A volume for object storage encompasses a single logical block address space and the first range of logical block addresses being within the single logical block address space. A first and second range of logical block addresses are initially allocated within the single logical block address space of the volume for storing respective object metadata and object data. One or both of the first and second ranges of logical block addresses are reallocated to increase storage utilized by one of the object metadata and the object data.

Abstract: Methods of arbitrating between requestors and a shared resource wherein for each processing cycle a plurality of select signals are generated and then used by decision nodes in a binary decision tree to select a requestor. The select signals are generated using valid bits and priority bits. Each valid bit corresponds to one of the requestors and indicates whether, in the processing cycle, the requestor is requesting access to the shared resource. Each priority bit corresponds one of the requestors and indicates whether, in the processing cycle, the requestor has priority. Corresponding valid bit and priority bits are combined in an AND logic element to generate a valid_and_priority bit for each requestor. Pair-wise OR-reduction is then performed on both the valid bits and the valid_and_priority bits to generate additional valid bits and valid_and_priority bits for sets of requestors and these are then used to generate the select signal.

Abstract: A memory device, for executing an anneal computation with first state and a second state. The memory device includes a first memory array, a second memory array, a control circuit, a sensing circuit and a processing circuit. the control circuit selects a first horizontal row of memory units from the first memory array, and selects a second horizontal row of memory units from the second memory array. The sensing circuit computes a local energy value of the first state according to the current generated by the memory units of the first horizontal row, and computes a local energy value of the second state according to the current generated by the memory units of the second horizontal row. The processing circuit updates the first state and/or the second state according to the local energy value of the first state and the local energy value of the second state.

Abstract: An information processing apparatus includes a network interface, a storage device, and a processor. The processor is configured to assign a plurality of zones in the storage device. Each of the zones is a contiguous physical address range of the storage device that is mapped to a contiguous logical address range. The processor is configured to generate zone management information for each of the plurality of zones, store content received from the origin server via the network interface, in one of writable zones and update a writable address of the zone management information for the one of the writable zones. The processor is configured to operate to transmit the received content, and control the storage device to delete data stored therein in units of a zone upon a predetermined cache clearing criteria being met.

Abstract: A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces address of data elements for the nested loops. A steam head register stores data elements next to be supplied to functional units for use as operands. A stream template register specifies a circular address mode for the loop, first and second block size numbers and a circular address block size selection. For a first circular address block size selection the block size corresponds to the first block size number. For a first circular address block size selection the block size corresponds to the first block size number. For a second circular address block size selection the block size corresponds to a sum of the first block size number and the second block size number.

Abstract: An illustrative live synchronization feature uses file system block-level backup copies, snapshot techniques, change tracking, and volume-level granularity to ensure the integrity of destination volumes. Two protection mechanisms guard the destination data and ensure consistency from one live sync restore to the next. First, an inter-job software snapshot captures the destination volume image after each restore. The snapshot is created at the very end of each live sync restore and is reverted at the beginning of the next live sync restore. A second and more granular protection mechanism uses intra-job block monitoring to detect, and later to reverse, changes that the snapshots cannot capture. This second mechanism acts as a mini-block-level restore nested inside another block-level restore. This dual approach ensures that each incremental live sync restore finds the destination volume with a guaranteed pristine image identical to where the preceding live sync restore left it.

Abstract: Systems and methods are disclosed for providing utilization of device resources based on host assisted grouping of applications. In certain embodiments, a data storage device includes a non-volatile memory, a volatile memory, and a controller configured to: receive application group information associated with applications from a host, wherein the application group information indicates corresponding application groups for the applications on the host; receive a plurality of write requests associated with a plurality of applications from the host, wherein the plurality of applications is included in the same application group; write data for each write request of the plurality of write requests in parallel across a plurality of channels associated with a plurality of dies in the non-volatile memory such that the data for the plurality of write requests share a parity buffer; and generate parity data for the data for the plurality of write requests.

Abstract: Solid State Drive devices with hardware accelerators and methods for apportioning storage resources with tokens in the SSD are disclosed. SSDs typically comprise an array of non-volatile memory devices and a controller which manages access to the memory devices. The controller may also comprise one or more accelerators to either improve the performance of the SSD itself or to offload specialized computation workloads of a host-computing device. Different accelerators may be dynamically assigned portions of the non-volatile memory array according to the type of data being accessed and/or the throughput required. Provision is also made for the data to be accessed directly by the accelerators bypassing the controller. The accelerators may also share data bus bandwidth and resources with each other or the storage device controller. To minimize conflicts and improve the storage device performance, a system of tokens for both cache memory and bus bandwidth is used to dynamically assign these resources.

Abstract: A basic storage unit management circuit includes a receiving circuit, a transmitting circuit, a first buffer, and an idle basic storage unit controller. The first buffer is arranged to store a bit map, wherein the bit map includes a plurality of first bits that correspond to a plurality of basic storage units, respectively, and each of the plurality of first bits is arranged to label whether a corresponding basic storage unit is an idle basic storage unit. The idle basic storage unit controller is coupled to the receiving circuit, the transmitting circuit, and the first buffer, and is arranged to manage the bit map stored by the first buffer, and process at least one basic storage unit of at least one packet that is received by the receiving circuit or is transmitted by the transmitting circuit.

Abstract: A computer-implemented method, according to one embodiment, includes: in response to a determination that an available capacity of one or more buffers in a primary cache is not outside a predetermined range, using the one or more buffers in the primary cache to satisfy all incoming I/O requests. In response to a determination that the available capacity of the one or more buffers in the primary cache is outside the predetermined range, one or more buffers in a secondary cache are allocated, and the one or more buffers in the secondary cache are used to satisfy at least some of the incoming I/O requests.

Abstract: In a storage system in which a plurality of pieces of control software constituting a redundancy group are distributedly arranged in a plurality of storage nodes, control software in an active state out of the plurality of pieces of control software constituting the redundancy group receives a write request from a higher-level device. The control software in the active state writes data related to the write request by mirroring into a cache memory of a storage node in which the control software in the active state is arranged and a cache memory of a storage node in which control software in an inactive state belonging to the same redundancy group is arranged. The control software in the active state sends a write completion response to the higher-level device, and redundantly stores the data written in the cache memories in a storage device.

Abstract: A memory controller is to store a unique tag at the mid-point address within each of allocated memory portions. In addition to the tag data, additional metadata may be stored at the mid-point address of the memory allocation. For each memory access operation, an encoded pointer contains information indicative of a size of the memory allocation as well as its own tag data. The processor circuitry compares the tag data included in the encoded pointer with the tag data stored in the memory allocation. If the tag data included in the encoded pointer matches the tag data stored in the memory allocation, the memory operation proceeds. If the tag data included in the encoded pointer fails to match the tag data stored in the memory allocation, an error or exception is generated.

Abstract: A method of operating a storage system may include allocating a first partition of a tier of storage resources to a first client, wherein the tier operates at least partially as a storage cache, allocating a second partition of the tier of the storage resources to a second client, monitoring a workload of the first client, monitoring a workload of the second client, and reallocating the first partition of the tier of the storage resources to the first client based on the monitored workload of the first client and the monitored workload of the second client. The method may further include reallocating the second partition of the tier of the storage resources to the second client based on the monitored workload of the first client and the monitored workload of the second client.