Patents Examined by Thien D Tran
  • Patent number: 6778547
    Abstract: An integrated multiport switch operating in a packet switched network utilizes an internal rules checker (IRC) to process data frames. The IRC employs a modular, pipelined architecture that enables data frames to be processed simultaneously, thereby increasing data throughput.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: August 17, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Shashank C. Merchant
  • Patent number: 6771604
    Abstract: Disclosed is a location management method for a communication network. In a first embodiment, a procedure for finding an optimal path between a calling switch and a visiting switch node is integrated in the call set up procedure. The connection set up procedure starts by setting up a connection path between the calling switch and the home switch. Then, an “optimal crossover node” is determined along the connection path and then the connection path is cranked back starting from the home switch and moving towards the optimal crossover node. Once the optimal crossover node is reached, the a connection set-up proceeds to set up a connection between the optimal crossover node and the visiting switch. In an alternative embodiment, first a connection is set up between the calling switch and the home switch. Then the connection is extended to the visiting switch either by the call-forwarding or by two-phase crankback method. This results in a quickly routed, but sub-optimal connection.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: August 3, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Gopal Dommety, Malathi Veeraraghavan
  • Patent number: 6754177
    Abstract: A method and system for controlling congestion in an ATM network comprises the steps of pre-allocating, for a pre-determined interval of time, a set of burst access parameters to a set of pre-allocated virtual paths between a set of source node and destination node pairs in the ATM network, and controlling, at the burst level, the traffic at each source node based on the pre-allocated set of burst access parameters and without communicating with other nodes in the ATM network. Specifically, the network, for a pre-determined interval of time, pre-allocates a set of virtual paths between each source-destination node pair in the network, pre-allocates a set of maximum permitted rates to the pre-allocated set of virtual paths, respectively, and pre-assigns a set of burst access thresholds to a set of service classes, respectively, in the pre-allocated virtual paths, where the pre-assigned burst access thresholds are less than or equal to the corresponding pre-allocated maximum permitted rates.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: June 22, 2004
    Assignees: Verizon Corporate Services Group Inc., Genuity Inc.
    Inventors: Alexander Gersht, Girish Pathak, Alexander Shulman
  • Patent number: 6744733
    Abstract: A plurality of bridges accommodating LANs are connected through an ATM network in a network system of the present invention. When a specified bridge is newly connected to this ATM network, the specified bridge transmits a request for setting point-to-multipoint transmission SVCs towards other bridges. These other bridges, when receiving the setting request from the specified bridge, execute a process of setting the point-to-multipoint transmission SVCs with respect to the specified bridge.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: June 1, 2004
    Assignee: Fujitsu Limited
    Inventor: Toshiyuki Kamo
  • Patent number: 6744779
    Abstract: The data processing system includes I/O units for transmitting and receiving data, control units for processing the data, and a common bus unit including a common bus. Function cards in each unit are daisy-chained to I/O buses having characteristics to support hot-swapping, and both ends of the I/O buses are terminated with resistors respectively. The units are daisy-chained to the common bus, and both ends of the common bus are terminated with resistors respectively. Drivers/receivers drive each bus to transmit and receive data between the common bus and the I/O buses.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: June 1, 2004
    Assignees: Matsushita Electric Industrial Co., Ltd., Fujitsu Limited
    Inventors: Masashi Yamaguchi, Takahiro Yamada, Tomonori Kumagai, Seiya Yamazaki, Takeshi Yonekura
  • Patent number: 6741562
    Abstract: An exemplary method for writing packets in a data stream comprises the steps of dividing a packet into long packet cells and short packet cells, storing the long packet cells in a set of long cell queues and the short packet cells in a set of short cell queues, selectively pairing a long packet cell in one of the set of long cell queues with a short packet cell in one of the set of short cell queues to obtain an optimized pair of packet cells at each write cycle, and sequentially writing the optimized pair of packet cells at each write cycle to a set of memory banks.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 25, 2004
    Assignee: Tellabs San Jose, Inc.
    Inventors: Joe Keirouz, Simeon Ngo Sy, Robert Edward Liston
  • Patent number: 6724719
    Abstract: A plurality of data channels provide respective data rates and maximum error rates from a mobile station to a base station of a CDMA system; a pilot channel facilitates recovery of the data channels. For each data channel there is determined a channel energy to noise ratio (ENR) and a required pilot channel ENR. A maximum one of the required pilot channel ENRs is selected as an ENR for transmission of the pilot channel. A relative gain, and hence transmit signal power, for each data channel is determined from the ENR determined for the data channel and the selected maximum ENR for transmission of the pilot channel, thereby minimizing the total transmitted signal power of the mobile station. The data channel signals are spread using orthogonal Walsh codes and are combined with their determined relative gains.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: April 20, 2004
    Assignee: Nortel Networks Limited
    Inventors: Wen Tong, Rui R. Wang
  • Patent number: 6721314
    Abstract: Duplicate processing at network operators is avoided by applying once-only processing at operators which are adjacent to either the source or destination host of a data packet. An operator is adjacent to a host if there exists a path between the operator and the host containing no other operators. In one embodiment, an operator determines that it is adjacent to a host if it receives a special broadcast data packet from the host. To ensure that no other operators receive the special broadcast data packet, the adjacent operator drops the packet. In another embodiment, operators determine whether they are adjacent to identified hosts by transmitting special ping packets to the hosts. If an operator receives a ping response from the host, the operator determines that it is adjacent to the host. To ensure that only adjacent operators receive ping responses, intervening operators drop special ping packets received from other operators.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: April 13, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Stephen Michael Blott, Yuri Breitbart, Clifford Eric Martin
  • Patent number: 6714516
    Abstract: A congestion control mechanism for use with a receiver in a telecommunications network using the Service Specific Connection Oriented Protocol (SSCOP). The receiver is disposed in an access network portion of the telecommunications network such that it receives messages from an aggregate portion of the network over an Access Network Interface (ANI) and from a plurality of users over User-Network Interfaces (UNIs) in a distribution network portion. Credit windows granted by the receiver to the transmitters for transmission of message frames are managed by the receiver when it experiences congestion. The congestion control method monitors buffer usage for ANI-based traffic and UNI-based traffic in the receiver by setting appropriate buffer use counters and timers. When the number of available buffers reaches certain predetermined threshold values, the receiver sends an indication to the transmitter to restrict its message transmit window, thereby throttling the message flow therefrom.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: March 30, 2004
    Assignee: Alcatel
    Inventor: Michael D. Todd
  • Patent number: 6683880
    Abstract: In a technique relating to a switching system, at least a switching apparatus can acquire an information channel of a physical line different from a physical line to which a signaling channel, over which a setup request is transmitted, belongs as an information channel in response to the setup request, thereby backing up when a signaling channel becomes unusable, or distributing a load of virtual connection setting control using a plurality of signaling channels.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: January 27, 2004
    Assignee: Fujitsu Limited
    Inventor: Masaaki Kato
  • Patent number: 6667993
    Abstract: A digital system (100) has two or more nodes (120, 130) and a communication channel (110, 111) for transferring a single stream of ordered data from one node to another. The communication channel (110) has a number of data links (110a-110g) for transferring a plurality of sub-streams of data in a parallel fashion in order to transfer more data than a single data link is capable of transferring. Receivers (132a-132g) each have synchronizing circuitry (200, 202) for synchronizing a byte clock and a frame pulse of each received data sub-stream to the byte clock and frame pulse of a preselected master one of the receivers such that inherent data skew is eliminated.
    Type: Grant
    Filed: August 3, 1999
    Date of Patent: December 23, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Mark Lippett, Marco Collivignarelli, Steve Colquhoun
  • Patent number: 6650637
    Abstract: A high capacity digital non-blocking cross-connect switching fabric is realized by employing a multi-port RAM based space-time switch having a plurality of write circuits and a plurality of read circuits, each of which operates at a timing rate that is a prescribed fraction of the input/output clock rate of the input/output ports of the multi-port RAM based cross-connect switching fabric. The at least one multi-port RAM switch unit has a plurality of write circuits and a plurality of read circuits, each of which operates at a timing rate that is a prescribed fraction of the input/output clock rate of the input/output ports of the multi-port RAM based cross-connect switching fabric. Additionally, in one embodiment, each of the write circuits and each of the read circuits has independent and unrestricted access to all data storage positions in each of a plurality of storage units that make up the at least one multi-port RAM switch unit.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: November 18, 2003
    Assignee: Lucent Technologies Inc.
    Inventors: Narendra K. Bansal, Kenneth A. Becker, James S. Lavranchuk
  • Patent number: 6618362
    Abstract: The invention provides a transponder acting as a memory buffer facilitating information or message transfer between a remote communication system, such as a fuel dispenser, and the vehicle control system. Information written to the transponder memory from the fuel dispenser may be sent to or retrieved by the vehicle control system. Information sent to the transponder from the vehicle control system is made accessible by or transmitted to the fuel dispenser. The transponder includes sufficient communication electronics, memory access and communication control circuitry, and memory to allow storing of information and access to information by both the vehicle control system and the fuel dispenser.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: September 9, 2003
    Assignee: Gilbarco Inc.
    Inventor: Steven N. Terranova
  • Patent number: 6603773
    Abstract: A data transmission system comprises a first device and a second device and a duplex data transmission connection therebetween. The first device sends to the second device user data on a data channel and control information on a control channel. The transmission is arranged in frames that comprise a user data field corresponding to a data channel and at least a first and a second control information field corresponding together to a control channel. In order to realise the control of the transmission power, there is determined a first transmission power level, a second transmission power level and a third transmission power level. From the second device to the first device there is transmitted a frame by applying said first transmission power level to the transmission of the user data field, said second transmission power level to the transmission of the first control information field and said third transmission power level to the transmission of the second control information field.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: August 5, 2003
    Assignee: Nokia Mobile Phones Limited
    Inventors: Janne Laakso, Oscar Salonaho
  • Patent number: 6600747
    Abstract: A single group of signals interfaces a computer system to either an analog display or a digital display. A video signal in digital format and a video signal in analog format are both supplied to a circuit that multiplexes the digital signal and the analog signal, generating an appropriate output signal for the display, either analog or digital, that is coupled to the computer system. In one example, the signal connector interfaces the computer system to either an analog CRT display or a digital FPD display. The multiplexer multiplexes the analog signal and the digital signal supplied by the computer system and generates an output signal that is suitable for the CRT display or the FPD display, depending on the type of display coupled to the computer system.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: July 29, 2003
    Assignee: Dell Products L.P.
    Inventor: William F. Sauber
  • Patent number: 6580693
    Abstract: A method for detecting leaks in an ATM network, the method including the steps of a) creating an entity interconnection map including mappings of port interconnections among a plurality of network nodes, the plurality of network nodes includes a plurality of network endpoints and at least one network switch, b) creating an endpoint map including at least one endpoint mapping of at least one port to at least one virtual identifier for at least one of the network endpoints and a leak indicator for the at least one network endpoint indicating that the network endpoint is either of a transmitting endpoint and a receiving endpoint, c) creating a switch map including at least one switch mapping of at least one port and virtual identifier grouping to at least one other port and virtual identifier grouping for the at least one network switch, d) initializing a leak indicator for each of the endpoint mappings and the switch mappings to indicate a leak condition, e) traversing a virtual channel connection from each tra
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: June 17, 2003
    Assignee: 3Com Corporation
    Inventors: Arcady Chernyak, Eldad Bar-Eli, Miki Kennet
  • Patent number: 6577600
    Abstract: A method for computing cost information associated with a port of a switch in a network of switches. Cost information is computed as a port load factor: a ratio of port latency over available throughput. Port latency is determined as the depth of a queue associated with the port divided by the speed of the port. Available throughput is determined as the speed of the slowest port on a given path associated with the port in question. Preferably, the queue depth is measured in bits and the port speed and available throughput are measured in bits per second. Further, in the preferred embodiment, port latency is computed as a weighted average as ((15×previous latency)+current latency)/16. A higher value for the port load factor indicates a port which is more heavily loaded. The load factor is therefore useful in load balancing among the ports of switches and paths associated therewith.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: June 10, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Ballard C. Bare
  • Patent number: 6570843
    Abstract: A method is provided that reduces the total number of retransmitted packets required for retransmission from a transmitter to a receiver, the transmitter having already transmitted over a forward channel N number of packets to the receiver, and the receiver having already reported over a back channel to the transmitter information regarding which of the N packets were successfully received. Another method is provided that accounts for the likelihood that some of the retransmitted packets may be lost on retransmission, and thus increases the number of retransmitted packets accordingly.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: May 27, 2003
    Assignee: KenCast, Inc.
    Inventor: H. Lewis Wolfgang
  • Patent number: 6560240
    Abstract: A system-on-a-chip with a variable clock rate bus. The integrated circuit includes at least one bus, a clock, a plurality of modules coupled to the bus and operable to transfer and receive data on the bus, and a bus controller coupled to the bus that controls data transfers on the bus. The modules are operable to generate requests to the bus controller to perform transfers on the bus. Each request comprises an identifier which identifies one or more receiving modules, a transfer size value which specifies the amount of data to be transferred, and a timing value providing a time frame within which the requested data transfer should occur. Thee bus controller receives the requests, analyzes the timing value, and selectively adjusts the clock rate of the bus based on the timing value.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: May 6, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David J. Borland, Gary M. Godfrey
  • Patent number: 6553038
    Abstract: When data transmitted by a predetermined wire transmission path such as an ATM network or the like is wireless-transmitted, a payload serving as user information can be efficiently transmitted. An error detection signal added to header information by a wire transmission path is removed, or repetition of header information is omitted, so that information is formatted for wireless transmission path to be transmitted.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: April 22, 2003
    Assignee: Sony Corporation
    Inventor: Kunio Fukuda