Abstract: The present application provides a reworking method of a failed hard mask layer on a via opening in a dielectric layer, including removing the failed hard mask layer; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; and forming a mask layer on the top hard mask layer.

Abstract: A described example includes: a semiconductor die having bond pads on a device side surface; a passivation layer overlying the device side surface of the semiconductor die with openings in the passivation layer, the passivation layer having a planar surface facing away from the device side surface of the semiconductor die; post connects formed on the bond pads and in the openings in the passivation layer, the post connects having a proximate end on the bond pads and extending from the bond pads to a distal end that lies beneath the planar surface of the passivation layer; solder at the distal ends of the post connects and contacting sidewalls of the openings in the passivation layer; and solder joints formed between the solder at the distal ends of the post connects and a package substrate, the device side surface of the semiconductor die facing the package substrate.

Abstract: A semiconductor device having favorable electrical characteristics is provided.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, a display region including a first region, a second region and a transition region; first light-emitting elements at the first region; second light-emitting elements, first pixel circuitries and second pixel circuitries at the transition region, each first pixel circuitry being arranged between adjacent second pixel circuitries, an orthogonal projection of at least one second pixel circuitry onto the base substrate at least partially overlapping an orthogonal projection of at least one second light-emitting element onto the base substrate; first conductive lines each coupled between at least one first pixel circuitry and at least one first light-emitting element; and second conductive lines each coupled to at least one first pixel circuitry and extending along the at least one first pixel circuitry to a side away from the at least one first light-emitting element.

Abstract: A process for obtaining a nitride (N) layer preferably obtained from at least one of gallium (Ga), indium (In) and aluminium (Al), may include: on a stack including a substrate and at least the following layers successively disposed from the substrate: a creep layer having a glass transition temperature, Tglass transition, and a crystalline layer, forming pads by etching the stack so that each pad includes at least a creep segment formed by at least a portion of the creep layer, and a crystalline segment formed by the crystalline layer; and growing by epitaxy a crystallite on each of the pads and continuing the epitaxial growth of the crystallites so as to form the nitride layer. The epitaxial growth may be carried out at a temperature Tepitaxy, such that Tepitaxy?k1×Tglass transition, with k1 being 0.8.

Abstract: A unit pixel of a Red-Green-Cyan-Blue (RGCB) microdisplay is disclosed. In the unit pixel, sub-pixels that form blue light, green light, cyan light, and red light, are vertically stacked on a growth substrate. Accordingly, the unit pixel area may be reduced, and pixel transfer processing is facilitated.

Abstract: An image sensor including a plurality of pixels, each including: a photodetector semiconductor region; a metal region arranged on a first surface of the semiconductor region; a band-pass or band-stop interference filter arranged on a second surface of the semiconductor region opposite to the first surface; and between the semiconductor region and the metal region, an absorbing stack comprising, in the order from the semiconductor region, a dielectric layer, a silicon layer, and a tungsten layer.

Abstract: In an element provided with a QD layer including QD phosphor particles, a first hole transport layer located between a first electrode and the QD layer is formed of a continuous film of a first carrier transport material. A second hole transport layer located between the first hole transport layer and the QD layer includes nanoparticles formed of a second carrier transport material.

Abstract: The present disclosure provides a display panel and a manufacturing method of the display panel, and a display apparatus, and belongs to the field of display technology. The display panel of the present disclosure includes a flexible substrate and a support substrate, wherein the support substrate supports the flexible substrate; a plurality of display units are provided on the flexible substrate; the display panel further includes: a first magnetic unit; a second magnetic unit; the first magnetic unit and the second magnetic unit are used for jointing the flexible substrate to the support substrate through a magnetic field therebetween.

Abstract: An electronic apparatus includes an integrated circuit board on, over, or in which a USB circuit block is provided; a first USB interface; a second USB interface; a printed circuit board on which a source clock circuit configured to output a source clock is provided; and a ball grid array that includes first, second, and third ball grids for electric coupling between the integrated circuit board and the printed circuit board. The first ball grid electrically couples the USB circuit block and the first USB interface to each other. The second ball grid electrically couples the USB circuit block and the second USB interface to each other. The third ball grid electrically couples the source clock circuit and the USB circuit block to each other. The third ball grid is located between the first ball grid and the second ball grid.

Abstract: A display panel, a method of manufacturing the display panel and a display device are provided in the present disclosure. The display panel includes: a substrate, a functional film layer arranged on the substrate, a first bending region capable of being bent along a first direction, a second bending region capable of being bent along a second direction, and a third bending region located between the first bending region and the second bending region. The first direction intersects the second direction. The functional film layer includes a non-hollowed region located in at least one of the first bending region and the second bending region, and a part of the functional film layer located in the third bending region includes a plurality of functional via holes spaced from each other.

Abstract: A flip chip device and methods for fabrication are provided. An interconnect layer for a device include a plurality of solder bumps arranged within the interconnect layer. A first subset of the plurality of solder bumps has a first cross-sectional area, where the first subset is arranged along a first position at a first edge of the interconnect layer. A second subset of the plurality of solder bumps has a second cross-sectional area, where the second subset is arranged at a second position of the interconnect layer. A third subset of the plurality of solder bumps is arranged between the first position and the second position, where the third subset has a plurality of cross-sectional areas.

Abstract: A display device includes a metal layer composed of multiple layers including a lowermost layer lower in an ionization tendency than a middle layer, the lowermost layer being in contact with and on the oxide semiconductor layer. Each channel region is interposed between a corresponding one of the first electrodes and a corresponding one of the second electrodes, constituting a corresponding one of the thin film transistors. The oxide semiconductor layer is continuous between a pair of channel regions included in an adjacent pair of thin film transistors. The metal layer is continuous between a pair of first electrodes included in the adjacent pair of thin film transistors.

Abstract: An imaging device and an electronic apparatus that make it possible to reduce color mixture between pixels are provided. An imaging device of an embodiment of the present disclosure includes: a plurality of pixels (PX) each having a stacked structure in which a photoelectric conversion section (PD) including a light entrance surface, a first light transmissive film provided to face the light entrance surface and having a first refractive index (nCF), and a second light transmissive film having a second refractive index (n18) higher than the first refractive index are stacked in order in a stacking direction, the plurality of pixels being arranged in an in-plane direction orthogonal to the stacking direction; and a first pixel separation section provided between a plurality of the first light transmissive films adjacent to each other in the in-plane direction, and having a third refractive index (n13) lower than the first refractive index.

Abstract: Embodiments of the present disclosure are related to a display device, as arranging a storage capacitor and an active pattern disposed on a subpixel by using an active layer that a semiconductor layer and a conductive layer are laminated, an area of the storage capacitor can be increased efficiently and methods can be provided to use an area overlapped with a contact-hole located on the active pattern as an area of the storage capacitor. Furthermore, as a location of the contact-hole is adjusted easily, by making the contact-hole not to be disposed on an area adjacent to a driving transistor, a size of the driving transistor can be increased and an aperture ratio of the subpixel can be improved.

Abstract: A semiconductor structure includes: a first base having a first face, a second base having a second face and a welded structure. The first base is provided with an electrical connection column protruding from the first face. A conductive column is provided in the second base, and a first groove and a second groove are further provided at the second face. The first groove is located above the conductive column, and the second groove exposes at least part of a side surface of the conductive column. The protruding portion of the electrical connection column is located in the second groove, and part of a side surface of the electrical connection column and part of the side surface of the conductive column overlap in staggered way in a direction perpendicular to the first face or the second surface. At least part of the welded structure is filled in the first groove.

Abstract: An imaging element according to an embodiment of the present disclosure includes: a semiconductor substrate having an effective pixel region in which a plurality of pixels is disposed and a peripheral region provided around the effective pixel region; a photoelectric converter; a first hydrogen block layer; an interlayer insulating layer; and a separation groove. The photoelectric converter includes a first electrode, a second electrode, and an electric charge accumulation layer and a photoelectric conversion layer. The first electrode is provided on a light receiving surface side of the semiconductor substrate and includes a plurality of electrodes. The second electrode is disposed to be opposed to the first electrode. The electric charge accumulation layer and the photoelectric conversion layer are stacked and provided in order between the first electrode and the second electrode and extend in the effective pixel region.

Abstract: A semiconductor device includes a first circuit, a second circuit, a wiring member, and a bonding material. The wiring member is connected to one of the first circuit and the second circuit. The bonding material is connected to the other of the first circuit and the second circuit. The wiring member includes a first end, a second end, and a top. The first end and the second end are connected to one of the first circuit and the second circuit. The top is located between the first end and the second end. The top is connected to the other of the first circuit and the second circuit with the bonding material in between.

Abstract: A semiconductor structure and a method of manufacturing the semiconductor structure are provided. The semiconductor structure includes a substrate including a plurality of pads spaced apart from each other, a first groove, and a second groove connected with the first groove, the first and the second grooves located in the substrate. The first groove is located on the side of the second groove away from the plurality of pads, and the bottom of the second groove exposes a corresponding pad of the plurality of pads. The orthographic projection of the second groove on the substrate is located within the orthographic projection of the first groove on the substrate. A redistribution layer is disposed on a surface of the corresponding pad, the inner wall of the first groove, and the inner wall and the bottom of the second groove. The semiconductor structure prevents contamination or damage of test probes.

Abstract: A display device includes a resin substrate and a thin film transistor layer. The thin film transistor layer includes a first inorganic insulating film, a second inorganic insulating film, and a lead-out wiring line. A frame region includes a bending portion provided with a slit constituted with a first slit and a second slit. Portions of the first inorganic insulating film on both sides in a width direction of the first slit constituting step portions are exposed from the second inorganic insulating film inside the second slit. The lead-out wiring line is electrically connected to the thin film transistor. The step portions are provided with a protruding portion having an island shape. The lead-out wiring line includes an opening covering perimeter edge surface of the protruding portion and exposing an upper face of the protruding portion.