Abstract: A chip package which includes a glass fiber substrate made of FR-4 fiberglass is provided. The chip package further includes a substrate pad which is a stacked metal structure with a certain thickness and composed of a nickel layer, a palladium layer, and a gold layer, or a nickel layer and a gold layer stacked over at least one first circuit layer in turn. A total thickness of the substrate pad is 3.15-5.4 ?m. The glass fiber substrate and the substrate pad can bear positive pressure generated during wire bonding. Thereby at least one solder joint is formed on the substrate pad precisely and integrally. This helps reduction in material cost for manufacturers.

Abstract: A display module includes a display panel, an optical layer disposed on the display panel, an antireflection layer disposed on the optical layer, and the antireflection layer includes a first layer including silicon oxynitride, a second layer disposed on the first layer and including silicon nitride, and a third layer disposed on the second layer and including polysilazane.

Abstract: A 3D integrated structure and a method for fabricating the structure. In the method, a first trimming process is performed in a peripheral region of a wafer stack to form a chamfered surface adjacent to and surrounding an active device region. As a result, a thickness of the wafer stack along the chamfered surface gradually decreases from an edge of the active device region outward. In this way, a photoresist layer can be subsequently easily applied to cover the junction of the active device region and the chamfered surface, without the formation of discontinuities there, which may affect the subsequent processes. Additionally, in the method, a second trimming process is performed at an edge of the peripheral region to form a clamping surface adjacent to and surrounding the chamfered surface. In this way, it is unnecessary to clamp the wafer stack at a top surface thereof.

Abstract: Disclosed three-dimensional stacked package structure includes: a packaging substrate, having a substrate body, connecting leads, a through-hole penetrating the substrate body, a first pad and a second pad on opposite surfaces of the substrate body. The stacked structure on the first surface of the substrate body includes a second storage block, and a first storage block above the second storage block; the connecting leads include a first lead and a second lead with equal lengths, the first lead is above the package substrate, and one end is electrically connected to the first pad, and the other end is electrically connected to the first storage block. The second lead passes through the through-hole, and one end is electrically connected to the second storage block, the other end is electrically connected to the second pad. The present disclosure reduces the crosstalk between signal lines, thereby reducing signal delay between different storage blocks.

Abstract: An MPS diode and a manufacturing method is provided. The diode includes a semiconductor body including an active area and an adjacent termination area, the active area includes a drift region of a first conductivity type, and a plurality of wells of a second type different from the first conductivity type, the wells being mutually spaced apart, each well forming a respective PN-junction with the drift region. The diode further includes a metal layer assembly arranged on a surface of the semiconductor body and at least one metal layer, the metal layer assembly forming a plurality of Schottky contacts together with the drift region and a plurality of respective Ohmic contacts with the wells. The drift region includes a doped region surrounding each of the wells and having a higher dopant concentration than a remainder of the drift region, and the doped region is spaced apart from the termination area.

Abstract: The present invention provides: an aqueous composition capable of removing a photoresist from a printed wiring board or a semiconductor wafer while preventing corrosion of tin plating and tin alloy plating in addition to a copper wiring; and a method for removing a photoresist using the aqueous composition. The aqueous composition according to the present invention is characterized by comprising an alkanolamine (A), a quaternary ammonium hydroxide (B), a sugar alcohol (C), a polar organic solvent (D), and water (E), wherein, with respect to the total amount of the composition, the content of the alkanolamine (A) is 2.5-50 mass %, the content of the quaternary ammonium hydroxide (B) is 0.5-4 mass %, and the content of the sugar alcohol (C) is 0.5-20 mass %.

Abstract: In examples, a semiconductor package comprises a semiconductor die including a circuit, a housing covering the semiconductor die, and a conductive terminal coupled to the semiconductor die and exposed to an exterior surface of the housing. The package also comprises a sensor exposed on the exterior surface of the housing, a flux layer on the conductive terminal and a conductive member on the flux layer. The conductive member includes a copper core, a nickel layer covering the copper core, and a solder layer covering the nickel layer.

Abstract: The present disclosure provides a light emitting device, a display substrate and a display device. The light emitting device of the present disclosure includes: a first electrode and a second electrode opposite to each other; a plurality of light-emitting units stacked between the first electrode and the second electrode; and a third electrode between adjacent light-emitting units. The first electrode and the second electrode are both electrically coupled to a first signal terminal, the third electrode is coupled to a second signal terminal, and the first signal terminal is configured to provide a first signal and the second signal terminal is configured to provide a second signal such that only part of the plurality of light-emitting units emits light at a same time.

Abstract: A package substrate includes a base insulating layer, a first main line pattern on a first surface of the base insulating layer, a plurality of first conductive pads on the first surface of the base insulating layer, a plurality of first branch line patterns on the first surface of the base insulating layer, the plurality of first branch line patterns extending between the first main line pattern and the plurality of first conductive pads; and a first insulating layer on the first surface of the base insulating layer, the first insulating layer including a plurality of first through grooves. Each of the plurality of first branch line patterns includes a first cut portion, a first segment and a second segment separated from each other by the first cut portion, and the plurality of first through grooves overlap first cut portions.

Abstract: Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include memory strings with a conductor channel shell and a low dielectric constant central region. In one example, memory devices, systems and methods include memory strings with a conductor channel shell and a hollow central region.

Abstract: At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.

Abstract: A method of manufacturing a thin-film transistor TFT with a metal cross over structure includes: etching the first metal layer through a first patterned photoresist to form a gate electrode and a lower metal pattern; anodizing the first metal layer; removing the first patterned photoresist; depositing a semiconductor layer on the etched first metal layer; depositing a second metal layer on the semiconductor layer; anodizing the second metal layer through a second patterned photoresist to form an anodized segment; and etching the second metal layer through the second patterned photoresist to form first and second upper metal patterns, in which the first upper metal pattern has drain and source electrodes connected to the anodized segment and electrically isolated from each other by the anodized segment, and the second upper metal pattern forms a metal cross over structure with the lower metal pattern.

Abstract: A non-volatile memory device comprises a memory cell region including a plurality of cell transistors, a first-type semiconductor substrate including a peripheral circuit region including circuits configured to control the plurality of cell transistors, and a plurality of pass transistors on the peripheral circuit region of the semiconductor substrate, wherein the peripheral circuit region includes a first region and a second region which are doped to a depth at an upper portion of the semiconductor substrate while being insulated from each other by an implant region, wherein the first region is a second type different from the first type, and includes a first doped region, and a first well region beneath the first doped region and configured to have a higher doping concentration than the first doped region, wherein the second region is the first type, and includes a second doped region, and a second well region beneath the second doped region and configured to have a higher doping concentration than the seco

Abstract: A display panel, a display screen, and a manufacturing method of a display screen are provided. The display panel includes a light-emitting assembly, a driving assembly, multiple first conductive members, and multiple second conductive members. The light-emitting assembly includes multiple light-emitting units, where each of the multiple light-emitting units includes a first electrode and a second electrode spaced apart from the first electrode, and the first electrode surrounds the second electrode. The driving assembly includes multiple driving units, where one of the multiple driving units is disposed in correspondence with one of the multiple light-emitting units, and different driving units correspond to different light-emitting units. Each of the multiple driving units includes a third electrode and a fourth electrode spaced apart from the third electrode, and the third electrode surrounds the fourth electrode.

Abstract: A display device includes a display panel including first and second areas each including a plurality of element areas and a peripheral area, a first light blocking pattern disposed on the display panel and overlapping the second area, and a second light blocking pattern disposed on the display panel, overlapping the second area, and disposed farther away from the display panel than the first light blocking pattern. Each of first, second and third element areas of the second area includes a plurality of light emitting areas and a non-light-emitting area disposed between the light emitting areas, the first light blocking pattern overlaps the non-light-emitting area of the second element area, and the second light blocking pattern overlaps the non-light-emitting area of the first element area and the non-light-emitting area of the third element area.

Abstract: A method of fabricating a semiconductor device may use, as an internal contact region, a region in which a memory cell region overlaps a core and/or peripheral region by bonding at least a partial region of the memory cell region to at least a partial region of the core and/or peripheral region by a direct bonding method, and thus, even when an additional contact region is secured outside the memory cell region to be smaller, signals and/or power may be transmitted between the memory cell region and the core and/or peripheral region.

Abstract: A display device includes: a circuit substrate including a plurality of pixel circuit units and a plurality of pads on a first surface thereof, the plurality of pads being electrically connected to the pixel circuit units; a display substrate on the circuit substrate and including a plurality of light emitting elements electrically connected to the pixel circuit units; a circuit board on the circuit substrate and including a plurality of circuit board pads electrically connected to the pads; a heat dissipation substrate on a second surface of the circuit substrate, the second surface being opposite to the first surface; and a cover substrate on the heat dissipation substrate and partially overlapping the circuit substrate and the circuit board. Each of the plurality of pads is in direct contact with at least one of the plurality of circuit board pads.

Abstract: A display panel and a display device are provided. The display device includes a display panel. The display panel includes a photosensitive area, a transition area, and a display area. The display panel further includes a base substrate, a drive circuit layer, and a light-emitting layer. By disconnecting the light-emitting layer in an opening on the base substrate, a lateral intrusion path from a through-hole in the photosensitive area to the display area for water and oxygen can be blocked. Therefore, poor display such as black hole spots caused by water and oxygen intrusion can be solved.

Abstract: A semiconductor module includes a substrate, a semiconductor element and a heat sink plate. The substrate is included in a circuit board. The semiconductor element is disposed at the heat sink plate inside the substrate. A fluid is sealed inside the heat sink plate.

Abstract: An integrated circuit includes an epitaxial layer over a semiconductor substrate. The epitaxial layer has a first conductivity type and a top surface. First, second and third trenches are located in the epitaxial layer. The trenches respectively include first, second and third field plates. First and second body members are located within the epitaxial layer and have a different second conductivity type. The first body member is located between the first and second trenches, and the second body member is located between the second and third trenches. The first body member extends a first distance between the top surface and the substrate, and the second body member extends a lesser second distance between the top surface and the substrate.