Patents Examined by Timothy J. Dole
  • Patent number: 10243443
    Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: March 26, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Jun Zhao, Brandon Day
  • Patent number: 10243467
    Abstract: The subject matter of this document can be embodied in a method that includes a voltage regulator having an input terminal and an output terminal. The voltage regulator includes a high-side transistor between the input terminal and an intermediate terminal, and a low-side transistor between the intermediate terminal and ground. The voltage regulator includes a low-side driver circuit including a capacitor and an inverter. The output of the inverter is connected to the gate of the low-side transistor. The voltage regulator also includes a controller that drives the high-side and low-side transistors to alternately couple the intermediate terminal to the input terminal and ground. The controller is configured to drive the low-side transistor by controlling the inverter. The voltage regulator further includes a switch coupled to the low-side driver circuit. The switch is configured to block charge leakage out of the capacitor during an off state of the low-side transistor.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: March 26, 2019
    Assignee: Volterra Semiconductor LLC
    Inventors: Chiteh Chiang, Marco A. Zuniga, Yang Lu
  • Patent number: 10243462
    Abstract: Various methods and devices that involve electronic circuits are disclosed. A disclosed method includes buffering an input signal using a first buffer. The first buffer is powered by a supply voltage and a reference voltage. The method also includes buffering the input signal using a second buffer. The second buffer is powered by the reference voltage and a ground voltage. The method also includes level shifting a first buffer output signal of the first buffer to a voltage range using a first level shifter, and level shifting a second buffer output signal of the second buffer to the voltage range using a second level shifter. The voltage range is larger than a delta between the supply voltage and the reference voltage. The reference voltage is greater than one quarter of the supply voltage and less than three quarters of the supply voltage.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: March 26, 2019
    Assignee: Silanna Asia Pte Ltd
    Inventor: Trevor M. Newlin
  • Patent number: 10243483
    Abstract: A power conversion device includes a filter capacitor to accumulate therein DC power, and an element unit including a semiconductor element module to perform a switching operation for converting the DC power accumulated in the filter capacitor into AC power. The filter capacitor and the element unit are disposed in the same casing. A heat-resistant capacitor having a higher heat resistance than the filter capacitor is connected to the element portion by using a connection conductor, and is also connected to a busbar different from the connection conductor. An electrical connection between the filter capacitor and the element unit is established through the busbar, the connection conductor, and the heat-resistant capacitor.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: March 26, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hirokazu Takabayashi, Yukio Nakashima
  • Patent number: 10243465
    Abstract: Some apparatus and associated methods relate to a buck-derived switched mode power supply with constant on-time and configured to substantially maintain a steady-state average switch period in a time interval between a start of a load transient and the time when the inductor current returns to a steady state. In an illustrative example, the time interval may include a first and a second predetermined number of cycles after the start of the load transient. The switch period may be modulated, for example, by an amount calculated to supply a change in additional energy demand in the first number of cycles and an opposite amount in the subsequent second number of cycles calculated to maintain the average steady-state switch period over the time interval. In various examples, maintaining average switching period with constant on-time may minimize transient response times without sacrificing stability and without the need for complex compensation networks.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: March 26, 2019
    Assignee: Alpha and Omega Semiconductor (Cayman) Limited
    Inventor: Chris M. Young
  • Patent number: 10243476
    Abstract: A power conversion device includes a switching circuit and a switch driver. The switching circuit includes a plurality of switching elements including a first switching element and a second switching element that are electrically coupled in series. The switch driver includes a first, a second, and a third switching pattern controller. The first switching pattern controller executes a first switching pattern which is set such that a current in a reverse direction flows through the first switching element and the second switching element is off. The second switching pattern controller executes a second switching pattern which is set such that a direction of the current flowing through the first switching element is switched to a forward direction from the reverse direction. The third switching pattern controller executes a third switching pattern which is set such that the first switching element is off and the second switching element is on.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 26, 2019
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Tetsumi Narita, Sadao Ishii, Takashi Kuboyama, Shinsuke Kajiwara
  • Patent number: 10234883
    Abstract: A voltage regulator circuit is disclosed. In one embodiment, a low drop-out (LDO) voltage regulator includes a voltage loop and a current loop. The current loop includes a source follower coupled to an output node of the LDO voltage regulator, the source follower being implemented with a PMOS transistor. The current loop also includes a current mirror coupled between a first branch of the current loop and a second branch of the current loop. The source follower is implemented in the second branch of the current loop. The voltage loop includes an amplifier circuit having an inverting input coupled to the output node, and a non-inverting input coupled to receive a reference voltage. The output of the amplifier is coupled to the gate terminal of the PMOS transistor of the current mirror.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: March 19, 2019
    Assignee: Apple Inc.
    Inventors: Dingkun Du, Jay B. Fletcher
  • Patent number: 10234880
    Abstract: The present disclosure discloses an active clamp circuit for a power semiconductor switch and a power converter using the same. The active clamp circuit includes: a discharging circuit, a first terminal of the discharging circuit being electrically connected to a collector of the power semiconductor switch; an unidirectional blocking circuit; a first voltage regulator diode connected in series with the unidirectional blocking circuit to form a series branch, a first terminal of the series branch being electrically connected to the collector of the power semiconductor switch; and a resistance-capacitance RC circuit, a first terminal of the RC circuit, a second terminal of the discharging circuit, and a second terminal of the serial circuit being electrically connected, a second terminal of the RC circuit being electrically coupled to a gate of the power semiconductor switch.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: March 19, 2019
    Assignee: Delta Electronics (Shanghai) CO., LTD
    Inventors: Wuying Li, Xin Wang, Lifeng Qiao, Chenyu Lai, Jianping Ying
  • Patent number: 10236680
    Abstract: In a control circuit of a switching power supply device, a switching cycle generating unit controls a switching cycle in keeping with a signal of an error voltage detected on a secondary side to stabilize an output voltage at a target value. A load current for overload protection is estimated based on a value produced by integrating a resonant current at an integrator and averaging at an averaging calculation unit. Here, although the switching cycle is correlated to the ratio of input/output voltages, the switching cycle is negatively correlated to the input voltage because the output voltage is controlled so as to be constant. A correction calculating unit uses a signal that decides the switching cycle as information corresponding to the input voltage, which eliminates the need to detect the input voltage.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: March 19, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tetsuya Kawashima
  • Patent number: 10224813
    Abstract: A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. A load current at the output of the modified buck regulator circuit is measured. A capacitor current associated with a capacitor that is coupled to a downstream terminal of the inductor is continuously sensed and the pull-up switching mechanism is disabled when the capacitor current is greater than a sum of the load current and an enabling current value.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: March 5, 2019
    Assignee: NVIDIA Corporation
    Inventors: Sudhir Shrikantha Kudva, William J. Dally, Thomas Hastings Greer, III, Carl Thomas Gray
  • Patent number: 10224804
    Abstract: A driving circuit includes a power switch driver and a plurality of current-limiting circuits. The power switch driver is configured to output a driving signal according to a switching signal. Each of the current-limiting circuits has an input terminal electrically coupled to a corresponding one of output terminals of the power switch driver respectively. Output terminals of the current-limiting circuits are electrically coupled to a control terminal of a power switch. The power switch driver is configured to selectively output the driving signal to one of a plurality of output terminals according to a load state of the power switch, such that the driving signal is outputted to the control terminal of the power switch via one of the current-limiting circuits.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: March 5, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Lei-Chung Hsing, Kuo-Ying Liu
  • Patent number: 10224802
    Abstract: A multi-stage switching power supply includes a first DC-DC power converter, a second DC-DC power converter and a control circuit. The control circuit is coupled to the DC-DC power converters for providing a first control signal to the first DC-DC power converter and a second control signal to the second DC-DC power converter. The control circuit is configured to vary a duty cycle of the first control signal to regulate an output voltage of the power supply, maintain a frequency of the second control signal at a fixed frequency, and in response to the duty cycle of the first control signal reaching a duty cycle threshold or an input voltage of the first DC-DC power converter reaching a voltage threshold, vary a frequency of the second control signal to regulate the output voltage of the power supply. Other example power supplies, control circuits, etc. are also disclosed.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: March 5, 2019
    Assignee: Astec International Limited
    Inventor: Sudhakarababu Chakkirala
  • Patent number: 10224818
    Abstract: Provided are a control unit having a first control state in which a first switching element and a second switching element of one series circuit are turned on and a second control state to which the first control state shifts and in which a first switching element of another series circuit and the second switching element of the one series circuit are turned on, and executing control so as to apply predetermined voltage to the other side of a transformer during a predetermined time period during the first control state before shifting to the second control state.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: March 5, 2019
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Wiring Systems, Ltd., AutoNetworks Technologies, Ltd.
    Inventors: Masayoshi Hirota, Keiji Tashiro
  • Patent number: 10224807
    Abstract: A power conversion apparatus and a power conversion method are provided for heat treatment. The power conversion apparatus includes a rectifier configured to convert AC power to DC power, a smoothing filter configured to control the DC power received from the rectifier to be constant, an inverter configured to convert the DC power received from the smoothing filer into high-frequency power by turning the DC power on and off using a switching device made of an SiC semiconductor, and a control unit configured to control the rectifier and the inverter. A rating of output power output from the inverter is determined in accordance with a frequency of the high-frequency power output from the inverter, a current-applying time, and an operation rate obtained by dividing the current-applying time by a sum of the current-applying time and a non-current-applying time.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: March 5, 2019
    Assignee: NETUREN CO., LTD.
    Inventors: Takahiko Kanai, Masato Sugimoto, Haruki Yoshida
  • Patent number: 10218254
    Abstract: Embodiments of a switched-mode power supply and a method for operating a switched-mode power supply involve synchronizing a phase and frequency of an asynchronous controller of the switched-mode power supply with a clock signal of a synchronous controller of the switched-mode power supply while the asynchronous controller is in control of a power stage of the switched-mode power supply, concurrent with synchronizing the phase and frequency of the asynchronous controller with the clock signal of the synchronous controller, presetting a state variable of the synchronous controller while the asynchronous controller is in control of the power stage of the switched-mode power supply, and switching control of the power stage from the asynchronous controller to the synchronous controller after the phase and frequency of the asynchronous controller are synchronized with the clock signal of the synchronous controller and after the state variable of the synchronous controller is preset.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: February 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Percy Edgard Neyra, John Pigott, John Ryan Goodfellow, Kyle James Wollschlager, Ondrej Pauk, Raviraj Dattatraya Vader
  • Patent number: 10218284
    Abstract: A DC-DC power converter includes an input, an output, a transformer, and a primary FET coupled to selectively conduct current though a primary winding of the transformer. The primary FET includes a drain that experiences multiple resonant voltage valleys during each dead-time period of the converter. The converter further includes a synchronous rectifier coupled to selectively conduct current through a secondary winding of the transformer, and a control circuit. The control circuit is configured to operate the primary FET in a valley skipping mode by turning on the primary FET during a second or subsequent one of the multiple resonant voltage valleys, and to allow a negative current in the secondary winding of the transformer before turning off the synchronous rectifier during one or more of the multiple resonant voltage valleys. Methods of operating DC-DC power converters are also disclosed.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: February 26, 2019
    Assignee: Astec International Limited
    Inventors: Antonio Remetio SoleƱo, Kenneth Rivera Lazo
  • Patent number: 10218279
    Abstract: Controllers and methods for controlling power supplies are disclosed herein. An example of a controller includes comparison circuitry operable to compare a switching frequency of the controller to a predetermined switching frequency. Voltage measuring circuitry is operable to measure the output voltage of the power supply. Circuitry is operable to disable at least one component in the power supply in response to the switching frequency being less than the predetermined switching frequency and the output voltage being greater than a predetermined output voltage.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: February 26, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Rosario Stracquadaini, Antonio Amoroso, Salvatore Giombanco
  • Patent number: 10217559
    Abstract: A power factor correction (PFC) power converter, particularly of a multiphase totem-pole or other topology presenting a switching bridge that can potentially provide bi-directional power transfer control, reduces a nominal switching frequency and achieves zero voltage switching over an increased portion of a half line cycle by providing positive or inverse coupling of inductors in an inductor structure that can be formed of a multi-layer printed circuit board such that at least three different inductances are presented during each half line cycle period; allowing increased switching frequency and simplifying EMI filtering arrangements. Parasitic capacitances can be balanced with additional coupled windings to reduce differential mode and common mode noise. The PFC power converter is particularly applicable to provide bi-directional power control from an on-board battery charger in an electrically powered vehicle.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: February 26, 2019
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Yuchen Yang, Mingkai Mu, Fred C. Lee, Qiang Li
  • Patent number: 10218255
    Abstract: A power converter which converts between a first current at a first voltage provided at a first node and a second current at a second voltage provided at a second node. The power converter has a flying capacitor, an inductor and five switches. Furthermore, the power converter has a control unit to control four switches during steady state operation within a sequence of different operations states, in order to set the second voltage or the second current to a target level. In addition, the control unit detects the occurrence of a load transient at the second node, and in reaction to detecting occurrence of a load transient, to at least partially close a bypass switch, in order to provide additional current from the flying capacitor to the second node or in order to divert current from the inductor towards the reference potential.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: February 26, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Holger Petersen
  • Patent number: 10211733
    Abstract: An apparatus that includes a resonant DC-DC converter with switching frequencies based on stray inductances of the physical components used to construct the apparatus. This results in a relatively high efficiency and high density DC-DC converter that, in some implementations, does not require a discrete inductor component.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: February 19, 2019
    Assignee: Google LLC
    Inventors: Shuai Jiang, Xin Li