Patents Examined by Todd E. DeBoer
  • Patent number: 5295035
    Abstract: A plurality of switches are arranged in a distributive manner on a distribution line connected to a power distribution substation, and the switches are connected respectively to fault detection relays. Each of the fault detection relays includes a memory circuit for holding a voltage resulting from a ground fault on the distribution line, and the time constants of the memory circuits are set to become greater in an ascending order from the power outlet of the distribution line. Owing to difference in the time constants, there are differences in the holding voltage of the memory circuits resulting from intermittent ground faults which precede a full ground fault. By utilizing the differences of holding voltage, the switch closest to the full ground fault as viewed from the power outlet of the distribution line is the first to open the circuit.
    Type: Grant
    Filed: October 15, 1992
    Date of Patent: March 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Nishijima, Terunobu Miyazaki, Mitsuru Nakamura
  • Patent number: 5274525
    Abstract: A data-recording machine is protected against temperature overshoots by a device (12) for protecting electrical lines comprising two blister-type thermosensitive elements (10C, 10F) which control series-connected electric contacts (7C, 7F) so as to close the electrical line outside the normal operating range and to prohibit operation even after a return to said range.
    Type: Grant
    Filed: December 24, 1992
    Date of Patent: December 28, 1993
    Assignee: Secap
    Inventor: Germain Le Meur
  • Patent number: 5272585
    Abstract: A system to stop or reduce electrical short circuits in homes. This invention is a refinement of the breaker box function. A computer controls breaker switching in the breaker box. A sum of the theoretical power consumption in a given breaker helps the computer determine if an electrical short is present. Outlet modules attach themselves to the home's standard electrical outlet (socket). They tell the computer when a new load (finite resistance) is to change the old theoretical breaker limit. The computer adjusts the theoretical limit to a new limit (never above maximum permitted) and allows the power drain on the breaker.
    Type: Grant
    Filed: June 27, 1991
    Date of Patent: December 21, 1993
    Inventor: John H. Gibbs
  • Patent number: 5272586
    Abstract: Proper operation of an integrated circuit (IC) is destroyed when voltage exceeding a predetermined level is applied to the circuit. A switching MOS transistor utilizing floating gate technology is used to shunt electrostatic discharge (ESD) away from the IC. The switching MOS transistor is adapted to switch at a voltage level which is greater than the normal operating voltage for the IC but less than the predetermined voltage level characteristic of the IC. A first switching MOS transistor provides a path for a positive ESD stress by having its control gate and drain connected to the line of interest and its source connected to a reference point. Thus, when a positive voltage spike greater than the circuit voltages occurs on the line of interest, the first switching MOS transistor shunts the ESD stress away from the line of interest.
    Type: Grant
    Filed: January 29, 1991
    Date of Patent: December 21, 1993
    Assignee: National Semiconductor Corporation
    Inventor: Yung-Chau Yen
  • Patent number: 5270898
    Abstract: A hybrid monolithic IC that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology, The shortcomings of utilizing CMOS technology for linear or analog circuitry is overcome by the implementation of the IC to provide a monolithic IC that is relatively less expensive than using multiple ICs or a single IC fabricated from biCMOS technology.
    Type: Grant
    Filed: December 28, 1990
    Date of Patent: December 14, 1993
    Assignee: Westinghouse Electric Corp.
    Inventors: Robert T. Elms, John C. Schlotterer, Joseph C. Engel, William J. Murphy
  • Patent number: 5267116
    Abstract: What is described is an electrical safety socket arrangement, comprising live and neutral socket inlets, switches connecting the live and neutral socket inlets to respective live and neutral socket outlets, and a circuit control which operates the switches when live and neutral supply feeders are connected to the socket inlets and a circuit is completed such that the circuit is completed by the connection of an appliance across the live and neutral socket outlets.
    Type: Grant
    Filed: January 26, 1993
    Date of Patent: November 30, 1993
    Assignee: Aditan, Inc.
    Inventor: Shimon Avitan
  • Patent number: 5267118
    Abstract: Circuitry (46, or 28 and 70) for thermally separating a power integrated circuit device (12) from a plurality of other such devices (14, 16, and 18) on a common power integrated circuit chip (10) operate when the device (12) reaches a thermal shutdown temperature setpoint (56) with an output current at a predetermined current limit (54). The circuitry 46, or 28 and 70 switches the output current to a shutdown current level (57) until the device (12) reaches a predetermined lower temperature setpoint (58). Circuitry (46, or 28 and 70) restores the output current level to the predetermined current limit only after the device (12) reaches both the predetermined lower temperature setpoint (58) and a predetermined circuit setpoint (62 or 74). The circuit setpoint (62 or 74) associates with the temperature of the device (12) and may be either a yet lower temperature setpoint (62) or a specified time delay (74).
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: November 30, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Kenneth G. Buss, David R. Cotton
  • Patent number: 5267117
    Abstract: The present invention provides a simple, reliable, comprehensive electrical phase and amplitude fault detection and response system. The system includes means for detecting any of various electrical faults, such as impermissibly low voltage levels, impermissibly high voltage levels, phase dropouts, single-phasing, phase reversals, and/or total power loss. Further, the invention provides both fault detection and response customized to the plant equipment, providing power cut-off an appropriate time after a given fault is detected, and preventing premature power restoration when the line power has not been fully returned to normal. The system provides the fault detection and response functions without the need for electrical power of its own, avoiding dependence on line voltage, batteries or back-up generators. This functioning independent of the presence of electrical power is enabled through use of a pneumatic arrangement for interrupting power to plant equipment.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: November 30, 1993
    Assignee: Johnson & Wilson Co. Sales and Service, Inc.
    Inventor: Clifford B. Moore
  • Patent number: 5257155
    Abstract: A protection circuit for providing short-circuit protection for a field effect transistor has been provided. The protection circuit senses when the voltage appearing at the gate and drain electrodes of the field effect transistor are both at a logic high voltage level, and responds to turn off the field effect transistor thereby preventing damage to the field effect transistor.
    Type: Grant
    Filed: August 23, 1991
    Date of Patent: October 26, 1993
    Assignee: Motorola, Inc.
    Inventors: Stephen P. Robb, Robert E. Rutter
  • Patent number: 5255146
    Abstract: A switching element is connected to an integrated circuit for shunting an ESD pulse away from the integrated circuit features. A plurality of detection circuits responsive to typical ESD waveform characteristics provide logical control of the switching means. In the preferred embodiment, a NAND gate drives the switching element. The first input to the NAND gate is a first RC network having a first time constant that exceeds the characteristic rise time of the typical ESD pulse, but not the characteristic duration of the typical ESD pulse. The second input to the NAND gate is a feedback loop from the NAND gate output. The feedback loop includes a second RC network having a second time constant that exceeds the duration of a noise pulse, a third RC network having a third time constant that approximates the characteristic duration of the typical ESD pulse, and an inverter between the second and third RC networks.
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: October 19, 1993
    Assignees: National Semiconductor Corporation, National Semiconductor Corporation
    Inventor: William E. Miller
  • Patent number: 5255149
    Abstract: According to this invention, in a temperature abnormality detector, an electronic apparatus can be continuously operated without halt, a failure of a sensor can be reliably detected, and power supply is interrupted to protect the electronic apparatus when the temperature of the electronic apparatus really reaches a high temperature. In addition, a highly reliable electronic apparatus which is not halted by erroneous detection can be provided, and repairing of the apparatus can be completed within a short time. Even when the apparatus fails, it can be easily restored.The detector includes a plurality of temperature sensors arranged on an electronic part, a switching circuit for receiving output signals from the temperature sensors, a converting circuit for converting the output signals from the temperature sensors into temperature values, a microprocessor, output circuits of the microprocessor, and a ROM for storing a program for operating the microprocessor.
    Type: Grant
    Filed: February 19, 1992
    Date of Patent: October 19, 1993
    Assignee: NEC Corporation
    Inventor: Yoichi Matsuo
  • Patent number: 5250508
    Abstract: The invention relates to superconductor current-limiting apparatus of the type having a magnetic core around which firstly a superconductor component is disposed, followed by an electric coil made of non-superconducting material, the apparatus being designed to be inserted in a line to be protected (L), the assembly constituted by the magnetic core (6A, 6B), the superconductor component (3A, 3B) and the electric coil (2A, 2B) forming a current-limiting unit which is connected in the line to be protected in series with a circuit-breaker.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: October 5, 1993
    Assignee: Gel Alsthom SA
    Inventor: Van Doan Pham
  • Patent number: 5251092
    Abstract: A power receptacle assembly includes a plurality of AC snap receptacles each having a base containing three insulation displacement connectors and each electrically connected to a female receptacle connector element. A snap-on retainer forces three insulated power conductors into the three insulation displacement connectors causing knife blade edges thereof to displace insulation and electrically connect inner conductor elements of the insulated power conductors. The snap-on retainer of one of the AC snap receptacles also receives three slotted male tab friction fit connectors to electrically connect them to the three power conductors, respectively. The three slotted male tab friction fit connectors are connected to a printed circuit board that interacts with the three power conductors. Each slotted male tab friction fit connector has an elongated slot separating two bifurcated prongs, outer edges of the prongs frictionally engaging inner surfaces of the insulation displacement connectors.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: October 5, 1993
    Assignee: Protek Devices, LP
    Inventors: Peter J. Brady, Carol Miller, David R. Powell
  • Patent number: 5247419
    Abstract: A low voltage switchgear with a single or multipole contact arrangement (1) with a corresponding number of fixed contacts (2) and movable contacts (3), a magnet armature (4) that moves the movable contacts (3), at least one magnet coil (5) that is energized by direct current and a setpoint switch release (9).
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: September 21, 1993
    Inventor: Ernst H. Grundmann
  • Patent number: 5245500
    Abstract: The problem of noise and undesirable oscillations on a DC bus (46) are minimized using a transient suppressor (50) in connection with a 270 volt DC power system (10). The power system (10) includes an excited generator (17) developing AC power rectified to power the DC bus (46) for connection to loads (36). The transient suppressor (50) comprises a resistor (52) and a switch (54) connecting the resistor (52) across the DC bus (46). A control (60) senses bus voltage and load current and controls the switch (54) in response thereto. Indeed, the switch (54) is controlled in one of two modes of operation. The first mode comprises voltage control in which the switch (54) is turned on with a single pulse to reduce over voltage conditions, without introducing EMI noise. The second mode comprises pulse width modulating the switch (54) under low current conditions to reduce low frequency oscillations on the DC bus (46).
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: September 14, 1993
    Assignee: Sundstrand Corporation
    Inventor: Gregory I. Rozman
  • Patent number: 5245498
    Abstract: A device for detecting and isolating a downed conductor in a three-phase four-wire multi-grounded distribution system cooperates with a power supply protective device if the device has a breaking capacity less than the maximum prospective short-circuit current of the distribution line, and the device is installed at a lateral of the distribution line. The device comprises a current detecting device, a high-pass filter, a band-pass filter, two arcing ground fault current-detecting circuits, a first overcurrent-detecting circuit that delivers an output when the output current form the current detecting device exceeds a predetermined value, a second overcurrent-detecting circuit that detects an overcurrent exceeding the breaking capacity of the device which has a breaking capacity less than the maximum prospective short-circuit current of the distribution line, a no-voltage detecting circuit for sensing that the distribution line is not electrically charged, and a trip mechanism.
    Type: Grant
    Filed: May 20, 1991
    Date of Patent: September 14, 1993
    Assignee: Togami Electric Mfg. Co., Ltd.
    Inventors: Yamato Uchida, Masami Yokoo, Shiro Sasaki, Mamoru Kishikawa
  • Patent number: 5245499
    Abstract: A protection device against overvoltages liable to occur between two supply terminals (A, B) comprises between the supply terminals, an avalanche triggered thyristor (6) having a determined break-over voltage (V.sub.BO) This system further comprises a zener diode (4) in parallel and reversely connected with the thyristor; the diode is selected so that its avalanche voltage (V.sub.BR) is lower than the break-over voltage of the thyristor and gets higher only for overvoltages having a higher duration or amplitude than a predetermined threshold.
    Type: Grant
    Filed: July 12, 1991
    Date of Patent: September 14, 1993
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Albert Senes
  • Patent number: 5243488
    Abstract: A circuit for protecting lines such as telephone lines against positive or negative overvoltages having respective determined minimum values (+V1 and -V2). Between a common point (C) and a first conductor (A), a second conductor (B) and ground (M), are inserted first, second and third protection components, respectively constituted by a diode (D1, D2, D3) in anti-parallel with a thyristor (T1, T2, T3), the anode of which is connected to the common point and the gate of which receives a polarization signal. The first and second thyristors are of the cathode-gate type and the third (T1) of the anode-gate type. Each of the first and second thyristors is associated with a transistor (TR2, TR3). The emitter of each transistor is connected to the gate of the corresponding thyristor and the collector of each transistor is connected to a second common point (D) connected to the gate of the third thyristor.
    Type: Grant
    Filed: December 6, 1991
    Date of Patent: September 7, 1993
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventors: Eric Bernier, Robert Pezzani
  • Patent number: 5243224
    Abstract: A jogging electric current generator which comprises a drum-shaped rotatable exercising unit operatively connected to an electric current generator. The drum-shaped unit is constructed so that a jogger can enter the unit and jog for purposes of exercising and also simultaneously therewith generate an electric current through operation of the generator. The jogging generator may be located closely adjacent to a dwelling structure so that one may leave a dwelling structure and immediately enter the jogging generator. The drum-shaped unit may also be constructed so as to operate as a water vane with water being moved during the jogging activity. A hand-held control unit may also be employed by the user of the apparatus.
    Type: Grant
    Filed: February 3, 1992
    Date of Patent: September 7, 1993
    Inventor: Lee Tagney, Jr.
  • Patent number: 5243489
    Abstract: A protection circuit for three-phase power systems incorporates overcurrent protection along with phase loss and phase imbalance by means of common current sensing transformers. The phase loss and phase imbalance are determined by a pairwise comparison algorithm.
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: September 7, 1993
    Assignee: General Electric Company
    Inventor: John J. Dougherty