Abstract: Techniques for managing metadata at a control device involve: determining, from a cache page corresponding to user data, a first region for storing raw metadata of the user data, the raw metadata including address information for storing the user data in a storage system; in response to the user data being modified, determining updated metadata of the modified user data to update the raw metadata in the first region; and copying the updated metadata to a high-speed memory shared by the control device and another control device. Accordingly, the techniques are capable of reducing the usage frequency of the high-speed memory, thereby extending the service life of the high-speed memory and reducing cost.

Abstract: A memory controller may include: a map data processor configured to receive original map data segments from a memory device and generate a mode signal; an original map data storage configured to sequentially store the original map data segments in source storage areas corresponding to source addresses; a converted map data storage configured to store the original map data segments in target storage areas corresponding to target addresses; and a map data converter configured to control the converted map data storage such that, when any one original map data segment is stored in a first target storage area corresponding to a first target address, an original map data segment subsequent to the any one original map data segment is stored in a second target storage area corresponding to a second target address obtained by adding a predetermined offset to the first target address.

Abstract: A data storage device includes a controller including a flash translation layer (FTL) for controlling an operation of a nonvolatile memory device. The FTL may monitor a first read operation on the plurality of data storage regions, collect first read operation information of a first subset of data storage regions on which the first read operation is performed, the first read operation information including read counts of the first subset of data storage regions on which the first read operation is performed, and information of the first subset of data storage regions on whether soft decision has been performed on the data storage regions, change a garbage collection (GC) threshold value based on the collected first read operation information, and control the nonvolatile memory device to perform GC on the plurality of data storage regions based on the changed GC threshold value.

Abstract: Methods and systems for backing up data to a target device are described. According to some embodiments, the method receives a first set of data packets for backup, where the first set of data packets includes a multiplicity of data chunks. The method further captures footprints of the first set of data packets in a cache disk array. In response to receiving an acknowledgement from the cache disk array indicating the footprints have been captured, the method further initiates a write operation to write each data chunk of the first set of data packets to the target device. In response to receiving an acknowledgement indicating the data chunk is successfully written, the method further flushes the respective footprint of the data chunk from the cache disk array.

Abstract: A method for converting a redundant array of independent disks (RAID) to a more robust RAID level is disclosed. Such a method identifies, in a data storage environment, higher risk storage drives having a failure risk above a first threshold. The method determines a number of the higher risk storage drives that are contained within a RAID array of the data storage environment. The method determines whether the number exceeds a second threshold. The method also determines whether a destage rate associated with the RAID array is below a third threshold. In the event the number exceeds the second threshold and the destage rate is below the third threshold, the method converts the RAID array to a more robust RAID level. A corresponding system and computer program product are also disclosed.

Abstract: Embodiments described herein provide a storage management system. During operation, the system receives information indicating sets of pending load of a plurality of storage devices from one or more storage nodes of a distributed storage system. The set of pending load of a respective storage device includes a set of load from host operations and a set of load from background operations on the storage device. The system can receive a request for a target resource associated with a disk operation from a client node of the distributed storage system. The system then selects, from the plurality of storage devices, a storage device with the smallest set of pending load based on the sets of pending load as the target resource and sends the target resource to the client node.

Abstract: A memory system includes a memory device including a plurality of normal memory blocks and a plurality of dummy memory blocks; and a controller suitable for controlling the memory device, wherein the controller includes: a memory suitable for temporarily storing user data corresponding to a write command; and a processor suitable for performing a one-shot program operation of programming the user data into an open memory block in the memory device by comparing a size of the user data with a reference size for the one-shot program operation.

Abstract: Facilitating page table entry (PTE) maintenance in processor-based devices is disclosed. In this regard, a processor-based device includes processing elements (PEs) configured to support two new coherence states: walker-readable (W) and modified walker accessible (MW). The W coherence state indicates that read access to a corresponding coherence granule by hardware table walkers (HTWs) is permitted, but all write operations and all read operations by non-HTW agents are disallowed. The MW coherence state indicates that cached copies of the coherence granule visible only to HTWs may exist in other caches. In some embodiments, each PE is also configured to support a special page table entry (SP-PTE) field store instruction for modifying SP-PTE fields of a PTE, indicating to the PE's local cache that the corresponding coherence granule should transition to the MW state, and indicating to remote local caches that copies of the coherence granule should update their coherence state.

Abstract: One embodiment facilitates data placement. During operation, the system monitors a condition of a plurality of blocks of a non-volatile memory. The system determines that a condition of a first block falls below a first predetermined threshold, wherein the first block has a first capacity. The system formats the first block to obtain a second block which has a second capacity, wherein the second capacity is less than the first capacity.

Abstract: A data alignment (DA) computing device is communicatively coupled to a first and a second data storage device. The first data storage device stores an array of partitions including a first subset and a second subset of partitions, and metadata associated with the array that includes a reference pointer for each partition. The DA computing device updates the metadata to remove the reference pointers for the second subset of partitions and thereby remove the second subset from the array, stores a partition table defining the first subset within the first data storage device and the second subset within the second data storage device, stores the metadata associated with the array within the second data storage device, updates the second data storage device to include the second subset of partitions, and updates the metadata stored by the data storage devices to link the second subset of partitions to the array.

Abstract: An apparatus includes a first device configured to generate a transaction request targeted to a first address, a switch, coupled to the first device and configured to the route the transaction request, a port coupled to the peripheral switch and the data processing network, and a system memory management unit, coupled to the port. The system memory management unit is configured for receiving an address query for the first address from the peripheral port translating the first address to a second address, accessing attributes of a device associated with the second address and responding to the query. Access validation for the transaction request is confirmed or denied dependent upon the second address and the attributes of the device associated with the second address. The first device may be a peripheral device, the switch may be a peripheral switch and the port may be a peripheral port.

Abstract: The subject matter described herein analyzes an item that is a candidate for admission into or eviction from a cache to determine characteristics of the item. The characteristics include at least one of item content and item source. A score associated with the item is calculated based on the determined characteristics. The item is admitted into, or evicted from, the cache based on the calculated score.

Abstract: Embodiments of the present disclosure provide a computer-implemented method and an apparatus for a storage system. The method comprises: in response to receiving a read request of a first container for data in a storage device, obtaining an identifier associated with the read request; searching for metadata of the read request in a metadata set based on the identifier, the metadata recording addressing information of the read request, the metadata set including metadata of access requests for the storage device during a past period; and in response to finding the metadata of the read request in the metadata set, determining, based on the metadata, a cached page of a second container storing the data; and providing the cached page from the second container to the first container to avoid reading the data from the storage device.

Abstract: A computational device determines whether one or more tasks are waiting for accessing a cache for more than a predetermined amount of time while least recently used (LRU) based replacement of tracks are being performed for the cache via demotion of tracks from a LRU list of tracks corresponding to the cache. In response to determining that one or more tasks are waiting for accessing the cache for more than the predetermined amount of time, in addition to continuing to demote tracks from the LRU list, a plurality of deadlock prevention demotion tasks demote tracks from the cache.

Abstract: The exemplary embodiments provide an in-memory database which uses a non-volatile memory as a primary storage, uses a volatile memory for data which exceeds a predetermined capacity of the non-volatile memory, as a secondary storage, and periodically stores a log file for data stored in the volatile memory in a block device, thereby ensuring a data consistency while overcoming a capacity limit of the non-volatile memory.

Abstract: A storage device includes a first physical space including first nonvolatile memory devices, a second physical space including second nonvolatile memory devices physically isolated from the first nonvolatile memory devices, and a storage controller that fetches a command from an external device and performs an operation corresponding to the command in any one of the first and second physical spaces, based on information included in the fetched command.

Abstract: Check point recovery based on identifying used blocks for block-based backup files is described. At least one data block is identified that is used by a system since a point in time in response to receiving a request to restore the system based on the point in time. At least one data block, corresponding to the identified at least one data block, is recovered from at least one backup file for the system, without reading each data block backed up via the at least one backup file for the system. The system is restored based on the recovered at least one data block.

Abstract: An information handling system may include a resistive memory buffer to supplement a system main memory unit of the information handling system. A processor of the information handling system may map the resistive memory buffer as system memory, along with the system main memory unit. The processor may use the system memory, including the resistive memory buffer and the system main memory unit in executing one or more applications. The resistive memory buffer may improve performance of the information handling system, such as during hibernation and wake-up processes and memory flush processes.

Abstract: The present invention facilitates efficient and effective utilization of storage management features. In one embodiment, a system comprises: a storage component, a memory controller, and a communication link. The storage component stores information. The memory controller controls the storage component. The communication link communicatively couples the storage component and the memory controller. In one embodiment, the communication link communicates storage system management information between the memory storage component and memory controller, and communication of the storage system management information does not interfere with command/address information communication and data information communication.

Abstract: A memory system includes a memory device for storing data; and a memory controller performing a program operation on the memory device by using one of a first program mode and a second program mode. The memory controller counts a number of program operations performed by using the first program mode in which a ratio of dummy data to program data is greater than or equal to a predetermined value; and changes the program mode to the second program mode from the first program mode, when the counted number is greater than or equal to a predetermined number.