Patents Examined by Tremesha S Willis
  • Patent number: 10442945
    Abstract: A conductive ink includes a conductive nano-metal and a graphene dispersion liquid. The graphene dispersion liquid includes a graphene. A lateral size of the graphene is between approximately 0.1 micron and approximately 1 micron. The graphene has a weight percentage with respect to the conductive ink ranging from approximately 0.2 wt % to approximately 0.5 wt %.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: October 15, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Xujie Zhang, Ming Hu, Ming Zhang, Xiaodong Xie, Kongshuo Zhu, Yu Zhu
  • Patent number: 10433419
    Abstract: A conductive component includes a first electrode pattern made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction alternating with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, and includes a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and alternating with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: October 1, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10433431
    Abstract: A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson
  • Patent number: 10424556
    Abstract: An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body having a principal surface. An antenna is formed on the principal surface by applying an electrically conductive coating. An embedded interconnect extends through the package body between the substrate and the principal surface and electrically connects the second antenna terminal to the antenna. Applying an electrically conductive coating to form the antenna is relatively simple thus minimizing the overall package manufacturing cost. Further, the antenna is relatively thin thus minimizing the overall package size.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: September 24, 2019
    Assignee: Amkor Technology, Inc.
    Inventors: Jong Ok Chun, Nozad Karim, Richard Chen, Giuseppe Selli, Michael Kelly
  • Patent number: 10410884
    Abstract: A method of manufacturing a wiring substrate that has a wiring including a through glass via and is formed of a glass substrate includes forming an alteration layer that penetrates the wiring substrate and is patterned, forming the wiring on a front surface of the wiring substrate in which the alteration layer has been formed, and filling an electrode material in a hole formed by removing the alteration layer, thereby forming the through glass via that connects the wiring on the front surface of the wiring substrate and the wiring on a back surface side thereof.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: September 10, 2019
    Assignee: Sony Corporation
    Inventors: Shun Mitarai, Shusaku Yanagawa, Shinji Rokuhara, Shuichi Oka
  • Patent number: 10406890
    Abstract: A circuit assembly (20) provided with: a circuit board (21); a capacitor (30) connected to the circuit board (21); and a circuit casing (20C) configured to house the circuit board (21) and the capacitor (30). The capacitor (30) is provided with: a component body (31) including a pair of connection terminals (32A and 33A) to be fixed to the circuit board (21); and a first fixing unit (41) and a second fixing unit (42) configured to fix the component body (31) to the circuit casing (20C) at both sides. The connection terminals (32A and 33A) are disposed with a fixed line (L1) connecting the first fixing unit (41) and the second fixing unit (42) interposed therebetween, and both of the pair of connection terminals (32A and 33A) protrudes sideward from the component body (31) between a first surface of the circuit board (21) and the circuit casing (20C), and extends toward the circuit board (21).
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: September 10, 2019
    Assignee: MITSUBISHI HEAVY INDUSTRIES THERMAL SYSTEMS, LTD.
    Inventors: Shunsuke Yakushiji, Takayuki Takashige, Hiroto Higuchi
  • Patent number: 10405431
    Abstract: A flexible printed circuit board with reduced ion migration from signal-carrying elements which are coated against corrosion includes an insulating layer, a wiring area, a copper electroplating layer, a nickel electroplating layer, a cover film, and a gold chemical-plating layer. The wiring area is formed on the insulating layer. The copper electroplating layer formed on the wiring area has a first portion and a second portion. The nickel electroplating layer is formed on at least the first portion and exposes sidewalls of the first portion. The cover film is formed on the second portion and fills in gaps of the copper electroplating layer. The gold chemical-plating layer is formed on top surface of the nickel electroplating layer and the sidewalls of the first portion.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 3, 2019
    Assignees: Avary Holding (Shenzhen) CO., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventors: Lei Zhou, Rui-Wu Liu, Qiong Zhou
  • Patent number: 10383210
    Abstract: A high-frequency module includes a branching circuit element, a multilayer substrate, and a shield conductor. The branching circuit element includes transmission and receiving terminals and is disposed on a surface of the multilayer substrate. The shield conductor is disposed on the side of the surface of the multilayer substrate and covers the branching circuit element. The transmission and receiving terminals are disposed with respect to the shield conductor such that a signal in at least a portion of the frequency band of a first signal, which is transmitted from the transmission terminal, is cancelled by a second signal at the receiving terminal.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: August 13, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takanori Uejima
  • Patent number: 10373762
    Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion including dielectric layers and internal electrodes that are alternately stacked and a margin portion disposed on outer surfaces of the active portion; and external electrodes disposed on outer surfaces of the ceramic body. The margin portion includes an inner half adjacent to the active portion and an outer half adjacent to the edge of the ceramic body, and a porosity of the inner half is greater than a porosity of the outer half.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Hee Hong, Chul Seung Lee, Won Seh Lee, Doo Young Kim, Chang Hoon Kim, Jae Yeol Choi, Hyeun Tea Yoon
  • Patent number: 10375828
    Abstract: A printed wiring board includes: a core substrate having a core layer and first and second conductor layers; a first build-up layer including a first insulating layer, an inner first conductor layer, an outermost first insulating layer, and an outermost first conductor layer; and a second build-up layer including a second insulating layer, an inner second conductor layer, an outermost second insulating layer, and an outermost second conductor layer. Each conductor layer includes metal foil, seed layer, and electrolytic plating film, t1/T1, t2/T2, u1/U1 and u2/U2 are smaller than 1, and s1/S1 and s2/S2 are larger than 1, where t1, t2, u1, u2, s1 and s2 are electrolytic plating film thicknesses of the first and second and outermost and inner first and second conductor layers, T1, T2, U1, U2, S1 and S2 are metal foil thicknesses of the first and second and outermost and inner first and second conductor layers.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 6, 2019
    Assignee: IBIDEN CO., LTD.
    Inventors: Takema Adachi, Toshihide Makino, Hidetoshi Noguchi
  • Patent number: 10373724
    Abstract: A power cable may include a first plurality of copper alloy wires having a first percentage of strengthening alloying material and a second plurality of copper alloy wires having a second percentage of strengthening alloying material. One or more of the second plurality of copper alloy wires may abut one or more of the first plurality of copper alloy wires. The second percentage of strengthening alloying material may be different than the first percentage of strengthening alloying material. Computing devices using power cables are also described.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 6, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ivan Andrew McCracken, Joel James Schmelzle, Miki Kashiwa
  • Patent number: 10365693
    Abstract: This disclosure provides a flexible display panel for fingerprint recognition, a display device and a fingerprint recognition method. The flexible display panel for fingerprint recognition includes a flexible substrate base plate and a cover plate provided opposite to each other to form a cell, wherein the flexible substrate base plate includes a first flexible layer; a light shielding layer disposed below the first flexible layer, wherein the light shielding layer has a fingerprint recognition area, and the light shielding layer at the fingerprint recognition area has a plurality of imaging holes arranged in an array; a fingerprint acquisition element disposed on a side of the flexible substrate base plate away from the cover plate and opposite to the fingerprint recognition area; and a functional film layer disposed between the flexible substrate base plate and the cover plate.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: July 30, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Yanliu Sun
  • Patent number: 10356895
    Abstract: A flexible circuit board having enhanced bending durability and a method for preparing same are provided. The method comprises: forming a signal line and a first ground layer on a first dielectric body and forming a second ground layer on a bottom side of the first dielectric body; preparing a second dielectric body; preparing a first bonding sheet and a first protective sheet which is connected to one end of the first bonding sheet or of which one or more parts are overlapped on one end of the first bonding sheet; bonding the second dielectric body onto the first dielectric body by means of the first bonding sheet; forming a via hole such that the first ground layer and the second ground layer are conducted; and cutting in a width direction the second dielectric body placed on the first protective sheet.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: July 16, 2019
    Assignee: GIGALANE CO., LTD.
    Inventors: Sang Pil Kim, Da Yeon Lee, Hwang Sub Koo, Hyun Je Kim, Hee Seok Jung
  • Patent number: 10356908
    Abstract: An electronic component containing substrate includes a substrate, a first electronic component mounted on a main surface of the substrate, and an embedment layer provided on the main surface of the substrate and embedding the first electronic component. The first electronic component is a multilayer ceramic capacitor including a ceramic multilayer body including a layered portion and a first side portion and a second side portion between which the layered portion lies and having two end surfaces opposed to each other and side surfaces connecting the two end surfaces to each other. The first side portion is located between the layered portion and the main surface of the substrate in a direction of thickness which is a direction perpendicular to the main surface of the substrate. The embedment layer is smaller in elastic modulus than the substrate.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 16, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Masaru Takahashi, Choichiro Fujii, Hirobumi Adachi
  • Patent number: 10356916
    Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes an inner layer including at least one insulating layer and wiring parts, and outer layers disposed on opposing sides of the inner layer, the outer layers including reinforcing layers and wiring parts, the reinforcing layers having a greater degree of rigidity than the insulating layer.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: July 16, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Sang Yul Ha, Sung Han Kim, Kyung Ho Lee, Seok Hwan Ahn, Myung Sam Kang
  • Patent number: 10349520
    Abstract: A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: July 9, 2019
    Assignee: CATLAM, LLC
    Inventors: Konstantine Karavakis, Kenneth S. Bahl
  • Patent number: 10342133
    Abstract: According to one embodiment, a display device includes an insulating substrate that includes a first area, a second area adjacent to the first area, and a third area adjacent to the second area, a wiring substrate mounted at a position overlapping the third area on a surface side of the insulating substrate, and a supporting substrate attached to the insulating substrate on the other surface side of the insulating substrate, which is opposite to the surface side, wherein the second area is located between the first area and the third area, and the supporting substrate is provided so as not to overlap the second area.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: July 2, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasushi Kawata, Takumi Sano
  • Patent number: 10342131
    Abstract: The present disclosure relates to a PCB laminated structure, including a first substrate; a second substrate disposed to overlap with the first substrate on the top and bottom; and an interposer assembly provided between the first substrate and the second substrate to allow electromagnetic connection between the first and second substrates, wherein the interposer assembly includes a housing configured to form a closed region along a top surface circumference of the first substrate and a bottom surface circumference of the second substrate to support the first and second substrates; a signal via connected to the first and second substrates, respectively, to transmit electromagnetic signals between the first substrate and the second substrate; and a ground via connected to the housing to serve as a ground, and spaced a set distance from the signal via at one side of the signal via.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 2, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Jaehyuk Kim, Kyungcheol Paek, Chaejoo Lim
  • Patent number: 10342125
    Abstract: A multilayer substrate includes a laminate, signal conductors, and external connection conductors. The signal conductors are at different positions in a lamination direction of the laminate. The external connection conductors are provided on a back surface of the laminate. A first signal conductor is connected at one end to one of the external connection conductors by a first wiring conductor. A second signal conductor is connected at one end to one of the external connection conductors by a second wiring conductor. The first signal conductor is closer to the back surface than the second signal conductor. The first wiring conductor includes wiring adjusting conductors each having a length corresponding to a distance difference in the lamination direction between the first and second signal conductors.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: July 2, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takahiro Baba
  • Patent number: 10342142
    Abstract: A method and apparatus are provided for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: July 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson