Patents Examined by Tremesha S Willis
  • Patent number: 11350529
    Abstract: A substrate structure and electronic device provide improved power integrity and simplified manufacturing. The substrate structure includes a first printed circuit board, having a first side and a second side opposing each other, and a plurality of passive components embedded in the first printed circuit board. The plurality of passive components includes a first group, including a plurality of first passive components disposed adjacent to each other, and a second group, including a plurality of second passive components disposed adjacent to each other. A smallest distance between the first and second groups is greater than at least one of a smallest distance between adjacent first passive components and a smallest distance between adjacent second passive components.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: May 31, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Eun Lee, Yong Hoon Kim
  • Patent number: 11350526
    Abstract: There is provided a method for implementing an electronic card. The method can include providing the electronic card with a printed circuit board. The method further includes selecting one of a first side and a second side as a specified side on which only connection hardware is to be mounted. The first side is located at a first x-y plane and the second side is located at a second x-y plane, the first and second x-y planes being separated by a length equal to a thickness of the PCB. The first and second x-y planes are parallel.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: May 31, 2022
    Assignee: GE Aviation Systems, LLC
    Inventor: Jeffrey A. VanDorp
  • Patent number: 11342697
    Abstract: A card, e.g. a printed circuit board (PCB), has one or more conductive layers and one or more non-conductive layers disposed and alternating upon one another to form a stack. One or more of the conductive layers has one or more wiring elements within the conductive layer. The PCB/card has one or more card edges. The PCB also has a plurality of dual-level pad structures on each of one or more of the card edges. The dual-level pad structures each have an upper level, a lower level, and two or more walls. The lower level is a conductive pad with conductive surface. At least one of the conductive pads electrically connects to one or more of the wiring elements and/or one or more vias. In each of the dual-level pad structures, the walls and upper level may be made of an electrically non-conductive, insulating, or dielectric material or may be covered with a conductive material that electrically connects to conductive surface.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: May 24, 2022
    Assignee: International Business Machines Corporation
    Inventors: Paul W Coteus, Thomas Cipolla, Kyu-hyoun Kim, Edmund Blackshear
  • Patent number: 11336762
    Abstract: An electronic device comprises: a first plate configured to face one surface of the electronic device; a second plate configured to face in a direction opposite to the first plate; a side bezel structure connected to the first plate and the second plate and configured to surround the side of the electronic device; and a printed circuit board mounted in the electronic device and configured to be connected to the side bezel structure, wherein the printed circuit board comprises: a ground area; a first conductive pad, disposed in one area of the printed circuit board, and configured to couple the side bezel structure and the printed circuit board; and a second conductive pad electrically connected to the ground area and disposed between the first conductive pad and the ground area, wherein the first conductive pad and the second conductive pad may be disposed at an interval through which a current, having a voltage equal to or greater than a threshold voltage between the first conductive pad and a second electro
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: May 17, 2022
    Assignees: Samsung Electronics Co., Ltd., UNIST (Ulsan National Institute of Science and Technology)
    Inventors: Jongsung Lee, Cheolgu Jo, Byongsu Seol, Jingook Kim, Junsik Park
  • Patent number: 11317521
    Abstract: A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: April 26, 2022
    Inventors: Pui Yin Yu, Hong Tu Zhang, Xin Hua Zeng
  • Patent number: 11309682
    Abstract: The present disclosure provides a millimeter wave LTCC filter including system ground layers and metalized vias; two first perturbation metallized vias provided in a first substrate integrated waveguide unit and two second perturbation metallized vias provided in a second substrate integrated waveguide unit; the two first perturbation metallized vias are symmetrically provided on a first diagonal of the first closed resonant cavity with respect to a geometric center of the first closed resonant cavity; the two second perturbation metallized vias are symmetrically provided on a second diagonal of the second closed resonant cavity with respect to a geometric center of the second closed resonant cavity, and the first diagonal and the second diagonal are orthogonal to each other; a first port and a second port. Compared with the related art, the millimeter wave LTCC filter of the present disclosure is small in volume, large in bandwidth, and low in loss.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: April 19, 2022
    Assignee: AAC Technologies Pte. Ltd.
    Inventors: Zhimin Zhu, Jianchun Mai
  • Patent number: 11309238
    Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 19, 2022
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 11307525
    Abstract: A printed circuit board comprises a first mounting surface, a second mounting surface, and a piezoelectric transformer. The piezoelectric transformer has a piezoelectric substance, external electrodes, and a frame substrate. The second mounting surface has a projection region. There is a first region from a first location, where an end portion further from the output electrode out of end portions of the input electrode is projected onto the second mounting surface in the projection region, to a second location, where an end portion closer to the output electrode out of the end portions of the input electrode is projected onto the second mounting surface, the first region being a mounting allowed region where an electronic component is mounted.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: April 19, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Taro Minobe, Norikazu Sugiyama, Ryo Matsumura
  • Patent number: 11304307
    Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer such that the solder resist layer has first opening exposing the first pad and second opening exposing the second pad with diameter smaller than diameter of the first opening, and bumps including a first bump on the first pad and a second bump on the second pad such that the second bump has diameter smaller than diameter of the first bump. The first bump has a base plating layer formed in the first opening and having raised portion, and a top plating layer formed on the base plating layer, and the second bump has a base plating layer formed in the second opening and having raised portion, and a top plating layer formed on the base plating layer.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 12, 2022
    Assignee: IBIDEN CO., LTD.
    Inventor: Satoru Kawai
  • Patent number: 11284508
    Abstract: A semi-flex component carrier includes a stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure. The stack defines at least one rigid portion and at least one semi-flexible portion. The at least one electrically insulating layer structure forms at least part of the semi-flexible portion and includes a material having an elongation of larger than 3% and a Young modulus of less than 5 GPa.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: March 22, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Mikael Tuominen, Nick Xin, Seok Kim Tay
  • Patent number: 11277913
    Abstract: An electrical connector assembly comprises a printed circuit board and a data transmission cable. The printed circuit board has a substrate and a routing structure, the substrate has a welding region and a routing region, the routing structure comprises a plurality of bonding pads. The data transmission cable comprises several juxtaposed wires, a plastic layer and a metallic layer formed by a metal material belt, each wire has a conductor, the metallic layer has at least an aluminum foil layer and a bonding layer. The metallic layer is bonded to the outer side of the plastic layer via the bonding layer. The wires are soldered with corresponding bonding pads, the center distance between every two neighboring wires is same as the center distance between every two neighboring bonding pads.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 15, 2022
    Assignee: ALLTOP ELECTRONICS (SUZHOU) LTD.
    Inventors: Mindi Ni, Yichang Chen
  • Patent number: 11277902
    Abstract: A novel and useful a single layer RFIC/MMIC structure including a package and related redistribution layer (RDL) based low loss grounded coplanar transmission line. The structure includes a package molded around an RF circuit die with a single redistribution layer (RDL) fabricated on the surface thereof mounted on an RF printed circuit board (PCB) via a plurality of solder balls. Coplanar transmission lines are fabricated on the RDL to conduct RF output signals from the die to PCB signal solder balls. The signal trace transition to the solder balls are funnel shaped to minimize insertion loss and maximize RF isolation between channels. A conductive ground shield is fabricated on the single RDL and operative to shield the plurality of coplanar transmission lines.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: March 15, 2022
    Inventors: Nadav Snir, Konstantin Trotskovsky, Assaf Stav
  • Patent number: 11277917
    Abstract: An embedded component package structure including a circuit substrate, an embedded component and a stress compensation layer is provided. The circuit substrate includes a core layer and an asymmetric circuit structure, and the core layer has a first thickness. The embedded component is disposed in the core layer. The stress compensation layer is disposed on one side of the core layer, and the stress compensation layer has a second thickness between 4 ?m and 351 ?m.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: March 15, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Ju Liao, Chien-Fan Chen, Chien-Hao Wang, I-Chia Lin
  • Patent number: 11272613
    Abstract: A printed circuit board includes: a laminate including a core layer and insulating layers stacked on first and second sides of the core layer; and a first antenna formed on a surface of the laminate. A thickness of the core layer is greater than a thickness of one of the insulating layers. A dielectric constant of the core layer is higher than a dielectric constant of the one of the insulating layers.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: March 8, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae-Hong Min, Ju-Ho Kim
  • Patent number: 11251576
    Abstract: Apparatuses and systems associated with expansion card design with a coherent connector to provide for coherent communication are disclosed herein. In embodiments, a circuit card may comprise an integrated circuit (IC), a first connector to couple the IC to a processor of a computer device, the first connector to provide for non-coherent communication between the IC and the processor, and a second connector to couple the IC to the processor, the second connector to provide for coherent communication between the IC and the processor. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: February 15, 2022
    Assignee: Intel Corporation
    Inventors: Dirk Blevins, Gene F. Young, Sudeep Puligundla, Todd Langley, Kevin Bross, Nagabhushan Chitlur
  • Patent number: 11246225
    Abstract: A circuit board having a high reflectivity includes a wiring board, a first solder resist layer, and a second solder resist layer. The wiring board includes a wiring layer on an outer side, the wiring layer including wiring and a bond pad spaced from the wiring. The first solder resist layer, with opening and groove, covers the wiring layer, the bond pad is exposed from the opening but spaced from the first solder resist layer. The second solder resist layer infills the groove and covers the first solder resist layer but does not make contact with the mounting surface of the bond pad. A method for manufacturing such circuit board is also disclosed.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: February 8, 2022
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Wen-Qiang Chen, Ming-Hua Du
  • Patent number: 11240916
    Abstract: An electronic device, a method and apparatus for producing an electronic device, and a composition therefor are disclosed. An adhesive material is applied in a first pattern on a surface of a receiver substrate. A carrier having a metal foil disposed thereon is brought into contact with the first substrate such that a portion of the metal foil contacts the adhesive material. The adhesive material includes a first polymer, a second polymer, and a conductive carbon black dispersion, and is activated using at least one of mechanical pressure and heat while the portion of the metal foil is in contact with the adhesive material. The first substrate and the second substrate are separated, whereby the portion of the metal foil is transferred to the first substrate. The adhesive is electrically conductive to maximize the possibility of maintaining electrical connectivity even when there is a break in the metal foil.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 1, 2022
    Assignee: CRYOVAC, LLC
    Inventors: James W. Blease, Theodore F. Cyman, Jr.
  • Patent number: 11231751
    Abstract: Apparatuses and associated methods for mounting PCBs and other electronics boards in portable medical equipment and/or other portable and non-portable electronic devices are disclosed herein. In some embodiments, the technology disclosed herein can provide PCB mounting systems that isolate the PCB from detrimental shock, vibration, and/or strain, while also providing electrical ground paths that greatly reduce EMI and other electrical disturbances. Some embodiments of the mounting systems described herein include both elastomeric (e.g., rubber) components and resilient metallic grounding members that, when assembled together, provide favorable shock mounting as well as robust electrical grounding without the inconvenience of using separate shock mounts, grounding straps, etc.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: January 25, 2022
    Assignee: FUJIFILM SONOSITE, INC.
    Inventor: Ken Dickenson
  • Patent number: 11229118
    Abstract: A printed circuit board, comprising a flexible insulating layer, a rigid insulating layer laminated on a portion of the flexible insulating layer, and a coverlay disposed on an upper surface of the rigid insulating layer, an upper surface of the flexible insulating layer, and a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: January 18, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Chang-Hwa Park
  • Patent number: 11199883
    Abstract: A display device includes a base substrate including a display area and a non-display area at a periphery of the display area; a first signal wiring on the non-display area of the base substrate and including a first wiring part and a second wiring part connected to the first wiring part; and a printed circuit board including a lead wiring on the first signal wiring. The second wiring part includes an open part passing through a surface of the second wiring part in a thickness direction, the second wiring part includes a long side extending along a first direction and a short side extending along a second direction intersecting the first direction, and a separation distance between the open part and an end of the short side of the second wiring part in the first direction is within about 0.4 times the long side of the second wiring part.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: December 14, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myong Soo Oh, Seung Ho Choi, Ji Hoon Hwang