Patents Examined by Tuan T. Lam
  • Patent number: 12375064
    Abstract: An acoustic transformer in a transmitter chain is disclosed. In one aspect, a differential power amplifier may produce a differential signal that is provided to an acoustic transformer coupled to an acoustic filter. The acoustic transformer provides a single-ended output signal for use by the acoustic filter. To facilitate operation in multiple bands, multiple acoustic transformer-acoustic filter pairs may be provided with a switching network used to route the amplified signal to the appropriate transformer-filter pair.
    Type: Grant
    Filed: September 1, 2023
    Date of Patent: July 29, 2025
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, Nadim Khlat
  • Patent number: 12375070
    Abstract: Embodiments disclosed herein relate to the management of a multi-trim oscillator to provide synchronization across multiple frequencies derived from the multi-trim oscillator without causing spurious pulses of clock output. In one example, a system provides a first clock signal via an oscillator and a second clock signal based on the first clock signal and a divider. The system further receives a first signal that indicates a change in a frequency of the first clock signal from a first frequency to a second frequency. In response to the first signal, the system determines an edge of the second clock signal and provides, at a time based on the edge of the second clock signal, a second signal to the oscillator to cause the change to the second frequency.
    Type: Grant
    Filed: December 20, 2023
    Date of Patent: July 29, 2025
    Assignee: Texas Instruments Incorporated
    Inventors: Gregory North, Sudhakar Surendran, Venkatraman Ramakrishnan
  • Patent number: 12368447
    Abstract: A clock generator system includes a first clock generator circuit to generate a first clock output signal having a first clock output frequency that is within a first bounded range of frequencies. The first clock generator circuit, during a transition mode, exhibits a first ramping of the first clock output signal from the first clock output frequency towards a target frequency. The system includes a second clock generator circuit to generate a second clock output signal having a second clock output frequency that is within a second bounded range of frequencies. The second clock generator circuit, during the transition mode, exhibits a second ramping of the second clock output signal from a second frequency towards the target frequency. A controller coupled to the first clock generator circuit and the second clock generator circuit selectively passes one of the first clock output signal or the second clock output signal as a system clock output signal.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: July 22, 2025
    Assignee: Movellus Circuits Inc.
    Inventors: Xiao Wu, Marcus Van Ierssel
  • Patent number: 12362728
    Abstract: An acoustic transformer in a transmitter chain is disclosed. In one aspect, a differential power amplifier may produce a differential signal that is provided to a first transformer. A differential output of this first transformer is provided to an acoustic transformer that provides a single ended output signal for use by an acoustic filter. By making the second transformer an acoustic transformer, the second transformer may be integrated into the same circuitry that forms the acoustic filter, thereby simplifying the die. Further, the acoustic transformer may be tuned if ferroelectric resonators are used, which provides strong out-of-band signal cancelation.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: July 15, 2025
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 12362736
    Abstract: An adjusting circuit includes: a detection circuit outputting a detection signal indicative of whether a noise occurs in electric power inputted into an integrated circuit operating in synchronization with a clock signal; and a controlling circuit outputting to the integrated circuit a first clock signal having a first frequency, or a second clock signal having a second frequency lower than the first frequency when the detection signal indicates the noise occurs. The detection circuit includes a first circuit outputting a first delayed clock signal obtained by delaying the first clock signal according to an operation voltage of the integrated circuit, a second circuit outputting a second delayed clock signal obtained by delaying the first clock signal according to a threshold voltage lower than the operation voltage, and an output circuit outputting the detection signal based on a result of comparing phases of the first and second delayed clock signals.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: July 15, 2025
    Assignee: Fujitsu Limited
    Inventor: Shinichiro Shirota
  • Patent number: 12362734
    Abstract: A circuit includes a clock input node, a first signal input node configured to receive a first modulated signal switching between a first DC voltage and a second DC voltage, a bias circuit, a first output node, a first capacitor, a second capacitor, and switching circuitry coupled to the first capacitor and the second capacitor. Control circuitry is configured to initially set the switching circuitry in a first configuration in response to the first modulated signal having the second DC voltage, thereby charging the first capacitor to the second DC voltage and charging the second capacitor to the first DC voltage, and subsequently set the switching circuitry in a second configuration in response to an edge detected in the clock signal, thereby producing the first threshold voltage at the first output node after charge redistribution taking place between the first and second capacitors.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: July 15, 2025
    Assignees: STMicroelectronics S.r.l., Alma Mater Studiorum—Universita' Di Bologna
    Inventors: Matteo D'Addato, Alessia Maria Elgani, Luca Perilli, Eleonora Franchi Scarselli, Antonio Gnudi, Roberto Antonio Canegallo, Giulio Ricotti
  • Patent number: 12322570
    Abstract: A pulsing assembly for delivering power to a plasma reactor having a first load between a first plasma reactor input port and a plasma reactor common port and having a second load between a second plasma reactor input port and the plasma reactor common port. The pulsing assembly includes a first pulsing unit, a second pulsing unit and an energy storage component connected therebetween. The first pulsing unit includes a first input port connectable to a power source, a pulsing assembly common port connectable to the plasma reactor common port, a first output port connectable to the first load of the plasma reactor for supplying pulses between the first output port and the pulsing assembly common port. The second pulsing unit includes a second input port connectable to a power source and a second output port connectable to the second load of the plasma reactor.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: June 3, 2025
    Assignee: TRUMPF HUETTINGER SP. Z O. O.
    Inventors: Andrzej Klimczak, Andrzej Gieraltowski, Michal Balcerak
  • Patent number: 12317404
    Abstract: There is provided a circular accelerator that accelerates a beam of charged particles circulating in a magnetic field such that a closed orbit for each energy of the beam is eccentric. The circular accelerator includes a beam extraction port for extracting beams of different energies from the closed orbit, a first bending magnet and a second bending magnet that bend the beam extracted from the beam extraction port, and a control unit that controls magnetic field strengths of the first bending magnet and the second bending magnet in accordance with the energy of the extracted beam. When the energy of the extracted beam is a designed maximum energy of the circular accelerator, the control unit excites both the first bending magnet and the second bending magnet to bend the beam.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: May 27, 2025
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Futaro Ebina, Takuya Nomura
  • Patent number: 12316330
    Abstract: A comparator circuit with dynamic hysteresis. A common source branch is configured to conduct a differential current at first and second intermediate outputs responsive to a differential input at first and second inputs, and a common gate branch is configured to generate a voltage at a third intermediate output responsive to the differential current at the first and second intermediate outputs. A hysteresis branch includes a hysteresis current generator including first and second replica transistors having source/drain paths coupled in parallel, and gates coupled to the first and second inputs, respectively. A hysteresis capacitor is coupled between the sources of the first and second replica transistors and the common terminal. Current mirror circuitry is coupled to the source/drain paths of the first and second replica transistors, to supply a hysteresis current responsive to the absence of current conducted by the parallel first and second replica transistors.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: May 27, 2025
    Assignee: Texas Instruments Incorporated
    Inventor: Ho-Young Lee
  • Patent number: 12302472
    Abstract: The invention relates to an integration of a programmable memory device in a luminaire for storing service-related information such as drive parameters, repair history information and the like. The memory device can be read out by the same connectivity used for driving the luminaire, so that the driver can be informed about required operation conditions. The driver can thus learn about the service-related information before starting to drive the luminaire.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: May 13, 2025
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Matthias Wendt, Martinus Petrus Creusen, Haimin Tao, Bernd Ackermann
  • Patent number: 12289102
    Abstract: An impedance calibration circuit includes a first leg set having an impedance calibrated to a first target impedance according to an impedance control code during an activation period of a first timing control signal, a second leg set having an impedance calibrated to a second target impedance according to the impedance control code during an activation period of a second timing control signal, a code generation circuit configured to calibrate and output a value of the impedance control code according to a result of comparing a voltage of a node, to which the first leg set is connected, with a reference voltage, and a timing control signal generation circuit configured to generate the first timing control signal and the second timing control signal having different activation periods in response to an impedance calibration enable signal.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: April 29, 2025
    Assignee: SK hynix Inc.
    Inventor: Eun Ji Choi
  • Patent number: 12289107
    Abstract: A low-power retention flip-flop is provided. The low-power retention flip-flop may include: a master latch configured to output an input signal based on first control signals; a slave latch configured to output the signal from the master latch based on second control signals; and a control logic configured to generate the first control signals based on a clock signal, and provide the generated first control signals to the master latch, and generate the second control signals based on the clock signal and a power down mode signal, and provide the generated second control signals to the slave latch.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: April 29, 2025
    Assignee: SK keyfoundry Inc.
    Inventors: Wan-Chul Kong, Sungbum Park, Keesik Ahn
  • Patent number: 12283956
    Abstract: A circuit for sensing local operating properties of an integrated circuit is disclosed. The circuit may include one or more sensor circuits configured to sense the local operating properties of the integrated circuit. The sensor circuits may receive a supply voltage with a magnitude in a limited range from a digital power supply that is different from the digital power supply that provides power to functional circuits in the integrated circuit. Level shifters may be coupled to the sensor circuits to shift output signals from the sensor circuits to levels that correspond to the digital power supply that provides power to functional circuits in the integrated circuit. Counters and a shift register may be coupled to the level shifters to receive the shifted output signals, the values of which may be used to determine the local operating properties of the integrated circuit as sensed by the sensor circuits.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: April 22, 2025
    Assignee: Apple Inc.
    Inventors: Ramy A. Ahmed, Bruno W. Garlepp, Jafar Savoj
  • Patent number: 12283464
    Abstract: Provided is a plasma reaction device which can reduce a heating value through installation of a dual-coil type inductor in a resonant network circuit part, and a cooling method thereof. The plasma reaction device may include: a reactor part for exciting an input gas to be in a plasma state by using transformer coupled plasma; a resonant network circuit part electrically connected to the reactor part and including at least one inductor and at least one condenser; and a power supply part for applying power to the resonant network circuit part, wherein the inductor may comprise: a first coil which is formed between a first terminal and a second terminal and at least a portion of which is spirally wound to form a first cylindrical reception space inward; and a second coil which is formed between the first terminal and the second terminal to be connected to the first coil in series, and spirally wound in the first cylindrical reception space.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: April 22, 2025
    Assignee: NEW POWER PLASMA CO., LTD.
    Inventors: Dai Kyu Choi, Eun Seok Lim
  • Patent number: 12283952
    Abstract: A structure includes a level shifter, first and second variable voltage generators, and a programmable voltage generator. The level shifter includes low and high supply voltage nodes and two parallel branches, including multiple transistors, connected between the nodes. The programmable voltage generator generates and applies a high supply voltage (VH) to the high supply voltage node. VH is programmable to one of multiple possible VH levels. Based on the voltage level of VH, the first variable voltage generator generates and applies a low supply voltage (VL) to the low supply voltage node and the second variable voltage generator generates and applies a gate bias voltage (VGB) to gates of some transistors. By tracking VH and adjusting VL and VGB based on thereon, the voltage level shifter operates within the SOA at high VHs, remains operable at low VHs, and maintains operating speed at mid-level VHs.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: April 22, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Siva Kumar Chinthu, Venkatesh Periyapatna Gopinath, Suresh Pasupula, Devesh Dwivedi
  • Patent number: 12283465
    Abstract: This plasma processing apparatus for performing plasma processing on an end part of a substrate includes a processing container, a substrate supporting member configured to support a portion of the substrate and to which a high frequency power is applied, at least a side of the substrate supporting member being composed of a dielectric, an opposing dielectric member composed of a dielectric and disposed to oppose the substrate supporting member, and a gas supply configured to supply a processing gas for generating plasma on at least the end part of the substrate. The plasma processing apparatus further includes a side ground electrode provided at a side of the substrate so as to be close to the substrate to such an extent that an electrical coupling is formed between an end surface of the substrate and the side ground electrode, the side ground electrode having a ground potential.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: April 22, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Eiki Kamata, Taro Ikeda, Satoru Kawakami, Takumi Kabe
  • Patent number: 12278478
    Abstract: An over-voltage protection system for an accelerator can include: a plurality of DC power supplies configured to provide a plurality of voltage levels up to a desired voltage level; and an acceleration tube electrically connected to the plurality of DC power supplies and configured to accelerate a charged particle. The acceleration tube can include a plurality of stages. Each stage can include a plurality of electrodes and a plurality of varistors configured to discharge energy in response to an overvoltage event. One electrode of the plurality of electrodes can be electrically coupled to a voltage level of the plurality of voltage levels. The plurality of electrodes and the plurality of varistors can be electrically coupled to each other and arranged in an alternating fashion.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 15, 2025
    Assignee: Neutron Therapeutics LLC
    Inventors: Tyler R. Wills, William H. Park
  • Patent number: 12276398
    Abstract: A distributed induction-controlled solar lighting system comprises a first light, second lights and an inductive switch. Each light comprises a first sensor and a sub-controller used for controlling the brightness of the light. The inductive switch is spaced apart from the first light and can trigger the brightness of the first light within its preset range to increase when sensing that a pedestrian or an animal passes by. The first sensor can trigger the brightness of the first light and/or the second light within its range to increase when sensing that a pedestrian or an animal passes by.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: April 15, 2025
    Inventor: Shifu Tang
  • Patent number: 12277910
    Abstract: A shift register unit and a driving method thereof, a gate drive circuit, and a display device are disclosed. The shift register unit includes: an input circuit, a first control circuit, an output circuit, an output noise reduction circuit, and a reset circuit; wherein the input circuit is connected to an input terminal; the first control circuit is connected to the first node, a second node, and a first clock signal terminal; the output circuit is connected to an output terminal; the output noise reduction circuit is connected to the output terminal; and the reset circuit is connected to a total reset terminal and a first voltage terminal, wherein the total reset signal is an invalid level in a first operation stage, and the total reset signal includes at least one period of valid level in a second operation stage.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: April 15, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang Shang, Libin Liu, Jiangnan Lu, Yu Feng, Xinshe Yin, Shiming Shi
  • Patent number: 12267942
    Abstract: A beam accelerator system operable to produce a medical isotope, including an ion accelerator that generates an ion beam; a low-pressure chamber; an anode adjacent and fluidly connected to the low-pressure chamber; a plasma window adjacent and fluidly connected to the anode; and a cathode housing adjacent and fluidly connected to the plasma window. The plasma window has a plurality of plates, each plate having an aperture that is aligned with an aperture in one or more adjacent plates to form a plasma channel. One or more plates in the plurality of plates includes a unitary plate having an aperture therein, and one or more cooling channels entering the unitary plate at a first side of the unitary plate and exiting the unitary plate at a second side of the unitary plate. The one or more cooling channels run through a thickness of the unitary plate.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: April 1, 2025
    Assignee: SHINE Technologies, LLC
    Inventors: Tye Gribb, Preston Barrows