Patents Examined by Tuan T. Lam
  • Patent number: 10930189
    Abstract: A shift register unit, a method for driving the same, a gate driving circuit, and a display device are provided. The shift register unit includes a driving circuit, a storage capacitor circuit, an output circuit, and a reset circuit. Under the control of the start end, the driving circuit controls whether the pull-up node is connected to the set signal input end and control whether the pull-down node is connected to the first level input end. Under the control of the reset end, the reset circuit controls whether the pull-up node is connected to the first level input end, and controls whether the pull-down node is connected to the second level input end.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: February 23, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shenghua Hu, Chunyang Nie, Bingbing Yan, Lixin Zhu
  • Patent number: 10930198
    Abstract: The disclosure relates to a shift register unit, a driving method of shift register units, a gate driving circuit and a display panel. The shift register unit includes: an input module, a pull-up module, a storage capacitor, an output module configured to transmit a first voltage signal to a signal output terminal under the control of the first voltage signal; and an output control module configured to transmit the first voltage signal or a second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a first selection signal, and to transmit the first voltage signal or the second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a second selection signal.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: February 23, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Fengjing Tang, Zhifu Dong, Jian Tao, Hongmin Li
  • Patent number: 10930239
    Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: February 23, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Kai-Wei Hong, Chun-Da Tu, Ming-Hsien Lee, Chuang-Cheng Yang, Yi-Cheng Lin, Chun-Feng Lin
  • Patent number: 10930360
    Abstract: A shift register includes a first input sub-circuit configured to transfer a first input signal at a first input terminal to a first node in response to a first scan signal at a first scan terminal being active, a first level control sub-circuit configured to transfer a first power supply voltage at a first power supply terminal to a first output control node and a second output control node in response to the first node being at an active potential, and an output sub-circuit configured to transfer a first clock signal at a first clock terminal to a first output in response to the first output control node being at an active potential, and to transfer a second clock signal at a second clock terminal to a second output terminal in response to the second output control node being at an active potential.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: February 23, 2021
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Peng Liu, Jun Fan, Yusheng Liu, Bailing Liu, Han Zhang, Zhen Wang, Yun Qiao, Zhengkui Wang, Lele Cong, Mei Li
  • Patent number: 10923007
    Abstract: The present disclosure relates to the field of display technologies and provides a shift register unit. The shift register unit includes an input circuit, a pull-up circuit, an output circuit, an auxiliary circuit, a pull-down circuit, a first storage capacitor, and a second storage capacitor. The auxiliary circuit is coupled to a first clock signal terminal, a second clock signal terminal, an input terminal and a first output terminal. The second storage capacitor is coupled between a first node and a pull-up node.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: February 16, 2021
    Assignees: Hefei BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ying Wang, Meng Li, Wei Xue, Hongmin Li
  • Patent number: 10923020
    Abstract: The present disclosure provides a shift register unit. The shift register unit includes an input module, an output module and an output control module. The input module is connected to an input signal terminal, a first power supply signal terminal and a pull-up node, and is configured to transmit a first power supply signal to the pull-up node. The output module is connected to the pull-up node, a clock signal terminal and an output control node, and is configured to transmit a clock signal to the output control node. The output control module is connected to the output control node, the clock signal terminal and a signal output terminal, and is configured to transmit a signal of the output control node to the signal output terminal under the control of the clock signal.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: February 16, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Hefei BOE Optoelectronics Technology Co., Ltd.
    Inventors: Wei Xue, Hongmin Li, Ying Wang, Fengjing Tang, Li Sun
  • Patent number: 10916166
    Abstract: The present disclosure provides a shift register unit, which comprises: a pull-down node control circuit, connected to a control node and a pull-down node, and configured to control a change in a potential of the pull-down node according to a potential of the control node, where the potential of the control node and the potential of the pull-down node are inversed in phase; and a first potential regulating circuit, connected to an upper-stage pull-up node and the control node, and configured to: transmit a potential of the upper-stage pull-up node to the control node when the potential of the upper-stage pull-up node is an effective operating potential; and disconnect a connection between the control node and the upper-stage pull-up node when the potential of the upper-stage pull-up node is not an effective operating potential.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: February 9, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lei Lv, Jie Gao, Chunmin Xu
  • Patent number: 10916320
    Abstract: A shift register unit includes a first output control circuit, a first output circuit, a second output control circuit, a second output circuit, a reset circuit, and a node set circuit. The node set circuit is configured to periodically transfer a first voltage having an inactive level to a first node within the shift register unit during being enabled.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 9, 2021
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shuai Chen, Zhi Zhang, Xiuzhu Tang, Yuanbo Zhang, Zhihui Wang, Qian Qian, Lijun Xiong, Tao Zhou, Xing Dong
  • Patent number: 10916213
    Abstract: A shift register includes first, second and third output sub-circuits, first and second pull-down sub-circuits, and a selection sub-circuit. The first output sub-circuit is coupled to a pull-up node, a first output terminal, and a first clock signal terminal. The second output sub-circuit is coupled to the first clock signal terminal, the selection sub-circuit, and a second output terminal. The third output sub-circuit is coupled to a second clock signal terminal, the selection sub-circuit, and the second output terminal. The selection sub-circuit is coupled to the second and third output sub-circuits, the pull-up node, and a gating signal terminal. The first pull-down sub-circuit is coupled to a first pull-down node, the first output terminal, a second voltage terminal, and the pull-up node. The second pull-down sub-circuit is coupled to the second output terminal, a first voltage terminal, and the first pull-down node.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: February 9, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Feng, Shijun Wang, Xi Chen, Hongming Zhan
  • Patent number: 10909929
    Abstract: A scan driver includes stage circuits, each including: a first circuit including a control terminal (CT) connected to a first node (N1), and connecting/disconnecting a previous scan line of a previous stage circuit to a second node (N2) based on a control signal (CS); a second circuit including a CT connected to a clock signal line, and connecting one of a first power voltage line (FPVL) and a second power voltage line (SPVL) to the N1 based on a CS; a third circuit including a CT connected to the N2, and connecting one of the N1 and the SPVL to a third node (N3) based on a CS; a fourth circuit including a CT connected to the N3, and connecting one of the FPVL and the SPVL to a current scan line based on a CS; and a first capacitor connecting the CT of the third circuit and the SPVL.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: February 2, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Hoon Yang, Ki Bum Kim, Jong Chan Lee, Woong Hee Jeong
  • Patent number: 10902813
    Abstract: Each unit circuit that constitutes each of stages of a shift register is provided with a charge supply unit including a third node whose potential becomes high level at identical timing with a first node (a node for holding an electric charge in order to output a scanning signal (output signal) at high level), and capable of supplying an electric charge to the first node throughout a period after the potential of the third node becomes high level until the scanning signal (output signal) at high level is outputted. Here, all of the unit circuits within the shift register have an identical configuration.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: January 26, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yohei Takeuchi, Takuya Watanabe, Akira Tagawa, Yasuaki Iwase, Takatsugu Kusumi
  • Patent number: 10892028
    Abstract: A shift register includes a pull-up control circuit, a pull-up circuit, a pull-down control circuit, a pull-down circuit, and a reset circuit. The pull-down circuit is connected to the pull-down node, the pull-up node, a second control terminal, a first voltage terminal, and a signal output terminal, and is configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of the pull-down node; moreover, the pull-down circuit is further configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of a signal from the second control terminal.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: January 12, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Chongqing BOE Optoelectronics Technology Co., Ltd.
    Inventors: Yuanbo Zhang, Xiaolin Wang, Zhuo Xu, Shuai Chen, Zhulin Liu
  • Patent number: 10885999
    Abstract: The embodiments of the present application provide a shift register, a method for controlling the same, a gate driving circuit, and a display apparatus. The shift register includes: an input circuit coupled to a signal input terminal and a pull-up node; a pull-up circuit coupled to the pull-up node, a first clock signal terminal and a signal output terminal; a pull-down circuit coupled to a reset signal terminal, a first voltage signal terminal, the pull-up node, and the signal output terminal; a pull-down control circuit coupled to a second clock signal terminal, the pull-up node, a pull-down node, and the first voltage signal terminal; a first de-noising circuit coupled to the pull-up node, the signal input terminal, the first voltage signal terminal, and a compensation node; and a compensation circuit coupled to the first clock signal terminal, the second clock signal terminal, and the compensation node.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: January 5, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xianrui Qian, Yuting Chen, Fei Li, Bo Li
  • Patent number: 10886941
    Abstract: A pulse density modulation method includes the following steps: S01, obtaining a number of bits n of a binary density value d, setting a number of bits of a counter as n, an initial value of the counter is 0 or 1; S02, searching for a rightmost 1: obtaining a number of bits j of the rightmost 1 of a current value i of the counter counted from right to left; a number in the counter is a binary number; a minimum value of j is 1; S03, determining whether corresponding bits are equal; S04, adding the value i of the counter by 1, proceeding to a next period, and turning to the step S02.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: January 5, 2021
    Assignee: HANGZHOU QISU TECHNOLOGY CO., LTD.
    Inventor: Nan Xia
  • Patent number: 10878737
    Abstract: Embodiments of the present disclosure provide a shift register, a gate driving circuit, a display panel and a display apparatus. The shift register comprises an inputting sub-circuit, an outputting sub-circuit, a resetting sub-circuit, and a first discharging controlling sub-circuit. The first discharging controlling sub-circuit is coupled to a first controlling signal inputting terminal, a second controlling signal inputting terminal and a signal outputting terminal, and configured to provide a second controlling signal from the second controlling signal inputting terminal to the signal outputting terminal under a control of a first controlling signal from the first controlling signal inputting terminal. The signal outputting terminal is set to a high level by inputting the first controlling signal and the second controlling signal to the shift register.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: December 29, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Ruifang Du, Haifeng Liu, Xiaoye Ma
  • Patent number: 10878757
    Abstract: Embodiments of the application provide a shift register comprising a shift signal generating circuit and at least two time-sharing controlling circuits. The shift signal generating circuit may be configured to generate a shift signal. Each of the time-sharing controlling circuits comprises a first driving sub-circuit and a second driving sub-circuit, wherein the first driving sub-circuit is configured to enable the time-sharing controlling circuit to output the shift signal during the preset period, and the second driving sub-circuit is configured to enable the time-sharing controlling circuit to output an invalid signal during the non-preset period. During a driving cycle, the first driving sub-circuits in each of the at least two time-sharing controlling circuits are turned on sequentially, so that each of the at least two time-dividing controlling circuits outputs the shift signal sequentially.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: December 29, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Li Wang
  • Patent number: 10872546
    Abstract: The embodiments of the present application disclose a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit comprises an input sub-circuit connected to an input signal terminal and a pull-up control node, and configured to charge the pull-up control node under control of an input signal; and an output sub-circuit connected to the pull-up control node, a clock signal terminal, a first voltage terminal, and an output signal terminal, and configured to output a first constant voltage to the output signal terminal under control of a clock signal and the pull-up control node.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: December 22, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wei Xue, Jian Tao, Hongmin Li, Ying Wang
  • Patent number: 10872578
    Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and an array substrate are provided, and the shift register unit includes: an input sub-circuit connected between a signal input terminal and a pull-up node, an output sub-circuit connected between the pull-up node and a signal output terminal; a reset sub-circuit connected between a reset terminal, the pull-up node and the signal output terminal; and a clock signal selection sub-circuit having input terminals connected to a first clock signal terminal and a second clock signal terminal, and a first output terminal connected to the output sub-circuit, and for selecting to provide either a first clock signal or a second clock signal to the output sub-circuit according to voltage levels at the first control terminal and the second control terminal.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: December 22, 2020
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Jian Zhao, Hui Wang
  • Patent number: 10872547
    Abstract: A gate driver with reduced voltage fluctuations driving a display device generates pulse signals shifted in a specified phase. The gate driver includes connected unit circuits. Each unit circuit includes an output terminal, input and output transistors, and a holding module. First and second control signals, alternating oppositely between high and low states, govern the two transistors. The input transistor is controlled by a first control signal and outputs a high level voltage to a first node based on a trigger signal. The output transistor outputs the shifted pulse signal synchronously with a clock control signal, based on the high level voltage of the first node. Initially, the trigger signal is low and the first and second control signals are high. The holding module outputs the low level voltage to the output terminal based on the first control signal and the second control signal.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 22, 2020
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Hui Wang, Ning Fang, Chih-Chung Liu, Ming-Tsung Wang, Meng-Chieh Tai
  • Patent number: 10847072
    Abstract: A scan driver that includes a plurality of stages of scan driving circuits is provided.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: November 24, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chien-Chuan Ko, Meng-Chieh Tsai