Patents Examined by Van Pham
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Patent number: 7309879Abstract: A semiconductor laser element capable of reducing the contact resistance and the thermal resistance and realizing a high reliability is provided. The semiconductor laser element includes: a semiconductor substrate, an active layer formed on the semiconductor substrate, a ridge having a clad layer formed on the active layer and a contact layer formed on the clad layer, an insulation film covering the side surfaces of the clad layer, and an electrode connected to the contact layer, wherein the insulation layer has an end portion in the ridge thickness direction located between the upper surface and the lower surface of the contact layer.Type: GrantFiled: February 9, 2006Date of Patent: December 18, 2007Assignee: Opnext Japan, Inc.Inventors: Haruki Fukai, Hidetaka Karita, Atsushi Nakamura, Shigeo Yamashita
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Patent number: 7306983Abstract: The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the silicide layer. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a protective layer to a device, applying a first silicon nitride liner to the device, removing a portion of the first silicon nitride liner, removing a portion of the protective layer, and applying a second silicon nitride liner to the device.Type: GrantFiled: December 10, 2004Date of Patent: December 11, 2007Assignee: International Business Machines CorporationInventors: Dureseti Chidambarrao, Ying Li, Rajeev Malik, Shreesh Narasimha
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Patent number: 7303946Abstract: A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate electrode and containing a dopant and arranged such that the gate electrode is formed on the gate electrode insulating film, and an oxidation process using ozone is performed to sufficiently round the shape of the lower edge of the gate electrode.Type: GrantFiled: April 27, 2000Date of Patent: December 4, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Yoshio Ozawa, Yasumasa Suizu, Yoshitaka Tsunashima
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Patent number: 7297585Abstract: In formation of a source/drain region of an NMOS transistor, a gate-directional extension region <41a> of an N+ block region <41> in an N+ block resist film <51> prevents a well region <11> located under the gate-directional extension region <41a> from implantation of an N-type impurity. A high resistance forming region, which is the well region <11> having a possibility for implantation of an N-type impurity on a longitudinal extension of a gate electrode <9>, can be formed as a high resistance forming region <A2> narrower than a conventional high resistance forming region <A1>. Thus, a semiconductor device having a partially isolated body fixed SOI structure capable of reducing body resistance and a method of manufacturing the same are obtained.Type: GrantFiled: July 27, 2006Date of Patent: November 20, 2007Assignee: Renesas Technology Corp.Inventors: Shigenobu Maeda, Toshiaki Iwamatsu, Takashi Ipposhi
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Patent number: 7285469Abstract: In accordance with the invention, there are various methods of making an integrated circuit comprising a bipolar transistor. According to an embodiment of the invention, the bipolar transistor can comprise a substrate, a collector comprising a plurality of alternating doped regions, wherein the plurality of alternating doped regions alternate in a lateral direction from a net first conductivity to a net second conductivity, and a collector contact in electrical contact with the collector. The bipolar transistor can also comprise a heavily doped buried layer below the collector, a base in electrical contact with a base contact, wherein the base is doped to a net second conductivity type and wherein the base spans a portion of the plurality of alternating doped regions, and an emitter disposed within the base, the emitter doped to a net first conductivity, wherein a portion of the alternating doped region under the emitter is doped to a concentration of less than about 3×1012 cm?2.Type: GrantFiled: September 2, 2005Date of Patent: October 23, 2007Assignee: Intersil AmericasInventor: James Douglas Beasom
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Patent number: 7282459Abstract: Aspects of the invention can provide an ejection method to form a micro lens efficiently on each of a plurality of semiconductor lasers in a wafer state. So that a distance in an x-axis direction between two mutually adjacent sections subject to ejection and a distance between any two nozzles of a plurality of nozzles arranged in the x-axis direction may be in agreement, the ejection method can include a step of positioning a substrate having the two sections subject to ejection, a step of moving relatively the plurality of nozzles along a y-axis direction intersecting the x-axis direction perpendicularly to the substrate, and a step of ejecting a liquid material respectively from the two nozzles to the two sections subject to ejection if the two nozzles should respectively penetrate areas corresponding to the two sections.Type: GrantFiled: September 16, 2004Date of Patent: October 16, 2007Assignee: Seiko Epson CorporationInventor: Hironori Hasei
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Patent number: 7282374Abstract: The present invention provides a method and apparatus for comparing device and non-device structures. The method includes determining at least one characteristic parameter associated with at least one non-device structure on at least one workpiece and determining at least one characteristic parameter associated with at least one device structure on the at least one workpiece. The method also includes comparing the at least one characteristic parameter associated with the at least one non-device structure and the at least one characteristic parameter associated with at least one device structure.Type: GrantFiled: November 3, 2004Date of Patent: October 16, 2007Assignee: Advanced Micro Devices, Inc.Inventors: Kevin R. Lensing, Matthew S. Ryskoski
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Patent number: 7276725Abstract: The present invention relates to a bit line barrier metal layer for a semiconductor device and a process for preparing the same, the process comprising: forming bit line contact on an insulation layer vapor-deposited on an upper part of a substrate so as to expose an ion implantation region; vapor-depositing a first barrier metal layer of a Ti film on the entire upper surface thereof; and vapor-depositing, on the upper part of the Ti film, a second barrier metal layer of a ZrB2 film having different upper and lower Boron concentrations, by RPECVD controlling the presence/absence of H2 plasma, wherein the barrier metal layer includes the Ti film, lower ZrB2 film and upper a ZrB2 film sequentially stacked between tungsten bit lines and ion implantation region of a semiconductor substrate.Type: GrantFiled: February 7, 2005Date of Patent: October 2, 2007Assignee: Hynix Semiconductor Inc.Inventor: Byung Soo Eun
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Patent number: 7259055Abstract: A method for forming a high-luminescence Si electroluminescence (EL) phosphor is provided, with an EL device made from the Si phosphor. The method comprises: depositing a silicon-rich oxide (SRO) film, with Si nanocrystals, having a refractive index in the range of 1.5 to 2.1, and a porosity in the range of 5 to 20%; and, post-annealing the SRO film in an oxygen atmosphere. DC-sputtering or PECVD processes can be used to deposit the SRO film. In one aspect the method further comprises: HF buffered oxide etching (BOE) the SRO film; and, re-oxidizing the SRO film, to form a SiO2 layer around the Si nanocrystals in the SRO film. In one aspect, the SRO film is re-oxidized by annealing in an oxygen atmosphere. In this manner, a layer of SiO2 is formed around the Si nanocrystals having a thickness in the range of 1 to 5 nanometers (nm).Type: GrantFiled: February 24, 2005Date of Patent: August 21, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Tingkai Li, Pooran Chandra Joshi, Wei Gao, Yoshi Ono, Sheng Teng Hsu
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Patent number: 7239594Abstract: The invention is directed to self-referenced holographic recording techniques that make use of an element of a holographic medium to create a reference beam from a zero frequency Fourier component of a data encoded object beam. In other words, the self-referencing element may be formed on the holographic medium, rather then being a separate element of the holographic recording system. The element may comprise a diffusive element on the medium, designed to create a reference beam having controlled angles, phase and/or amplitude.Type: GrantFiled: February 7, 2003Date of Patent: July 3, 2007Assignee: Imation Corp.Inventor: Jathan D. Edwards
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Patent number: 7239588Abstract: In an foreign body detection apparatus, an optical signal detection unit irradiates a light spot onto a surface of an object to be inspected while scanning the surface by employing the light spot in a predetermined direction, and receives a reflected beam from the surface of the inspected object to generate a photodetection signal corresponding to the light intensity of the reflected beam. A foreign body detection unit generates a foreign body detection signal appearing with respect to a leader and a trailer in the scanning direction of a foreign body adhering to the inspected object from the photodetection signal. The foreign body detection signal is obtained, for example, as a difference signal between the photodetection signal and a delayed photodetection signal with a predetermined delay time. A foreign body discrimination unit generates a foreign body discriminating signal indicating a region in which the foreign body is present from the foreign body detection signal.Type: GrantFiled: May 30, 2003Date of Patent: July 3, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Gotoh, Seiji Nishiwaki, Yoshiaki Komma
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Patent number: 7217642Abstract: A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line.Type: GrantFiled: January 24, 2002Date of Patent: May 15, 2007Assignee: Samsung Electronis Co., Ltd.Inventors: Myung-Koo Kang, Hyun-Jae Kim, Sook-Young Kang
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Patent number: 7197000Abstract: A method of generating an efficient sequence of “nm+m?1” level random numbers, each sub-sequence of “m” successive random numbers thereof having a different pattern, including the steps of generating a sequence of n-level random numbers based on an initial value, a number being generated at a time, determining whether a pattern of a sub-sequence is “used”, if the pattern of the sub-sequence is “used”, setting a different value to the initial value, if the pattern of the sub-sequence is not “used”, accepting the newly generated number and marking the pattern as “used”. All of the steps are repeated until all of “nm” patterns are exhausted. Since the newly generated number is rejected if the pattern of the sub-sequence is “used”, the sequence becomes the shortest one of which all of “nm” patterns are exhausted.Type: GrantFiled: March 6, 2003Date of Patent: March 27, 2007Assignee: Ricoh Company, Ltd.Inventor: Koubun Sakagami
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Patent number: 7179675Abstract: A method for fabricating an image sensor includes forming a seed layer on a semiconductor substrate, forming a blocking layer on the seed layer, partially exposing a region for transistor in an active region of the semiconductor substrate by patterning the seed layer and the blocking layer, selectively forming a gate insulating material layer in a portion of the exposed region for transistor, filling a gate electrode material layer in the exposed region for transistor over the gate insulating material layer, forming a gate insulating layer pattern and a gate electrode pattern by selectively removing the blocking layer, the gate insulating material layer, the gate electrode material layer, and the seed layer, and forming source and drain diffusion layers and a photodiode on both sides of the gate insulating layer pattern and the gate electrode pattern by selectively doping impurity ions.Type: GrantFiled: December 30, 2004Date of Patent: February 20, 2007Assignee: Dongbu Electronics Co., Ltd.Inventor: Hee Sung Shim
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Patent number: 7166502Abstract: The present invention discloses a method of manufacturing a thin film transistor, including: preparing a substrate and a mixed solution, the mixed solution having a reductant and a first metal; forming a photoresist pattern on the substrate; etching a portion of the substrate to form a groove using the photoresist pattern as a mask; depositing a second metal on the substrate, a height of the second metal being smaller than a depth of the groove; removing the photoresist pattern on the substrate and the second metal on the photoresist other than in the groove; and forming the first metal on the second metal in the groove by submerging the substrate in the mixed solution.Type: GrantFiled: November 13, 2000Date of Patent: January 23, 2007Assignee: LG. Philips LCD Co., Ltd.Inventor: Oh-Nam Kwon
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Patent number: 7145859Abstract: An optical pickup includes a light source which emits first and second lights having different wavelengths for a first recording medium and a second recording medium having a relatively large thickness, respectively, an optical path changer which alters a traveling path of incident light, and an objective lens which focuses the first and second lights on the recording medium. While the light source emits the first light, a photodetector is adjusted to be aligned with the optical axis for the first recording medium. The light source and/or a sensing lens are adjusted in the direction of the optical axis, and the tilt of the objective lens is adjusted. Next, while the light source is operated to emit the second light, the light source is adjusted in a rotating direction. As such, an optical axis alignment is completed for the first and second recording media.Type: GrantFiled: September 17, 2002Date of Patent: December 5, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Soo-han Park, Young-sun Park, Moon-lwhan Lee, Do-hoan Nam, Chun-seong Park
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Patent number: 7142492Abstract: A method for determining the recording power of a laser beam so that jitter from a reproduced signal obtained by reproducing data recorded in a data rewritable type optical recording medium can be controlled within an acceptable tolerance even when cross erasing of data occurs. The power of a laser beam is measured for each level of the recording power of the laser beam. Critical parameters are calculated for each level of the recording power of the laser beam. The critical parameters are projected onto a data rewritable type optical recording medium for recording data therein. Direct overwriting required for saturating an influence of cross erasing of data is performed x times in one embodiment to determine a critical parameter. A data recording apparatus storing a critical parameter used for determining the power of a laser beam is associated with ID data for identifying the kind of optical recording medium.Type: GrantFiled: June 27, 2003Date of Patent: November 28, 2006Assignee: TDK CorporationInventors: Tatsuhiro Kobayashi, Tatsuya Kato, Hiroyasu Inoue
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Patent number: 7142491Abstract: A method for determining the recording power of a laser beam so that jitter from a reproduced signal obtained by reproducing data recorded in a data rewritable type optical recording medium can be controlled within a tolerance even when cross erasing of data occurs, the reproduced signal having the highest obtainable level. The power of a laser beam is measured for each level of the recording power of the laser beam. Critical parameters are also calculated for each level of the recording power of the laser beam. The critical parameters are projected onto a data rewritable type optical recording medium for recording data therein. A data recording apparatus storing a critical parameter used for determining the power of a laser beam is associated with ID data for identifying the kind of optical recording medium. A data recording apparatus storing an optimum recording power used for determining the power of a laser beam is also associated with ID data for identifying the kind of optical recording medium.Type: GrantFiled: June 27, 2003Date of Patent: November 28, 2006Assignee: TDK CorporationInventors: Tatsuya Kato, Tatsuhiro Kobayashi, Hiroyasu Inoue
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Patent number: 7136343Abstract: An optical recording/reproducing method and an optical recording medium capable of performing excellent optical recording with a simple structure in a recording layer made of environmentally friendly materials. The optical recording medium has a recording layer formed on a substrate and made of a mixture of a recording assist material and a dielectric material. A laser beam of which intensity is modulated in accordance with information to be recorded is irradiated onto this recording layer to cause a state change in the recording assist material and/or the dielectric material. The information can be recorded by changing optical characteristics thereof such as reflectivity. The recording assist material includes an element selected from Sn, Ti, Si, Bi, Ge, and C as a principle component, while the dielectric material as a base material for the dielectric layers is at least one of ZnS, SiO2, AlN, and Ta2O5.Type: GrantFiled: May 29, 2003Date of Patent: November 14, 2006Assignee: TDK CorporationInventors: Hiroyasu Inoue, Koji Mishima, Masaki Aoshima, Hideki Hirata, Hajime Utsunomiya, Hitoshi Arai, Yoshitomo Tanaka
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Patent number: 7116611Abstract: The present invention provides a control system of following a follow target position. A control system has a disturbance observer for obtaining a disturbance force estimation value and a speed estimation value as estimation values of a disturbance force and a speed as a speed to be controlled by using an actuator control signal cont and a zero follow position which can be observed. Since the disturbance force estimation value and speed estimation value are fed back.Type: GrantFiled: August 27, 2002Date of Patent: October 3, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Eiji Yokoyama