Patents Examined by Volvick Derose
  • Patent number: 11320885
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: May 3, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Patent number: 11316343
    Abstract: Embodiments provide capabilities by which a user provides interactive inputs for allocating use of the available power budget of an IHS (Information Handling System) when a conflict in the power budget is detected. The power demand of the IHS processor(s) is monitored. When a USB device is coupled to the IHS, a power output to the USB device is enabled within the available power budget. Upon detecting an increase in the power demand of the processor, the power budget may be exceeded. The user is then prompted to specify whether to prioritize use of the power budget for performance of the IHS or for charging the USB device. Based on inputs provided by the user, the processor may be throttled or the power output to the USB device may be reduced. The user is thus provided a capability for resolving individual power budget conflicts based on the user's current preferences.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: April 26, 2022
    Assignee: Dell Products, L.P.
    Inventors: Jonathan C. Giffen, Keith Lambright
  • Patent number: 11307870
    Abstract: A wearable device includes first and second electronic modules, a connection module configured to electrically connect the first electronic module to the second electronic module, and a length adjusting module of which length is adjustable to bring the connection module in contact with a user. The length adjusting module comprises first and second fastening units configured to be assembled and disassembled and configured to be locked together in a fastened position when assembled. When the first and second fastening units are assembled, the first fastening unit is electrically connected to the second fastening unit and a length of the length adjusting module is adjusted.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: April 19, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-woo Ko, Dong-wook Kwon, Jeong-hoon Park, Ga-hyun Joo
  • Patent number: 11307867
    Abstract: Systems and methods use machine learning to find an efficient startup sequence for the components of an application. An example method includes receiving the plurality of components of the modular system and a mechanism for launching the modular system and invoking a machine-learning ordering tool to generate at least one startup sequence. The at least one startup sequence may be returned with corresponding launch metrics. The method may also include determining, based on launch metrics for the at least one startup sequence, whether an efficient sequence has been identified. Responsive to the efficient sequence being identified, the operations can include returning the efficient startup sequence, wherein the modular system is launched using the efficient startup sequence. Responsive to failing to identify the efficient sequence, the operations can include repeating the invoking and determining.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: April 19, 2022
    Assignee: ADOBE INC.
    Inventors: Nitika Agarwal, Carsten Ziegeler, Allaert Joachim David Bosschaert
  • Patent number: 11307907
    Abstract: Information handling systems (IHS) and methods are provided to automatically synchronize operating system (OS) and boot firmware languages. In one embodiment, a method may detect a change in an active OS language from a first language pack to a second language pack, notify the boot firmware that the active OS language was changed, and provide an identity of the second language pack to the boot firmware during OS runtime. When the IHS is subsequently rebooted, the active boot firmware language may be synchronized to the active OS language. In another embodiment, the method may detect a change in an active boot firmware language from a first language pack to a second language pack, notify the OS that the active boot firmware language was changed, and provide an identity of the second language pack to the OS during a pre-boot phase. When the OS is subsequently booted, the active OS language may be synchronized to the active boot firmware language.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 19, 2022
    Assignee: Dell Products L.P.
    Inventors: Shubham Kumar, Ibrahim Sayyed, Manjunath Gr, Debasish Nath, Balasingh P. Samuel, Michael W. Arms
  • Patent number: 11307627
    Abstract: Systems and methods described herein make previously stranded power capacity (power that is provisioned for a data center according to a computing system's nameplate power consumption but is currently not useable) available to the data center. Systems described herein generate empirical power profiles that specify expected upper bounds for the power consumption levels that applications trigger. Using the upper bounds for application power-consumption levels, a computing system described herein can reliably release part of its provisioned nameplate power for other systems or data center consumers, reducing the amount of stranded power in a data center. The method described herein avoids performance penalties for most jobs by using sensor measurements made at a rapid rate explained herein to ensure that a system power cap based on running application's measured peak power consumption is reliable with reference to the power capacitance inherent in the computing system.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: April 19, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Torsten Wilde, Andy Warner, Steven Dean, Steven Martin, Pat Donlin
  • Patent number: 11301026
    Abstract: An information processing apparatus that is capable of securing electric power needed to complete data writing to a nonvolatile memory even if supplied voltage drops. The information processing apparatus includes a nonvolatile memory, a volatile memory that caches write data to the nonvolatile memory. A first power supply unit generates electric power supplied to the nonvolatile memory and the volatile memory by a switching operation. A power source controller lowers a switching frequency of the first power supply unit and controls the first power supply unit to supply the electric power to the nonvolatile memory and the volatile memory in a case where voltage supplied to the information processing apparatus drops.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: April 12, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Tsutomu Kubota
  • Patent number: 11304137
    Abstract: The present invention is directed to energy-efficient hibernation in indoor wireless localization systems. A tag passively associates with a detection point (DP) and establishes a reveille time. The tag will awaken at the reveille time and send or receive a beacon to or from its associated DP. If the tag is receiving a beacon, it will awaken, receive, phase-lock its clock based on when the beacon was expected and when it was actually received, and return to hibernation. The DP transmits a scattershot of beacons, one for every tag in the system. If the tag is sending a beacon, it will awaken, send its beacon, and return to hibernation. The DP will receive the beacon and adjust its own clock based on the delay between when the beacon was expected and when it was actually received. The tag will broadcast its location to the DP on a set interval.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: April 12, 2022
    Assignee: TRAKPOINT SOLUTIONS, INC.
    Inventors: Jon Siann, Christopher Williams
  • Patent number: 11301263
    Abstract: A method, computer program product, and computing system for receiving a plurality of input/output (IO) commands for a plurality of configuration objects of a storage system. A modification command for a configuration object of the plurality of configuration objects may be received. The configuration object may be suspended in response to receiving the modification command. One or more IO commands directed to the suspended configuration object from the plurality of IO commands may be processed before the configuration object is modified.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: April 12, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Eldad Zinger, Ran Anner
  • Patent number: 11294691
    Abstract: A capsule-based firmware update process is provided. After an operating system has provided a firmware update in the form of a capsule and the computing system is rebooted, a module can be loaded to locate a memory subsystem separate from the system memory. The module can initialize the separate memory subsystem and then identify a contiguous block of memory within the separate memory subsystem. The module can then cause the capsule to be coalesced from the system memory into the separate memory subsystem. Once the capsule is coalesced into the separate memory subsystem and the system memory is registered, the module can cause the coalesced capsule to be copied back into system memory where it can be accessed by other components that are subsequently loaded during the boot process.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 5, 2022
    Assignee: Dell Products L.P.
    Inventors: Sumanth Vidyadhara, Karunakar Poosapalli
  • Patent number: 11296904
    Abstract: An Ethernet transceiver is disclosed. The Ethernet transceiver includes transceiver circuitry to couple to one end of an Ethernet link. The transceiver circuitry includes transmit circuitry to transmit high-speed Ethernet data along the Ethernet link at a first data rate and receiver circuitry. The receiver circuitry includes adaptive filter circuitry and correlator circuitry. The receiver circuitry is responsive to an inline signal to operate in a low-power alert mode with the adaptive filter circuitry disabled and to receive alert signals from the Ethernet link simultaneous with transmission of the Ethernet data by the transmit circuitry. The alert signals are detected by the correlator circuitry and include a sequence of alert intervals exhibiting encoded data at a second data rate less than the first data rate.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: April 5, 2022
    Assignee: Marvell Asia Pte Ltd
    Inventors: Saied Benyamin, Seid Alireza Razavi Majomard
  • Patent number: 11288374
    Abstract: An information processing device (1) includes: a decoding circuit (12b), provided on a data bus (DB) for connecting a main memory (101) and an external storage device (11), which is capable of switching between enabling and disabling a process for decoding information that is transmitted through the data bus (DB); and a CPU (100) that is configured to read out information written in the external storage device (11) into the main memory (101). The CPU (100) is configured to enable the decoding process of the decoding circuit 12b in a case where a snapshot image of the main memory 101 is read out as the information written in the external storage device (11).
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: March 29, 2022
    Assignee: MITSUBISHI HEAVY INDUSTRIES MACHINERY SYSTEMS. LTD.
    Inventors: Naruhisa Kameo, Hiromichi Nakamoto, Hiroyuki Nakayama
  • Patent number: 11287869
    Abstract: A new approach contemplates systems and methods to support control of power consumption of a memory on a chip by throttling port access requests to the memory via a memory arbiter based on a one or more programmable parameters. The memory arbiter is configured to restrict the number of ports being used to access the memory at the same time to be less than the available ports of the memory, thereby enabling adaptive power control of the chip. Two port throttling schemes are enabled—strict port throttling, which throttles the number of ports granted for memory access to be no more than a user-configured maximum throttle port number, and leaky bucket port throttling, which throttles the number of ports granted for the memory access down to be within a range based on a number of credit tokens maintained in a credit register.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: March 29, 2022
    Assignee: Marvell Asia Pte Ltd
    Inventors: Heeloo Chung, Sowmya Hotha, Saurabh Shrivastava, Chia-Hsin Chen
  • Patent number: 11281514
    Abstract: A processing system includes a timer circuit and a processing circuit. The timer circuit is configured to generate a system time signal. The processing circuit is configured to receive the system time signal, detect whether the system time signal reaches or exceeds a given reference value, and start execution of a given processing operation in response to the detection. The timer circuit has associated an error code calculation circuit configured to compute a first set of error detection bits as a function of bits of the system time signal. The processing circuit has an associated error detection circuit configured to: compute a second set of error detection bits as a function of the bits of the system time signal received, compare the first set of error detection bits with the second set of error detection bits, and generate an error signal in response to the comparison.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: March 22, 2022
    Assignee: STMICROELECTRONICS APPLICATION GMBH
    Inventor: Roberto Colombo
  • Patent number: 11269373
    Abstract: The present disclosure relates to systems and methods to maintain clock synchronization of multiple computers, or computer systems, through the exchange of communication messages that include clock and/or timing information.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: March 8, 2022
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Eric Karl Mautner, Brianna Klingensmith
  • Patent number: 11256316
    Abstract: Methods, apparatus, and processor-readable storage media for automated device power conservation using machine learning techniques are provided herein. An example computer-implemented method includes obtaining usage-related data from one or more processing devices; determining at least one usage pattern for the one or more processing devices by processing the obtained usage-related data using one or more machine learning techniques; automatically generating, based at least in part on the at least one determined usage pattern, instructions pertaining to controlling one or more power states of the one or more processing devices; and performing at least one automated action based at least in part on the generated instructions.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: February 22, 2022
    Assignee: Dell Products, L.P.
    Inventors: Tamilarasan Janakiraman, Sreeram Muthuraman, Balamurugan Gnanasambandam, Charu Lata Ojha, Santosh Kumar Sahu, Vaishnavi Suchindran
  • Patent number: 11256778
    Abstract: Methods and apparatus for using characterized devices such as memories. In one embodiment, characterized memories are associated with a range of performances over a range of operational parameters. The characterized memories can be used in conjunction with a solution density function to optimize memory searching. In one exemplary embodiment, a cryptocurrency miner can utilize characterized memories to generate memory hard proof-of-work (POW). The results may be further validated against general compute memories; such that only valid solutions are broadcasted to the mining community. In one embodiment, the validation mechanism is implemented for a plurality of searching apparatus in parallel to provide a more distributed and efficient approach. Various other applications for characterized memories are also described in greater detail herein (e.g., blockchain, social media, machine learning, probabilistic applications and other error-tolerant applications).
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: February 22, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Jonathan D. Harms
  • Patent number: 11249817
    Abstract: To enhance the scaling of data processing systems in a computing environment, a number of data objects indicated in an allocation queue and a first attribute of the allocation queue are determined, where the allocation queue is accessible to a plurality of data processing systems. A number of data objects indicated in the allocation queue at a subsequent time is predicted based on the determined number of data objects and the first attribute. It is determined whether the active subset of the plurality of data processing systems satisfies a criterion for quantity adjustment based, at least in part, on the predicted number of data objects indicated in the allocation queue and a processing time goal. Based on determining that the active subset of data processing systems satisfies the criterion for quantity adjustment, a quantity of the active subset of data processing systems is adjusted.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 15, 2022
    Assignee: Palo Alto Networks, Inc.
    Inventor: Philip Simon Tuffs
  • Patent number: 11249770
    Abstract: Disclosed are various embodiments for provisioning client devices. A configuration file previously installed on the computing device can be read. The configuration file can contain a provisioning address. Then, a user account is automatically created using a predefined username and credential stored in the configuration file. Next, an enrollment request can be sent to the provisioning address to enroll the computing device with a provisioning service using the user account. In response, an enrollment response can be received from the provisioning service. The computing device can then be configured based upon the enrollment response.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: February 15, 2022
    Assignee: VMware, Inc.
    Inventors: Kishore Krishnakumar, Vijay Chari Narayan, Brooks Peppin, Paul Adam Ryman, Rob Schlotman
  • Patent number: 11243561
    Abstract: The present disclosure relates to systems and methods to maintain clock synchronization of multiple computers, or computer systems, through the exchange of communication messages that include clock and/or timing information.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: February 8, 2022
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Eric Karl Mautner, Brianna Klingensmith