Abstract: A jig (10 is provided for testing high speed integrated circuit devices (52). The jig includes a lead guide (50) for automatically aligning the IC leads (54) with the signal carrying traces (22). The underside of the jig is provided with a grounded pad (30) that enables leadless external components (86) to be easily connected to given leads of the IC under test.

Abstract: A current probe is provided which comprises a handle and a ring of magnetisable material for positioning around an electrical conductor, the ring being split into two portions one being fixed relative to the handle and the other being slidable therewithin between a position in which the ring is closed and a position in which the ring is open. The line of split of the ring is at an angle from the line of sliding movement of the linearly slidable portion. Damping is provided to prevent the slidable portion of the ring from too rapidly moving from a position in which the ring is open to a position in which the ring is closed.

Abstract: A current sensor for use with a conductor with known cross-sectional characteristics is an electronic circuit having a monolithic Hall-effect element disposed substantially perpendicular to the conductor first major surface. A conductive loop substantially encircles the element and is oriented such that its flux is substantially orthogonal to the element surface. An amplifier sets current flow in the loop responsive to minimization of the differential Hall voltage across element. The loop current, at null, will be related to the conductor current by the ratio of the conductor flux path length to the loop flux path length.

Abstract: A high performance test fixture is disclosed for testing integrated circuit chips which permits high throughput and good heat dissipation wherein flexible contact apparatus carried by said test fixture are urged into contact with the corresponding contacts on an integrated circuit chip using a pressurizable chamber wherein the flexible contact member carrying the test fixture contacts constitutes one wall of the chamber whereby pressurizing the chamber urges the flexible contact member and the contacts carried thereon against the chip. In a preferred embodiment, the chamber is pressurized by a cooling gas which compensates for the heat generated during the testing; and the test fixture is provided with apparatus to vibrate the contacts thereon in a lateral direction over the chip contacts to thereby remove oxide on the chip contacts to ensure a better electrical contact between the chip contacts and the test fixture contacts.

Abstract: A system for providing concurrent access to an addressable memory space by a plurality of data processing devices includes a plurality of independently accessible memory banks, each memory bank providing a separate portion of the addressable memory space. A memory management unit includes address and data multiplexers corresponding to each memory bank for providing access by any selected one of the data processing devices to the corresponding memory bank and also includes circuits for controlling the multiplexers to permit different processing devices to access different memory banks at the same time while arbitrating competing demands for the same memory bank.

Abstract: A method and apparatus for measuring the characteristics of a photoconductive semiconductor wafer. The apparatus comprises a light source for directing light of substantially uniform intensity toward one surface of the wafer. The apparatus further comprises masking apparatus, interposed between the wafer and light source, for transmitting the light to the wafer in the shape of a cross formed by a pixel of light at the intersection of the cross and four paths extending outwardly from the pixel to the periphery of the wafer. The apparatus also comprises a first set of contacts for providing an electrical contact with the paths of light. The apparatus further comprises control apparatus connected to each of the contacts of the first set, for applying current successively to each of four sets of adjacent paths of light and measuring the voltage across the opposing set of adjacent paths in response to each application of current.

Abstract: A method and circuit arrangement for measuring in-phase current and quadrature current in an electrical alternating current power supply is disclosed. The invention uses a microprocessor whereby four integral values A.sub.1 through A.sub.4 are combined in such as to allow determination of the in-phase current and the quadrature current. The invention is useful in recording in-phase and quadrature components of current from an alternating current power supply.

Abstract: A bimetallic indicator includes a bimetal being deformed by heat generated by an electric current supplied to a heat coil wound around the bimetal, a pointer moved in relation to the deformation of the bimetal and indicating a measured value in accordance with an amount of electric current supplied to the heating coil, and a driving gear, which is rotated by the deformation of said bimetal. The driving gear includes two first pitch portions each having a plurality of teeth with a regular pitch and a second pitch portion provided between the first pitch portions and having a pitch smaller than that of the first pitch portion. A driven gear to which the pointer is mounted is engaged with the driving gear and rotated together with the pointer by the rotation of the driving gear. The rotation of the driving gear is transmitted to the driven gear only when the first pitch portion of the driving gear is in engagement with the driven gear.

Abstract: The disclosed apparatus provides a universal wheeled cart for carrying electronic devices to be stress tested in a sealed environmental chamber in which the temperature is varied between high and low limits while the power to the electronic components is being turned on and off. The cart is configured to substantially fully occupy the insulated heated chamber which is provided with tracks for the wheels of the cart. In addition to a front access door for admitting the cart, the chamber is provided with a rear rectangular aperture through which a novel rectangular bustle mounted on the cart extends. The bustle support a plurality of connectors through which power is supplied to the electronic devices. Complementary power actuated electrical connectors are mounted in fixed relation to the rear aperture, and when actuated, all power connections to the electronic components are made through the bustle and standardized busses on the cart.

Abstract: A contactless technique for semiconductor wafer testing comprising: depositing charges on the top surface of an insulator layer over the wafer to create an inverted surface with a depletion region and thereby a field-induced junction therebelow in the wafer, with an accumulated guard ring on the semiconductor surface therearound. The technique further includes the step of changing the depth to which the depletion region extends below the inverted semiconductor wafer surface to create a surface potential transient, and the step of measuring a parameter of the resultant surface potential transient. This technique may be utilized to make time retention and epi doping concentration measurements. It is especially advantageous for reducing the effects of surface leakage on these measurements. In a preferred embodiment, corona discharges are used to effect the charge deposition configuration. Either corona discharge or photon injection are used to change the depletion region depth.

Abstract: For controlling d-c motors which are supplied with an armature current obtained by phase gating, the bucking voltage induced in the motor is particularly well suited. This voltage is calculated indirectly by a measuring unit which calculates the instantaneous bucking voltage of the d-c machine as a function of the phase gating angle calculated in the preceding computing cycle, the measured current conduction angle, the measured magnitude of the line voltage, the mean armature current value and the armature circuit resistance specific to the machine and the armature circuit inductance specific to the machine.

Abstract: A unique automatic test system (100) is provided in which timing signals are generated in a novel manner as compared with prior art test systems. All adjustments for propagation delays of timing signals are made in a digital fashion, by adjusting the digital information which defines when an analog timing signal is to be generated. Deskewing of propagation delays is performed automatically under computer control, rather than by requiring careful adjustment of hardware deskewing elements. By adjusting for propagation skews digitally, propagation skews dependent on data values (logical 0 and logical 1) can be made. Furthermore, timing signals are provided by three timing edges, rather than by a timing pulse, thereby allowing more accurate generation of timing signals.

Abstract: A test fixture for automatic testing equipment including short wire interface assembly which permits the interface assembly to be hard wired to a test head assembly with relative short interconnect wires. The interface SW assembly includes a base cover plate having a plurality of cavities formed therein, a plurality of individual interface strips having flexible vacuum seals affixed thereto and interface contacts disposed therethrough, and a plurality of floating captive contacts disposed in the base cover plate to provide mechanical and electrical interfacing between the interface contacts and spring-loaded probes electrically connected to the ATE. The individual interface strips are readily positionable adjacent the test head assembly and rotatable to facilitate hard wiring. The hard wired interface strips are suspended in respective cavities of the base cover plate with the flexible vacuum seals in contact with a surface of the base cover plate.

Abstract: A high frequency probe for a logic analyzer adapted to operate with different types of logic circuits, and signals which may or may not be superimposed on a dc component. After an input capacitance, a high frequency amplifier feeds both an output terminal and a compensator circuit which compares the deviation between low frequency or dc components appearing at the input and output terminals, and compensates for the deviation by reinjecting a signal at the input of the high frequency amplifier. Variable attenuation may also be also be included between the high frequency amplifier and the output terminal.

Abstract: A connection of each of the terminals of a semiconductor device under test (DUT) with a test signal provided from a tester and a connection of each of the above stated terminals with a power supply system in the tester are selected in an arbitrary manner based on the serial data for designating connections provided from the tester.

Abstract: An electric circuit testing equipment wherein signals are picked up from a selected point in the circuit by a probe unit (41) capacitively coupled to the selected point and the signals picked up by the probe unit are conditioned by circuits (47 to 61) which produce an output signal corresponding only to signals picked up by the unit from the selected point. The use of a capacitively coupled probe unit reduces the possibility of the unit affecting the operation of the circuit under test while the conditioning of the picked up signals enables the pick-up of unwanted signals to be tolerated. Designs of probe unit to minimize pick-up of unwanted signals are also described.

Abstract: A printed wiring board tester which comprises first and second fixture members disposed in spaced-apart, substantially parallel relationship with respect to each other, a plurality of probe pins disposed between the first and second fixture members, and slidably extending therethrough, the probe pins comprising a first pin element having a large diameter section connected with a small diameter section by a stepped portion, the larger diameter section having a free end which is provided for engagement with the terminal area of a printed wiring board to be tested, a cylindrical second pin element divided into large and small diameter sections, the larger diameter section slidably fitting over the small diameter section of the first pin element with the end thereof defining a stopper jaw which engages the stopped portion, and a cord connecting element extending into and connected to the small diameter section of the second pin element, and a third pin element comprising a coiled spring member which is loosely fi

Abstract: The disclosed invention is primarily directed to sensor modules for mounting directly upon energized electrical power lines to monitor parameters associated with operation thereof, wherein the modules have a more compact lateral configuration than prior art modules designed for the same purpose. The modules include a first, cylindrical housing portion containing the sensors and other electronic data processing and transmitting elements, and a second housing portion, affixed to the exterior of the first portion and extending not more than about 150.degree. around the periphery thereof, and enclosing mechanical elements of the module mounting.

Abstract: An apparatus and a relative method which permit carrying out a complete cycle of functional tests and parametric measurements on EPROM type semiconductor devices during their permanence inside a burn-in chamber, thus greatly reducing the time necessary for testing and classifying the devices, besides ensuring a higher reliability. The system utilizes special "intelligent" cards, i.e. provided with a card microprocessor which may be connected to a supervisory system's CPU directing the test and classification process of the devices.

Abstract: A DC power monitor includes a reference voltage and voltage dividers for obtaining voltages which are respectively above and below the reference level when the voltages being monitored are at their nominal value. Comparators compare the divided voltages with the reference and the comparator outputs are Anded and coupled through a flip flop to a bicolor LED which is one color when the voltages are in tolerance and another color when out of tolerance.