Abstract: A digital energy meter for providing energy measurements of nonsinusoidal waveforms. Voltage and related current components of a digitally sampled waveform are multiplied to form a product representative of instantaneous power. The products are summed or accumulated over a first time period, and the sums then accumulated over a second time period to form a second sum representative of total power over the second time period. An energy measurement is then obtained by an algorithm which requires only a simple division by a power of two.

Abstract: A "hot-stick" mountable sensor module for attachment and removable from a live power transmission line. A tool is insertable into a mounted module to attach the module to the tool and permit removal of the module from the line.

Abstract: A microstrip probe blade which has a ceramic body (20) with a microstrip (26) on one side and a metalized ground plane (30) on the other. A straight needle (32) having a tapered end and a spherical tip is attached to the microstrip axially and protrudes from the body parallel to the microstrip such that a high frequency signal may be conducted through the device with a minimum of electrical aberations. With this blade test, frequencies as high as 10 gigahertz may be achieved overcoming previous frequency limitations. The probe blade by virtue of the ground plane (30) wrapping around slightly to the microstrip side of the body (20) allows the addition of resistors (36) or chip capacitors (38) to minimize electrical spikes, transients, and unwanted opscillations to power supply frequencies.

Abstract: In a power sensor for RF power measurments, comprising a thin-film absorbing resistor formed on the top surface of a support member and a thermocouple which is electrically isolated from the circuit of said absorbing resistor, the absorbing resistor is formed on an insulating film of a silicon support member so as to increase the sensitivity and to facilitate manufacture thereof, the silicon support member including an island formed beneath the absorbing resistor, a thermally conducting portion formed in spaced relationship thereto with a narrow bridge portion provided inbetween, and said thermocouple being constituted by the bridge portion and by mutually spaced contact zones formed thereon.

Abstract: Covering metal test pads of a passivated integrated circuit process intermediate wafer or completed integrated circuit chip-to-test, with a thin conductive overlayer, and then accessing the test pads through the passivation layer and conductive overlayer, by a pulsed laser to provide voltage-modulated photon-assisted tunneling through the insulation layer, to the conductive overlayer as an electron current, and detecting the resulting electron current, provides a nondestructive test of integrated circuits. The passivation, normally present to protect the integrated circuit, also lowers the threshold for photoelectron emission. The conductive overlayer acts as a photoelectron collector for the detector. A chip-to-test which is properly designed for photon assisted tunneling testing has test sites accessible to laser photons even though passivated.

Abstract: A switched-capacitor integrator is employed in an electronic watthour measurement device for integrating the average component of a product signal formed by pulse-width modulating an analog signal proportional to one of a load current and voltage at a pulse duty ratio proportional to the other of the load current and voltage. A hysteresis comparator forces the direction of integration to alternate between positive and negative limits for balancing out offset voltages in the integrator and comparator. A triangular-wave generator employed as part of the pulse-width-modulation technique is also implemented using a switched-capacitor integrator. The switched-capacitor integrators permit fabrication of the circuit with the required accuracy without needing external, discrete time-constant-determining resistances and capacitances. Measurement accuracy is determined by the ratio of capacitances of two on-chip capacitors, the accuracy to a clock signal and two reference voltages.

Abstract: A circuit for providing DC bootstrapping to an AC amplifier integrates a sample of the output of the amplifier and feeds the result of that integration to the input of the amplifier, thereby driving the input of the amplifier to a zero potential level. The integration can be accomplished by an operator amplifier and a capacitor in a feedback circuit.

Abstract: This method, allowing pointing out of the effects of one manufacture parameter independently from other parameters and phenomena and yielding very high precision in measurement, comprises a first step in which a symmetrical resistive bridge is formed, comprising a pair of test resistive arms having topological characteristics related to the process or phenomenon to be evaluated and a pair of reference resistive arms. Each pair of arms is formed by two reciprocally counterposed resistors with identical topography and value. The method furthermore comprises a second step in which a current, having a known value, is applied to the bridge, the voltages present in suitable points of the bridge are measured, and the difference in conductance between the pair of test resistive arms and the reference arms is calculated according to the known or calculated current and voltage values.

Abstract: Evaluating method and apparatus for a test voltage by use of a bandwidth-limited evaluation circuits. For evaluation of a measured signal dependent on a variable parameter, an identification is first undertaken with a broad-band evaluation circuit to determine whether an interesting sub-region of the overall variation region of the parameter has been reached. When this is the case, then a reduction of the bandwidth of the evaluation circuit and a reduction of the variation rate of the parameter occurs in order to be able to evaluate with high sensitivity in the interesting sub-region.

Abstract: The system is for testing semiconductor components such as TTL components and CMOS components to determine whether the input, output and ground pins are conductively connected to a circuit, such as the circuit of a printed circuit board, and whether proper conductive paths exist between the connector pins and the ground pin through the semiconductor. This is accomplished by providing a current pulse on one terminal to generate a voltage drop across an inherent resistance of the component which is connected in series with the other terminal of the component and detecting the resulting voltage drop. The existence of the voltage drop indicates that both the input and output terminals, as well as the ground terminal, are properly connected to the printed circuit board.

Abstract: A system and method for unambiguously determining the orientation of a semiconductor component in a circuit. The invention draws a predetermined biasing current from the signal node of a circuit that is sufficient to forward bias protection and/or parasitic diodes that exist between the ground pin and signal pin of the semiconductor component. Hence, if all of the semiconductors coupled to a signal node are connected in proper orientation, a voltage of -V.sub.D will be detected on the signal node. A voltage of approximately two diode voltage drops is applied to the power node so that the protection and/or parasitic diodes of a semiconductor placed in the circuit in reverse orientation will be forward biased to produce a voltage on the signal node equal to approximately one diode voltage drop. Missing components and bent pins do not affect the results of the test performed by the present invention.

Abstract: An apparatus for use in thermally testing electrical components, especially microelectronic components, such as dual in-line integrated circuit packages is disclosed. The apparatus is for use in testing the electrical performance of components when subjected to elevated temperature. Heat is applied through resistive heating elements disposed adjacent the electrical components which are mounted in electrical connectors, such as DIP sockets. Separate test and heater printed circuit boards attachable to conventional edge connectors can be employed. Insulation completely surrounds the sockets and the electrical components. Heating elements having a ferromagnetic-nonferromagnetic layer construction and exhibiting constant temperature regulation at a characteristic Curie point can be employed.

Abstract: A system for inspecting exposure pattern data in the form of coordinate data for forming a reticle of a semiconductor integrated circuit device, on the basis of video signals. The inspection system includes a unit for inputting exposure pattern data in the form of coordinate data form in response to a request for a test region, converting the input exposure pattern data to data corresponding to an actual pattern in a two-dimensional form, storing the converted data, and outputting the stored data in the form of video signals; a unit for testing the exposure pattern data from the inputting and converting unit on the basis of the video signals under a predetermined pattern rule; and a unit for outputting data tested at the pattern testing unit. The pattern test unit includes a variety of test circuits, such as a slit test circuit, a comparator, a combination circuit, etc., used for a pattern test.

Abstract: A stroboscopic type potential measurement device is disclosed, in which a waveform of a periodically varying voltage at a location irradiated with a charged particle pulsed beam is measured by using the charged particle pulsed beam synchronized with a periodically varying voltage in a sample and varying the relation in the phase between the periodically varying voltage in the sample and the charged particle pulsed beam. In order to reproduce a potential waveform, which is close to the original waveform, two sorts of measurements having different phase division pitches are effected and a measurement result is formed by combining a measurement result obtained by using a coarse phase division and that obtained by using a fine phase division. A phase scanning with the coarse phase division pitch is repeated for every fine phase division pitch.

Abstract: An improved apparatus for stress testing a plurality of electronic circuits each formed on a wafer-like chip along at least one edge thereof and comprising a separate socket (60 of FIG. 1) having a set of contacts for receiving and holding one of the wafers with the set of contacts making contact with the edge contacts of the wafer it is holding and a plurality of terminal pins which are connected to the wafer edge contacts through the set of contacts and with the terminal pins of each socket being arranged in identical patterns. The apparatus comprises a multilayered printed circuit board (FIG. 4) having a plurality of identical groups of conductively plated holes (PTHs) (FIG. 15) formed therein for each socket and with each group of PTH's comprising the plurality of pin terminal holes (FIG. 15) arranged to receive the terminal pins of one of the sockets and a plurality of via holes (FIG.

Abstract: A method and system for the electrical and electro-optical inspection and testing of unpopulated electronic printed circuit boards, ceramic substrates and other like items which have conductive pathways formed thereon, vias, through-connectors and other interconnected conducting surfaces. The item under test is placed within a sealable gastight chamber filled with an ionizable gaseous atmosphere, such as argon, at low pressure. An electro-luminescent gas plasma discharge is produced within the chamber between a grid placed either over or below the item under test by application of a positive polarity potential to the grid and selective application of a constant current negative potential to particular test points on the item to be tested via a computer controlled movable probe.

Abstract: An ammeter is used for measuring the current flowing through a lead on a printed circuit board having a four point probe contacting the printed wire under test. Each probe points is spring loaded and approximately one millimeter separates adjacent probe points. The center two probe points are coupled to the inputs of a high gain chopper stabilized operational amplifier which provides a signal related to the voltage between the center two probe points as a result of the line resistance. The operational amplifier must have a very low and stable input offset voltage. The amplifier signal is applied to the base electrodes of a bipolar current driver circuit, such as two opposite polarity Darlington circuits, which respectively have a source of positive and negative voltage coupled to flow through the collector emitter electrodes when the signal applied to the base renders the collector emitter conductive.

Abstract: Built-in self-test programmable logic arrays use a deterministic test pattern generator to generate test patterns such that each cross point in an AND-plane can be evaulated sequentially. A multiple input signature register which uses X.sup.Q +1 as its characteristic polynomial is used to evaulate the test results, where Q is the number of outputs. The final signature can be further compressed into only one bit. Instead of only determining the probability of fault detection, in this scheme, the fault detection capability has been analyzed using both the stuck at fault and the contact fault model. It can be shown that all of these faults can be detected. Shorts between two adjacent lines can be detected by using NOR gates.

Abstract: Disclosed is an apparatus and method for sensing power in a variable frequency machine. The power is sensed in each phase of the three phase machine by utilizing Hall generators for multiplying the phase current flowing through each phase by a current proportional to a phase voltage for each phase. The products are then summed to obtain a reading of the instantaneous power drawn by the three phase machine. The AC component is filtered out of the summed signal using a multi-stage filter which allows for maintaining of a fast response time with low ripple. In a preferred embodiment, a four stage filter utilizing R.C. filters is employed for this purpose.

Abstract: An integrated circuit having a built-in self test facility, the integrated circuit being partitioned into a number of sub-circuits each of which comprises a combinatorial logic circuit and a register. The sub-circuits are coupled together so that each combinatorial logic circuit has its inputs coupled to at least one register, has its outputs coupled to at least one register, and the output of the overall integrated circuit is taken from one or more registers. Each register has its fucntional mode controlled by predetermined signals to an associated local decoder, the functional modes of the registers being selected to initiate a test operation for the testing of the integrated circuit.