Abstract: An active-matrix addressing substrate improves the degradation of initial alignment of liquid-crystal molecules caused by the steps or level differences due to the pixel electrodes and/or the common electrode. The pixel electrodes are formed on or over the first insulating layer and the common electrode is formed on the second or third insulating layer. The second insulating layer has steps or level differences due to the pixel electrodes in their vicinities. The second insulating layer is made of a dielectric material having fluidity prior to hardening, e.g., an acrylic resin. The steps of the second insulating layer are relaxed, resulting in the gently sloping steps. The steps of an overlying alignment layer due to the common electrode slope gently as well. The thickness of the pixel electrodes, the thickness and inclination angle of the second insulating layer, and the thicknesses of the pixel and common electrodes are defined.

Abstract: A method for manufacturing a biosensor is provided. The method may include positioning a shadow mask containing a pattern of a plurality of feature sets over a substantially planar base layer containing a plurality of registration points. The method may also include forming at least one of the plurality of feature sets on the substantially planar base layer by selectively depositing a layer of a conductive material on the substantially planar base layer by passing the conductive material through the pattern of the shadow mask and removing the shadow mask from the substantially planar base layer. Alternatively, the method may include providing a laminate structure including a substantially planar base layer containing a plurality of registration points and a photoresist layer containing a pattern of a plurality of feature sets.

Abstract: A device that stabilizes a workpiece during processing includes a first workpiece carrier part, a second work piece carrier part, and a fixing unit that mutually fixes the workpiece carrier parts in such a way that the workpiece is held between the first and-second workpiece carrier parts. The first workpiece carrier part has a patterned mask. In this way, the production costs can be significantly reduced particularly in the case of workpieces at risk of fracture.

Abstract: A method of manufacturing a quartz crystal vibrating piece is provided. Etching masks of different sizes are each arranged on respective front and rear surfaces of a quartz crystal wafer such that the etching mask on one of the surfaces (e.g., the rear surface) is larger than the other etching mask. The quartz crystal wafer is etched using the etching masks so that a projection is formed on a side of the quartz crystal wafer due to the difference in size of the etching masks, and is overetched to remove the projection.

Abstract: A method of producing a thin film transistor comprises irradiating a resist on a glass base plate with a ray from a light source through a mask and, thereafter, developing the resist to form contact holes, using an i-ray as the ray.

Abstract: In a method for producing a silicon single by pulling the silicon single crystal from a silicon melt contained in a crucible, a magnetic field is applied to the silicon melt in a radial direction of the silicon single crystal, and a vertical level of a center of the magnetic field relative to a surface of the silicon melt is controlled such that a thermal gradient in an axial direction of the crystal is maintained at a constant value in respective portions along a radial direction of the silicon single crystal.

Abstract: To provide a back-illuminated solid-state imaging device able to suppress a crystal defect caused by a metal contamination in a process and to suppress a dark current to improve quantum efficiency, a camera including the same and a method of producing the same, having the steps of forming a structure including a substrate, a first conductive type epitaxial layer and a first conductive type impurity layer, the first conductive type epitaxial layer being formed on the substrate to have a first impurity concentration, and the first conductive type impurity layer being formed in a boundary region to have a second impurity concentration higher than the first impurity concentration of the epitaxial layer; forming a second conductive type region storing a charge generated by a photoelectric conversion in the epitaxial layer; forming an interconnection layer on the epitaxial layer; and removing the substrate.

Abstract: An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about ?70° to about +70°.

Abstract: Provided is a method for fabricating an image sensor using a wafer back grinding process. The method includes: forming a microlens protection layer over a substrate structure including a light sensing device and other associated devices; opening a pad open unit of the substrate structure using a mask; removing the mask; forming a photoresist layer over the substrate structure with the microlens protection layer; gluing a tape on the photoresist layer; performing a wafer back grinding process; and removing the tape and the photoresist layer.

Abstract: Provided is an image sensor including an overcoating layer and at least two micro lenses formed on the overcoating layer. The image sensor is characterized in that the overcoating layer positioned below a clearance between the micro lenses is etched such that curved surfaces of the micro lenses extend to the etched overcoating layer, and a contamination in the bonding pad can be prevented.

Abstract: A capacitor with a nano-composite dielectric layer and a method for fabricating the same are provided. A dielectric layer of a capacitor includes a nano-composite layer formed by mixing X number of different sub-layers, X being a positive integer greater than approximately 1. A method for forming a dielectric layer of a capacitor includes: forming a nano-composite layer by mixing X number of different sub-layers in the form of a nano-composition, X being a positive integer greater than approximately 1; and densifying the nano-composite layer.

Abstract: Provided are a semiconductor probe having a resistive tip, a method of fabricating the semiconductor probe, and a method of recording and reproducing information using the semiconductor probe. The semiconductor probe includes a tip and a cantilever. The tip is doped with first impurities. The cantilever has an end portion on which the tip is positioned. The tip includes a resistive area, and first and second semiconductor electrode areas. The resistive area is positioned at the peak of the tip and lightly doped with second impurities that are different from the first impurities. The first and second semiconductor electrode areas are heavily doped with the second impurities and contact the resistive area.

Abstract: On a glass substrate, gate bus lines, data bus lines, and TFTs are formed. Then, on the substrate, an insulating film, covering the gate bus lines, data bus lines and TFTs, is formed, and a positive type photoresist film is further formed thereon. Next, through exposure and development processes, the resist film is divided for each picture element and subjected to ultraviolet ray irradiation to harden only a surface layer thereof. Then, the resist film is subjected to heat treatment to form thereon wrinkle-form surface ruggedness of a uniform pattern, which is determined depending on the size of the resist film. Subsequently, reflection electrodes are formed on the resist film. The reflection electrodes are formed to overlap the gate bus line, data bus line and TFTs, and the regions between the adjacent reflection electrodes serve as light transmission regions.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line and a data line crossing each other to define a pixel region, a thin film transistor at a crossing of the gate and data lines, a metal pattern over the gate line, a passivation layer exposing the substrate in the pixel region, a part of the thin film transistor and a part of the metal pattern, and a pixel electrode in the pixel region. The pixel electrode is connected to the part of the thin film transistor and contacts the part of the metal pattern. The metal pattern has at least one curved portion in a side contacting the pixel electrode.

Abstract: A conventionally followed technique of manufacturing a liquid crystal display device is a method for forming various types of coatings over an entire surface of a substrate and for removing the coatings with a small region left by etching, which requires wasting a material cost and treating a large quantity of waste. A liquid crystal display device is manufactured by forming at least one or more of patterns necessary for manufacturing a liquid crystal display device by a method capable of selectively forming a pattern. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition prepared for a specific purpose is employed as the method capable of selectively forming a pattern.

Abstract: A method of fabricating thin films of semiconductor materials by implanting ions in a substrate composed of at least two different elements at least one of which can form a gaseous phase on bonding with itself and/or with impurities includes the following steps: (1) bombarding one face of the substrate with ions of a non-gaseous heavy species in order to implant those ions in a concentration sufficient to create in the substrate a layer of microcavities containing a gaseous phase formed by the element of the substrate; (2) bringing this face of the substrate into intimate contact with a stiffener; and (3) obtaining cleavage at the level of the microcavity layer by the application of heat treatment and/or a splitting stress.

Abstract: Lattice mismatched epitaxy and methods for lattice mismatched epitaxy are provided. The method includes providing a growth substrate and forming a plurality of quantum dots, such as, for example, AlSb quantum dots, on the growth substrate. The method further includes forming a crystallographic nucleation layer by growth and coalescence of the plurality of quantum dots, wherein the nucleation layer is essentially free from vertically propagating defects. The method using quantum dots can be used to overcome the restraints of critical thickness in lattice mismatched epitaxy to allow effective integration of various existing substrate technologies with device technologies.

Abstract: One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy process is performed to crystallize the amorphous semiconductor material using the crystalline substrate to seed the crystalline growth. The pillar has a sublithographic thickness. A transistor body is formed in the crystallized semiconductor pillar between a first source/drain region and a second source/drain region. A surrounding gate insulator is formed around the semiconductor pillar, and a surrounding gate is formed around and separated from the semiconductor pillar by the surrounding gate insulator. Other aspects are provided herein.

Abstract: Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the material from portions of the back side of the workpiece without thinning the entire workpiece. The bulk removal process, for example, can form a first opening that extends to an intermediate depth within the workpiece, but does not extend to the contact surface of the electrically conductive element. After forming the first opening, a second opening is formed from the intermediate depth in the first opening to the contact surface of the conductive element. The second opening has a second width less than the first width of the first opening. This method further includes filling the blind vias with a conductive material and subsequently thinning the workpiece from the exterior side until the cavity is eliminated.

Abstract: System for deferring the delivery of an e-mail sent by a sender to a receiver through a data transmission network such as Internet wherein a Message Transfer Agent (MTA) associated with the sender is in charge of transmitting over the network any e-mail being sent by the sender. The system comprises a retention server for storing the e-mail whose delivery is to be deferred and an authorization server for giving the retention server the authorization to deliver the stored deferred e-mail to the receiver when predetermined criteria are met. The MTA associated with the sender includes a retention enabling program for sending the deferred e-mail to the retention server when there is an indication in the e-mail that it is to be deferred.