Patents Examined by William C. Vesperman
  • Patent number: 6653706
    Abstract: A high efficiency optical interconnect (OI) deposited directly on a silicon based IC by a low temperature process that utilizes a heterogeneous crystalline structure of a III-V compound material to convert light pulses into electrical signals. The high efficiency is established by pulsing the light beams with a shorter duration than the life time of the generated carriers and by reducing the structural volume and consequently the internal capacitance of the III-V compound to a functional height of approximately 1 micron. The analog MSM characteristic of the OI is bypassed by differential two-beam signal processing, wherein the intensity difference of two synchronous light beams is transformed in two parallel OI's into two electrical signals that compensate in a central node. The resulting polarity in the node switches either a PMOS or a NMOS transistor, which connect either a positive or negative voltage to the output node.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: November 25, 2003
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: David A. B. Miller, James S. Harris, Jr.
  • Patent number: 6635504
    Abstract: A method of manufacturing a CMOS thin film transistor (TFT) active matrix organic EL device using six mask processes. The manufacturing methods is simpler than previous manufacturing methods, resulting in high manufacturing yield and low production cost.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: October 21, 2003
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Keun Ho Jang
  • Patent number: 6621106
    Abstract: A light emitting diode (LED) of a double hetero-junction type has a light-emitting layer of a GaAlInP material, a p-type cladding layer and an n-type cladding layer sandwiching the light-emitting layer therebetween, a p-side electrode formed on the p-type cladding layer side, and an n-side electrode formed on the n-type cladding layer side. The p-type cladding layer consists of a first p-type cladding layer positioned closer to the light-emitting layer and having a lower aluminum content and a lower impurity concentration, and a second p-type cladding layer positioned less closer to the light-emitting layer and having a higher aluminum content and a higher impurity concentration. The LED also has a current blocking layer below the p-side electrode for locally blocking electric current flowing from the p-side electrode to the n-side electrode.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: September 16, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuroh Murakami, Takahisa Kurahashi, Hiroshi Nakatsu, Hiroyuki Hosoba
  • Patent number: 6617615
    Abstract: Attempted is to provide a semiconductor light-emitting device capable of inexpensively coping with an encoder requiring high resolving power. Provided are a semiconductor light-emitting element, a light-transmissive resin mold part encapsulating the semiconductor light-emitting element, and converting means for converting the output light from the semiconductor light-emitting element and emitting it. Also, a lens (5a) outwardly projecting in a dome form is formed in a mold part (5) of a light-transmissive resin material of an LED (1). The output light emitted at different angles toward the front from a light-emitting layer (1d) formed on a side surface of a LED element (1x) travels by being converted into a collimate light through a lens (5a) formed in the mold part (5). The collimate luminous flux (La) is outputted from spot light sources at points on the lens (5a), as viewed from a moving direction of a measuring plate (11x).
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: September 9, 2003
    Assignee: Rohm Co., Ltd.
    Inventor: Takashi Ueda
  • Patent number: 6590233
    Abstract: The semiconductor light emitting device has the first semiconductor light emission element 13 for emitting color light in the first wave length range, the second semiconductor light emission element 14 for emitting color light in the second wave length range, the frame electrode 11 for mounting the first and second semiconductor light emission elements, and the package 19 for molding them together. The first semiconductor light emission element 13 is composed of an InGaAlP series material having an active layer 34 composed of a plurality of composite luminous layers 54, 55, 56, and 57 for emitting color light with a different wavelength. Luminescence spectra from the plurality of luminous layers are partially overlapped with each other. Each of the plurality of composite luminous layers 54, 55, 56, and 57 is further composed of a plurality of luminous layers 58 for emitting color light with substantially the same wavelength.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: July 8, 2003
    Assignee: Kabushiki Kasiha Toshiba
    Inventor: Hideto Sugawara
  • Patent number: 6583448
    Abstract: The present invention disclosed a light emitting diode (LED) and method for manufacturing the same. The light emitting diode includes a transparent substrate connected to an epitaxial layer with absorption substrate via a transparent adhesive layer. Then, the absorption substrate is removed to form a light emitting diode with the transparent substrate. Because of the low light absorption of the transparent substrate, the present invention provides high luminescence efficiency. Furthermore, because the first metal bonding layer is electrical connected with the first ohmic contact layer by the electrode connecting channel, the voltage is decreased and the current distribution is increased in the fixed current to improve the luminous efficiency of a light emitting diode.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: June 24, 2003
    Assignee: United Epitaxy Company, Ltd.
    Inventors: Jin-Ywan Lin, Kuang-Neng Yang
  • Patent number: 6563134
    Abstract: Within a method for fabricating an optoelectronic microelectronic fabrication, and the optoelectronic microelectronic fabrication fabricated in accord with the method, there is formed at least in part within an annular gap interposed between: (1) a patterned optical barrier layer which defines an aperture; and (2) a electrical contact formed within the aperture and laterally separated from the patterned optical barrier layer by the annular gap, an annular optical baffle layer. Within the present invention, when there is further formed over the patterned optical barrier layer and electrically connected with the electrical contact a pixel electrode plate layer, the annular optical baffle layer provides for attenuated light leakage to a switching element formed beneath the patterned optical barrier layer.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: May 13, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Hei-Lun Chen, Kt Ou, Claire Chen, Shr-Jung Chung, Che Heng Wang
  • Patent number: 6555921
    Abstract: A semiconductor package manufacturing method includes: providing a rerouting film; attaching a semiconductor wafer having integrated circuits to the rerouting film, such that chip pads of the integrated circuits correspond to via holes of the rerouting film; forming a solder filling in each of the via holes to electrically connect the chip pads to the metal pattern layer; forming external terminals on terminal pads of the rerouting film; and separating the wafer and the rerouting film into individual semiconductor packages. A method further includes forming a protection layer on the solder filling. Instead of the semiconductor wafer, individual integrated circuit chips can be attached on the rerouting film.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: April 29, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong Hwan Kwon, Sa Yoon Kang, Nam Seog Kim, Dong Hyeon Jang
  • Patent number: 6552405
    Abstract: A photoelectric conversion device according to the present invention comprises an aluminum substrate or a substrate formed with an aluminum layer thereon, numerous p type crystalline semiconductor particles deposited on the substrate, an insulator interposed among the numerous p type crystalline semiconductor particles, and a n type semiconductor region formed on the upper portions of the p type crystalline semiconductor particles. An alloy portion comprising the aluminum and the semiconductor material is formed in a boundary part between the aluminum layer and the p type crystalline semiconductor particles, and a p+ region is formed in an interfacial part between the alloy portion and the p type crystalline semiconductor particle on the side of the p type crystalline semiconductor particle.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: April 22, 2003
    Assignee: Kyocera Corporation
    Inventors: Shin Sugawara, Takeshi Kyoda, Hisao Arimune
  • Patent number: 6552369
    Abstract: A light emitting diode (LED) is disclosed. An emitted light can be prevented from being absorbed by a substrate using a Bragg reflector layer with high reflectivity. The present invention provides a Bragg reflector layer comprising a plurality of high aluminum-containing AlGaAs/AlGaInP layers or high aluminum-containing AlGaAs/ low aluminum-containing AlGaInP layers formed on the substrate before the epitaxial structure of the light emitting diode being formed. Since the high aluminum-containing AlGaAs is oxidized and formed an oxide of a lower refraction index, the reflectivity and high reflection zones of the oxidized Bragg reflector layer are much larger. According to the electrical insulation characteristic of the oxide, the Bragg reflector layer can limit the current within the oxidized regions of high aluminum-containing AbGaAs layer. Therefore, the aforementioned light emitting diode structure has a higher brightness than the conventional light emitting diode.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: April 22, 2003
    Assignee: United Epitaxy Company LTD
    Inventors: Shu-Woei Chiou, Holin Chang, Tzer-Perng Chen, Chih-Sung Chang
  • Patent number: 6548834
    Abstract: A semiconductor light emitting element is proposed that improves a light extraction efficiency without requiring any complicated processes and techniques. The semiconductor light emitting element includes an active layer for emitting first light by current injection, and a light absorbing and emitting section for absorbing a part of the first light and for emitting second light having a greater peak wavelength than the first light. A difference in peak wavelength between the first light and the second light is in a range in which a spectrum of a mixture of the first and second light maintains a unimodal characteristic or is smaller than 0.9 times a half width of the spectrum of the first light.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: April 15, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Koichi Nitta, Ryo Saeki, Katsufumi Kondo, Masanobu Iwamoto
  • Patent number: 6541836
    Abstract: An avalanche drift photodetector (ADP) incorporates extremely low capacitance of a silicon drift photodetector (SDP) and internal gain that mitigates the surface leakage current noise of an avalanche photodetector (APD). The ADP can be coupled with scintillators such as CsI(Tl), NaI(Tl), LSO or others to form large volume scintillation type gamma ray detectors for gamma ray spectroscopy, photon counting, gamma ray counting, etc. Arrays of the ADPs can be used to replace the photomultiplier tubes (PMTs) used in conjunction with scintillation crystals in conventional gamma cameras for nuclear medical imaging.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: April 1, 2003
    Assignee: Photon Imaging, Inc.
    Inventors: Jan Iwanczyk, Bradley E. Patt, Gintas Vilkelis
  • Patent number: 6537841
    Abstract: A description is provided of a ridge-structure DFB semiconductor laser and a method of manufacturing the laser wherein an optical absorption loss by a metal electrode formed on a grating can be avoided. The DFB semiconductor laser includes: a ridge protruding from flat portions of a cladding layer which is formed on an active layer, the ridge includes a cladding layer and a contact layer sequentially formed on the active layer; a plurality of metal strips having a predetermined periodicity along a longitudinal direction of the ridge and extending from a surface of at least one of the flat portions to a top of the ridge; and an insulating layer formed on the plurality of metal strips at the top of the ridge.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: March 25, 2003
    Assignee: Pioneer Corporation
    Inventors: Kiyoshi Takei, Nong Chen, Yoshiaki Watanabe, Kiyofumi Chikuma
  • Patent number: 6534385
    Abstract: The present invention relates to a method of fusion for heteroepitaxial layers and overgrowth thereon. According to the present invention, a high quality heteroepilayer can be formed by patterning a fused semiconductor layer, overgrowing it with a persistent patterned character, and fusing other semiconductors having different lattice constants by means of utilizing the rate difference between the lateral growth rate and the vertical growth rate exhibited, on the above process. Further, according to the present invention, the lattice constant difference of the two semiconductors can be overcome and a high quality quantum structure can be formed. According to the present invention, the junction of two semiconductor materials having different lattice constants, as well as a good overgrowth on heteroepitaxial layers can be carried out. Accordingly to the present invention, the base material from which the new, as yet on realized, conceptive optoelectronic device can be made.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: March 18, 2003
    Assignee: Korea Institute of Science and Technology
    Inventors: Young-Ju Park, Sung-Min Hwang, Eun-Kyu Kim
  • Patent number: 6525344
    Abstract: The invention provides a light emitting device and a semiconductor device each having improved characteristics by preventing occurrence of a damage caused by contact of a tool. On a substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are stacked. On the p-type semiconductor layer, a p-side electrode is provided. The p-type semiconductor layer has a projected portion for limiting current in correspondence with a current injection area in the active layer. A projected portion is formed on the surface of the p-side electrode in correspondence with the projected portion for limiting current. On the surface of the p-side electrode, a protective portion is also provided in correspondence with the area other than the current injection area in the active layer. The top face of the protective portion is higher than that of the projected portion.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: February 25, 2003
    Assignee: Sony Corporation
    Inventor: Koichi Miyazaki
  • Patent number: 6515307
    Abstract: A bidirectional optical semiconductor apparatus of the present invention includes: a substrate embedding an optical waveguide, through which output light and input light are propagated; a semiconductor light-emitting device for emitting the output light toward one end of the optical waveguide; an optical branching filter, provided in the optical waveguide, for transmitting at least part of the output light and guiding at least part of the input light to the outside of the optical waveguide; a semiconductor light-receiving device, provided over the substrate, for receiving the input light guided by the optical branching filter to the outside of the optical waveguide; and a light-blocking member, formed on the surface of the semiconductor light-receiving device, for blocking the light emitted from the semiconductor light-emitting device.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: February 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Mitsuda, Tohru Nishikawa, Tomoaki Uno
  • Patent number: 6515308
    Abstract: A p-n tunnel junction between a p-type semiconductor layer and a n-type semiconductor layer provides current injection for an nitride based vertical cavity surface emitting laser or light emitting diode structure. The p-n tunnel junction reduces the number of p-type semiconductor layers in the nitride based semiconductor VCSEL or LED structure which reduces the distributed loss, reduces the threshold current densities, reduces the overall series resistance and improves the structural quality of the laser by allowing higher growth temperatures.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: February 4, 2003
    Assignee: Xerox Corporation
    Inventors: Michael A. Kneissl, Peter Kiesel, Christian G. Van de Walle
  • Patent number: 6515312
    Abstract: A method for packaging organic electroluminescent (EL) elements comprises the steps including: forming a plurality of organic EL devices on a transparent substrate; laying a plurality of binding layers on a plastic laminated board to form a plastic package laminated board; forming a plurality of cavity domains on the plastic laminated board to serve for a plurality of package cans; and binding a lateral face of the package can. By doing the above said, the organic EL devices are packaged and segregated from outside ambient atmosphere with relatively longer lifetime.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: February 4, 2003
    Assignee: Windell Corporation
    Inventors: Hsueh-Wen Chen, Chin-Pei Huang, Kuang-Jung Chen
  • Patent number: 6515330
    Abstract: A semiconductor current limiting device is provided by a two-terminal vertical N(P)-channel MOSFET device having the gate, body, and source terminals tied together as the anode and the drain terminal as the cathode. The doping profile of the body is so tailored with ion implantation that a depletion region pinches off to limit current. The body comprises a shallow implant to form a MOS channel and an additional deep implant through a spacer shielding the channel area. Implanted a higher energies and at an acute angle, the deep implant protrudes into the regular current path of the vertical MOSFET.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: February 4, 2003
    Assignee: APD Semiconductor, Inc.
    Inventors: Gary M. Hurtz, Vladimir Rodov, Geeng-Chuan Chern, Paul Chang, Ching-Lang Chiang
  • Patent number: 6512285
    Abstract: According to one embodiment, a number of trace metal segments or conductors are patterned onto a top surface of a substrate suitable for receiving and housing a semiconductor die. In one embodiment, an insulator layer covers the trace metal segments and separates them from a high permeability core which is mounted on top of the insulator layer. The insulator layer can comprise, for example, solder mask while the high permeability core can comprise, for example, a ferrite rod. In one embodiment, a number of bonding wires are passed over the high permeability core and make connections to respective trace metal segments under the core so as to create an inductor winding around the core. The terminals of the inductor so formed can be connected to a substrate bond pad and/or to a semiconductor die bond pad.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: January 28, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Hassan S. Hashemi, Roberto Coccioli, Siamak Fazelpour