Patents Examined by Yair Leibovich
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Patent number: 10776237Abstract: One example aspect of the present disclosure is directed to a method for monitoring performance of a plurality of processors, wherein the plurality of processors are arranged in a daisy-chained ring configuration. The method includes receiving, by a first processor from the plurality of processors, a first signal from a second processor of the plurality of processors. The method includes determining, by the first processor, a status of the second processor based at least in part on whether the first received signal was received at a first expected interval. The method includes transmitting, by the first processor, a second signal to a third processor of the plurality of processors, wherein the third processor determines a status of the first processor based at least in part on whether the second signal was received at the third processor at a second expected interval.Type: GrantFiled: March 9, 2018Date of Patent: September 15, 2020Assignee: GE Aviation Systems LimitedInventors: Michael Glenny, James Angelo Elder, Peter James Handy
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Patent number: 10776171Abstract: A system for integrating an endpoint management system and a virtual compute system is provided. The system may be configured to receive a first request to execute a proxy application programming interface (API) associated with a first resource of a plurality of resources maintained by the endpoint management system, determine, based at least in part on the first request and the proxy API, an API mapping definition associated with the proxy API, output a second request to execute a program code on the virtual compute system based on the API mapping definition associated with the proxy API, wherein the second request contains information associated with the first resource, receive a first response from the virtual compute system, wherein the first response contains information regarding the first resource, and output a second response based on the first response received from the virtual compute system.Type: GrantFiled: October 9, 2017Date of Patent: September 15, 2020Assignee: Amazon Technologies, Inc.Inventors: Timothy Allen Wagner, Jonathan Paul Thompson
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Patent number: 10776228Abstract: A data storage device includes a flash memory, a controller and a random-access memory. The flash memory includes a plurality of planes, and each plane includes a plurality of blocks. A portion of blocks in each of the planes constitutes a super block, so that the flash memory includes a plurality of super blocks. The controller is coupled to the flash memory. When a first block of at least one first super block of the super blocks is damaged, and a second block of a second super block in the position corresponding to the damaged block is normal, the controller merges the second block of the second super block with the first super block to replace the first block. The random-access memory stores a compression table to record position information about the first block in the first super block and the number information of the second block.Type: GrantFiled: June 22, 2018Date of Patent: September 15, 2020Assignee: SILICON MOTION, INC.Inventors: Kuan-Yu Ke, Guan-Yao Huang, Shen-Ting Chiu
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Patent number: 10776245Abstract: Application performance data and machine health are collected by a system. The system correlates the two data types to provide context as to how machine health affects the performance of an application. Performance data for an application, for example an application executing as part of a distributed business transaction, and health data for a machine which hosts the application are collected. The performance data and machine health data may be correlated for a particular period of time. The correlation may then be reported to a user. By viewing the correlation, a user may see when machine health was good and bad, and may identify the effects of the machine health on the performance of an application.Type: GrantFiled: April 30, 2017Date of Patent: September 15, 2020Assignee: Cisco Technology, Inc.Inventors: Amod Gupta, Ryan Ericson
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Patent number: 10761926Abstract: A method and system for automatically managing a fault event occurring in a datacenter system provided. The method includes collecting hardware fault event analysis corresponding with the hardware fault event. The hardware fault event analysis is organized into a report for a server device suffering from the hardware fault event. The method also includes processing statistical data received from the report for the server device. The method also includes performing hardware recovery based on the evaluated statistical data.Type: GrantFiled: August 13, 2018Date of Patent: September 1, 2020Assignee: QUANTA COMPUTER INC.Inventor: Wei-Yu Chien
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Patent number: 10754738Abstract: Autonomous recovery from a transient hardware failure by executing portions of a stream of program instructions as a transaction. A start of a transaction is created in a stream of executing program instructions. A snapshot of a system state information is saved when the transaction begins. When a predefined number of program instructions in the stream are executed, the transaction ends, and store data of the transaction is committed. A new transaction then begins. If a transient hardware failure occurs, the transaction is aborted without notifying the computer software application that initiated the stream of program instructions. The transaction is re-executed, based on the saved snapshot of the system state information.Type: GrantFiled: September 12, 2018Date of Patent: August 25, 2020Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Valentina Salapura
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Patent number: 10747628Abstract: Autonomous recovery from a transient hardware failure by executing portions of a stream of program instructions as a transaction. A start of a transaction is created in a stream of program instructions executing on a first processor of a multi-processor computer. A snapshot of a system state information is saved when the transaction begins. When the transaction ends, store data of the transaction is committed. If a transient hardware failure occurs, the transaction is aborted without notifying the computer software application that initiated the stream of program instructions. The transaction is re-executed on a second processor of the multi-processors, based on the saved snapshot of the system state information.Type: GrantFiled: September 18, 2018Date of Patent: August 18, 2020Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Valentina Salapura
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Patent number: 10740180Abstract: A method begins by a storage unit receiving a read request for a decode threshold number of encoded data slices (EDSs) of a set of EDSs. The method continues with the first storage unit determining whether to service the read request for an EDS stored in the storage unit, and when determining not to service the request, generating, by the storage unit, a read request for a second storage unit, where the second storage unit is in substantially the same geographic location, and stores one or more EDS of the set of EDSs that is not included in the decode threshold number of EDSs. The storage unit then transmits the read request for the second SU, instructing the second SU to service the request.Type: GrantFiled: August 8, 2017Date of Patent: August 11, 2020Assignee: PURE STORAGE, INC.Inventors: Jason K. Resch, Wesley B. Leggette, Greg R. Dhuse, S. Christopher Gladwin
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Patent number: 10740198Abstract: A reconstruction may be divided into a set of partial operations and scheduled in parallel using a distributed protocol which overlays a reduction tree to aggregate the results. In addition, a scheduling algorithm called multiple partial parallel repair is introduced for handling concurrent failures. Multiple reconstructions may be coordinated in parallel while working to minimize the conflict for shared resources.Type: GrantFiled: December 22, 2016Date of Patent: August 11, 2020Assignees: Purdue Research Foundation, AT&T Intellectual Property I, L.P.Inventors: Rajesh Panta, Moo-Ryong Ra, Saurabh Bagchi, Subrata Mitra
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Patent number: 10733085Abstract: Systems and methods are described for conducting static analysis of code invoking network-based services to identify, without requiring execution of the code, an impedance mismatch between an expected execution rate of the code and an invocation capacity of a service invoked within the code. A system is provided that may analyze code to detect both direct invocations of services, as well as indirect invocations caused by the direct invocations. The system can utilize information regarding directly or indirectly invoked services to determine whether an expected invocation rate of such services will exceed invocation capacity for the services. In some instances, the system can traverse a “call graph” of all services invoked by code either directly or indirectly to identify impedance mismatches through multiple levels of indirection.Type: GrantFiled: February 5, 2018Date of Patent: August 4, 2020Assignee: Amazon Technologies, Inc.Inventor: Timothy Allen Wagner
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Patent number: 10733066Abstract: Certain examples described herein relate to Persistent Reservation commands in a distributed storage system. In one example, a Persistent Reservation command is received. It is determined whether the Persistent Reservation command indicates persistence through power loss. It is also determined whether a group leader of the distributed storage system is synchronized with a backup group leader. Responsive to the group leader being synchronized with the backup group leader, the command is admitted.Type: GrantFiled: March 9, 2018Date of Patent: August 4, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Tao Jin, Kevin Kauffman
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Patent number: 10725876Abstract: According to an embodiment, an electronic circuit board includes a nonvolatile memory, a reading circuit to read data stored in the nonvolatile memory, a switch, and a communication circuit. When power is supplied from a first power source, the switch performs switching to a first state in which the nonvolatile memory and a host device configured to read and write data from and in the nonvolatile memory are connected. When power is supplied from a second power source, the switch performs switching to a second state in which the host device and the nonvolatile memory are not connected and the reading circuit and the nonvolatile memory are connected. The communication circuit transmits, to an external device, the data read by the reading circuit from the nonvolatile memory when power is being supplied from the second power source.Type: GrantFiled: January 16, 2018Date of Patent: July 28, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Tatsunori Kanai, Tetsuro Kimura, Yusuke Shirota, Masaya Tarui
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Patent number: 10713118Abstract: An apparatus that includes a single event latchup (SEL) recovery circuit, a microprocessor operatively connected with the SEL recovery circuit, and an output maintenance circuit that maintains a state of the microprocessor prior to a power cycle of the microprocessor. The apparatus is configured to detect a SEL event or other fault via a watchdog circuit, initiate a power cycle of the microprocessor, retain a latch state from the microprocessor, and determine whether the microprocessor was restarted due to an SEL event. Responsive to determining that the microprocessor has failed to restart due to a persistent fault, the apparatus determines whether a prepower cycle limit is reached within a predetermined span of time, and selectively provide power to a load based on the latch state and the power cycle limit determination.Type: GrantFiled: March 9, 2018Date of Patent: July 14, 2020Assignee: HAMILTON SUNDSTAND CORPORATIONInventor: Joshua C. Swenson
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Patent number: 10713109Abstract: Embodiments described herein provide a predictive failure analysis that enables design-time error and exception handling techniques to be supplemented or assisted by a predictive failure analysis system. One embodiment provides an electronic device, comprising a non-transitory machine-readable medium to store instructions; one or more processors to execute the instructions; and a memory coupled to the one or more processors, the memory to store the instructions which, when executed by the one or more processors, cause the one or more processors to receive injection of dynamic error detection logic into the instructions, the dynamic error handling logic including an error handling update to indicate a response to a predicted failure; receive a set of events indicative of the predicted failure; and respond to the set of events according to the error handling update.Type: GrantFiled: December 29, 2017Date of Patent: July 14, 2020Assignee: Apple Inc.Inventors: Anthony J. Tarlano, Nikhil A. Desai, Chandrasekaran Jagadeesan, Subash Sundaresan
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Patent number: 10705903Abstract: A system, method, and computer-readable medium for performing a system failure identification operation, comprising: receiving information regarding a device a repair depot; performing a depot triage process on the device, the depot triage recording possible causal factors contributing to failure of the device; determining suspected failures associated with the device based upon symptoms exhibited by the device; and, correlating the suspected failures with commodities for use in repairing the device.Type: GrantFiled: January 25, 2018Date of Patent: July 7, 2020Assignee: Dell Products L.P.Inventors: Prabir Majumder, Jeffrey S. Vah, Anand Lakshmanan, Fadi M. Taffal, Brian T. Martin, Gayathri M. Rau
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Patent number: 10691527Abstract: A system on chip (SoC) includes a bus matrix configured to connect a plurality of functional blocks. A monitoring unit is configured to monitor whether a transaction between the functional blocks has a hang or stall and distinguish a functional block that caused a hang or stall from among the functional blocks. A recovery signal generation unit is configured to provide a recovery signal for releasing the hang or stall to at least one of the functional blocks based on the distinguishing by the monitoring unit.Type: GrantFiled: November 22, 2017Date of Patent: June 23, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Sueng-Chul Ryu, Bo-Eok Seo
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Patent number: 10678618Abstract: Node failures in a computing environment can be managed. For example, a computing device can determine a risk score for a node in the computing environment. The risk score can indicate a likelihood of the node failing. The computing device can also determine a risk-tolerance score for a job to be executed in the computing environment by analyzing job data associated with the job. The risk-tolerance score can indicate a susceptibility of the job to a failure of one or more nodes in the computing environment. The computing device can cause the job to be at least partially executed on the node based on the risk score for the node and the risk-tolerance score for the job.Type: GrantFiled: March 8, 2018Date of Patent: June 9, 2020Assignee: Red Hat, Inc.Inventor: Huamin Chen
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Patent number: 10671500Abstract: A method of resilvering a plurality of failed devices in a storage pool may include detecting a failure of a first storage device in the storage pool, and determining a plurality of data blocks that are stored on the first storage device. The method may also include sorting the plurality of data blocks into one or more buckets in an order in which the plurality of data blocks are located on the first storage device, and detecting a failure of a second storage device in the storage pool after detecting the failure of the first storage device. The method may further include determining that one or more of the plurality of data blocks are also located on the second storage device, and reusing at least part of the one or more buckets to resilver the second storage device.Type: GrantFiled: January 17, 2017Date of Patent: June 2, 2020Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Eric Carl Taylor, Zhu Xiao
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Patent number: 10671501Abstract: A method of reconstructing data from a failed storage device in a storage pool includes identifying a plurality of data blocks that are stored on the failed storage device, and sorting the plurality of data blocks in an order in which the plurality of data blocks are located on the failed storage device. Each of the plurality of data blocks may be associated with an I/O operation. The method may also include grouping the I/O operations for the plurality of data blocks into sequential I/O operations based on the order in which the plurality of data blocks are located on the failed storage device, and executing the sequential I/O operations to resilver a new storage device replacing the failed storage device.Type: GrantFiled: May 31, 2017Date of Patent: June 2, 2020Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Eric Carl Taylor, Zhu Xiao
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Patent number: 10664367Abstract: A computer-implemented method, according to one embodiment, includes: determining that a data storage drive in a first array has failed, determining a location to rebuild the failed data storage drive, instructing performance of a rebuild operation at the determined location, determining one or more data storage drives in one or more arrays having a combined amount of available space that is sufficient to mirror data and/or parity information of the first array, instructing mirroring of the data and/or parity information of the first array in parallel with performing the rebuild operation, instructing deletion of the mirrored data and/or parity information of the first array from the one or more data storage drives in response to the rebuild operation being completed, and instructing reallocation of the space in the one or more data storage drives used to mirror the data and/or parity information of the first array as available space.Type: GrantFiled: November 30, 2017Date of Patent: May 26, 2020Assignee: International Business Machines CorporationInventors: Gary Anna, Emmanuel Barajas Gonzalez, Shaun E. Harrington, Harry R. McGregor, Christopher B. Moore