Patents Examined by Yair Leibovich
  • Patent number: 11163629
    Abstract: A monitor includes a processor configured to detect an error that occurs in an information processing apparatus. The processor is configured to collect information on the detected error. The processor is configured to calculate an interval for checking a progress of the collection of the information. The processor is configured to check the progress of the collection of the information when the interval elapses. The processor is configured to output the collected information when the collection of the information is completed. The processor is configured to continue the collection of the information when there is a progress in collecting the information or when a value of the interval is increased from a previously calculated value of the interval.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: November 2, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Naoki Suenaga
  • Patent number: 11150999
    Abstract: Embodiments of the present disclosure relate to a method, device, and computer program product for scheduling backup jobs. There is provided a method of scheduling backup jobs, comprising: in response to detecting that a target backup job is generated, obtaining predetermined execution information of the target backup job; determining an execution priority of the target backup job based on the predetermined execution information of the target backup job; determining an execution priority of an existing backup job in a waiting queue; and adding the target backup job to the waiting queue based on the execution priority of the existing backup job and the execution priority of the target backup job. Through embodiments of the present disclosure, it enables better utilization of system resources to achieve the Recover Point Objective for important data, ensuring a Service Level Agreement.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: October 19, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Jun Tang, Wei Wang
  • Patent number: 11144389
    Abstract: Methods, systems and computer-readable storage media for requesting programming of N portions of a plurality of non-volatile memories (NVMs) in accordance with received data. Redundancy information sufficient to recover from failures of M of the N portions for which programming was requested is updated in response to the requesting programming. Upon identifying one to M of the N portions that have failed the programming, re-programming of the one to M of the N portions is requested in accordance with data calculated based at least in part on the redundancy information.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: October 12, 2021
    Assignee: Seagate Technology LLC
    Inventors: Jeremy Isaac Nathaniel Werner, Earl T. Cohen
  • Patent number: 11119874
    Abstract: A memory fault detection method includes: receiving a first interrupt signal sent when a count value of a first leaky bucket counter of a server reaches a first threshold; disabling an interrupt switch of the first leaky bucket counter; enabling the interrupt switch of the first leaky bucket counter after the interrupt switch of the first leaky bucket counter has been disabled for a preset time and the count value of the first leaky bucket counter is reset to zero; receiving a second interrupt signal sent when a count value of a second leaky bucket counter reaches a second threshold; if the second leaky bucket counter and the first leaky bucket counter are a same leaky bucket counter, and the second rank and a first rank are a same rank, determining that a hardware fault occurs in the first rank.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: September 14, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Gang Song, Chengguo Ding, Fei Zhang
  • Patent number: 11119870
    Abstract: To achieve mutual monitoring of an operating state in consideration of an object storage. A calculator (10) according to the invention, which forms a cluster together with another calculator (20), includes a storage request unit (11) that requests an object storage (30) that manages data on an object-by-object basis to store first state information indicating a normal state of its own calculator, an acquisition request unit (12) that requests the object storage (30) to acquire second state information indicating a normal state of the other calculator (20), and a cluster control unit (13) that performs cluster control based on a result of storing the first state information and a result of acquiring the second state information, and when a result of acquiring the second state information is not the latest result, the acquisition request unit (12) requests acquisition of the second state information a specified number of times.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: September 14, 2021
    Assignee: NEC CORPORATION
    Inventors: Yusuke Okuno, Takamasa Ohtake
  • Patent number: 11119869
    Abstract: An auxiliary storage device is disclosed. The device provides independent backup and recovery functions: enables easy use by attaching a commercialized auxiliary memory device in existing computers; minimizes of access time to the auxiliary memory device; enables automatic backup of data in a computer auxiliary memory device; recovers original data from a specific time using data that has been backed up through a simple operation when data on the auxiliary memory device has been damaged; and performs a recovery function for the auxiliary memory device by rebooting using backed-up OS information as needed.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: September 14, 2021
    Inventor: Deok Woo Kim
  • Patent number: 11113099
    Abstract: A processor system comprises at least a program counter structure, an interrupt control device, a memory, and an apparatus. The interrupt control device is configured to respond to an interrupt request by providing the program counter structure with an address associated with the interrupt request. The program counter structure is configured to output the address to the memory via a memory interface. The apparatus is configured to protect the program counter structure in case of an interrupt request, the apparatus includes an interface, a comparing device, and an outputting device.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: September 7, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Alexander Emperle, Jo Pletinckx, Jan Scheuing
  • Patent number: 11113164
    Abstract: A buffer (72), (74), (76), (60), (78), (20), (82-90) has a number of entries for buffering items associated with data processing operations. Buffer control circuitry (100) has a redundant allocation mode in which, on allocating a given item to the buffer, the item is allocated to two or more redundant entries of the buffer. On reading or draining an item from the buffer, the redundant entries are compared and an error handling response is triggered if a mismatch is detected. By effectively reducing the buffer capacity, this simplifies testing for faults in buffer entries.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: September 7, 2021
    Assignee: Arm Limited
    Inventors: Balaji Venu, Matthias Lothar Boettcher, Mbou Eyole
  • Patent number: 11106567
    Abstract: Systems, methods, and computer-readable media are described for expanding test space coverage for testing performed on a System Under Test (SUT) through iterative test case generation from combinatoric pairwise outputs. At each test case generation iteration, a new set of test vectors is generated that provides complete pairwise coverage of the test space but that does not include any overlapping test vector with any previously generated set of test vectors. As such, cumulative m-wise test space coverage (where 2<m?n) is incrementally increased through each iteration until the iterative process ceases when a desired percentage of m-wise test space coverage is achieved.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: August 31, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew Hicks, Dale E. Blue, Ryan Rawlins, Eitan Farchi
  • Patent number: 11106556
    Abstract: Described herein is a system that provides data service failover in shared storage clusters. An example shared storage cluster can include multiple data node devices equipped to access to a shared storage location. Each of the data node devices can host multiple network attached storage (NAS) servers. For each NAS server at a data node device, a different data node device in the shared storage cluster can be designated as a backup node. The designated backup nodes for NAS servers at any one data node device in the shared storage cluster can be distributed across multiple other data node devices in the shared storage cluster, thereby sharing the burden of data node device failure across multiple other data node devices.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: August 31, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: G. Paul Koning, Himabindu Tummala, Sudhir Srinivasan
  • Patent number: 11099950
    Abstract: A system, method, and computer readable medium for asynchronous live migration of applications between two or more servers. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Asynchronous live migration is provided through a combination of process replication, logging, barrier synchronization, checkpointing, reliable messaging and message playback. The live migration is transparent to the application and requires no modification to the application, operating system, networking stack or libraries.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: August 24, 2021
    Assignee: OPEN INVENTION NETWORK LLC
    Inventor: Allan Havemose
  • Patent number: 11099945
    Abstract: Embodiments of the present disclosure relate to a method, a device, and a computer program product for backing up data. A method for backing up data includes: receiving a request for a backup policy for a data from a user, the request indicating a desired backup period for backing up the data; obtaining backup information associated with the data; and generating, based on the desired backup period and the backup information, a backup policy for the data and satisfying a service level agreement.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: August 24, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Ming Zhang, Weiyang Liu, Yun Zhang, Jing Yu
  • Patent number: 11099927
    Abstract: According to one embodiment, a memory system includes a first memory, an interface circuit, and a processor. The interface circuit is configured to receive a first request from an external device. The processor is configured to select a mode among a plurality of modes in response to the first request, and perform, on data read from the first memory, error correction of the selected mode.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 24, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Masayoshi Sato, Kenichiro Suzuki
  • Patent number: 11099924
    Abstract: A computer-implemented method according to one embodiment includes receiving a first plurality of events occurring during a current time period, determining whether a number of the first plurality of events exceeds a threshold for the current time period, determining whether a predetermined issue is identified by comparing the first plurality of events to a second plurality of events occurring during an historical time period, in response to a determination that the number of the first plurality of events exceeds the threshold for the current time period, and resolving the predetermined issue, in response to a determination that the predetermined issue is identified.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: August 24, 2021
    Assignee: International Business Machines Corporation
    Inventor: Raul Estrada, Jr.
  • Patent number: 11100418
    Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: August 24, 2021
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Paul I. Bunyk, James King, Murray C. Thom, Mohammad H. Amin, Anatoly Yu Smirnov, Sheir Yarkoni, Trevor M. Lanting, Andrew D. King, Kelly T. R. Boothby
  • Patent number: 11099975
    Abstract: A method includes defining functional coverage by a first test suite based on a first functional coverage model of a System Under Test (SUT). The first test suite includes a first plurality of tests. The first functional coverage model includes a first plurality of attributes. The first functional coverage model defines possible combinations of values of the first plurality of attributes. Functional coverage by a second test suite is defined based on a second functional coverage model which includes a second plurality of attributes. The second functional coverage model defines possible combinations of values of the second plurality of attributes. Subsets of the first and second plurality of attributes are determined. The subsets of attributes include exclusively common attributes between the first and the second plurality of attributes. A subset of the tests is selected. The selected subset is operative to cover the first and second subsets of the attributes.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: August 24, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew Hicks, Dale E. Blue, Ryan Rawlins
  • Patent number: 11093345
    Abstract: Log-Based Rollback Recovery for system failures. The system includes a storage medium, and a component configured to transition through a series of states. The component is further configured to record in the storage medium the state of the component every time the component communicates with another component in the system, the system being configured to recover the most recent state recorded in the storage medium following a failure of the component.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: August 17, 2021
    Assignee: OPEN INVENTION NETWORK LLC
    Inventors: Srinidhi Varadarajan, Joseph F. Ruscio
  • Patent number: 11093361
    Abstract: A bus monitoring system, a method and an apparatus, wherein the system comprises: a bus node; a bus monitoring module configured to monitor a first bus where the bus monitoring module is located to generate monitoring information; an information storage module configured to acquire the monitoring information from the bus monitoring module through a second bus; the first bus being configured to connect a master device and a slave device of the bus node; the second bus being configured to connect the information storage module and the bus monitoring module, wherein the second bus is independent from the first bus. By means of the present disclosure, the technical problem that bus monitoring information cannot be acquired when bus exception occurs in the related art is solved.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: August 17, 2021
    Assignee: ZTE CORPORATION
    Inventors: Jinrong Wang, Zhongyun Yu, Xiaoyu Bao
  • Patent number: 11086712
    Abstract: A device that provides error recovery handling includes a processor that is configured to receive an error recovery request including error type information and a page address, where the error type information is mapped to a first error recovery technique. The processor may be configured to determine whether an error count associated with the flash memory circuit satisfies a first criterion and an error map associated with the flash memory circuit satisfies a second criterion, where the error count indicates a number of read errors that have occurred and the error map indicates blocks in which the read errors have occurred. The processor may be configured to utilize a second technique to attempt to recover data when the first and second criterions are satisfied, otherwise utilize the first technique to attempt to recover data, where the second technique is associated with recovering data stored in an offline flash memory circuit.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: August 10, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Parvaneh Alavi, Kai-Lung Cheng, Yun-Tzuo Lai, Haining Liu
  • Patent number: 11086723
    Abstract: A streaming distributed decentralized database task system can perform multiple tasks of parallel jobs on clusters of nodes without overloading the clusters' computational resources, such as disk, memory, processors, and network bandwidth. A cluster master can manage a job and add items to node queues. A node manager accepts or rejects queue items based on streaming task limits that are applied at the node level.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: August 10, 2021
    Assignee: Rubrik, Inc.
    Inventors: Venkatesh Kempapura Sharma, Prasenjit Sarkar