Abstract: A reference voltage circuit includes a first circuit including a first PN junction device and a first resistor connected in series between a power supply node and a first node, and a second resistor connected between the first node and an intermediate node, and a third resistor connected between the intermediate node and a reference voltage output node, and a second circuit including a second PN junction device connected between the power supply node and a second node and a fourth resistor connected between the second node and the intermediate node. A feedback current causes voltage across the first resistor to offset changes in voltage across the first PN junction device. A correction current is applied to boost and or sink current in the voltage reference generator to extend the operating temperature range.

Abstract: A bidirectional switch fault protection circuit includes a bidirectional switch circuit, a desaturation detection circuit, and a gate driver. The bidirectional switch circuit generates first and second switch voltages based on a direction of electric current. The desaturation detection circuit outputs the first switch voltage in response to the electric current flowing in a first direction and outputs the second switch voltage in response to the electric current flowing in a second direction opposite the first direction. The gate driver receives the first switch voltage in response to the electric current flowing in the first direction and the second switch voltage in response to the electric current flowing in the second direction. The gate driver detects a first short circuit condition based on the first switch voltage and a second short circuit condition based on the second switch voltage.

Abstract: An apparatus for generating a steady state positive voltage (PVS) signal and a steady state negative voltage (NVS) signal is presented. The apparatus includes a bias signal generation module for generating a steady state reference voltage signal (RVS) based on a varying supply voltage signal (VDD), the RVS having a voltage level less than the PVS. The apparatus further includes a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to generate a portion of the PVS based on the RVS. The apparatus further includes a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to generate a portion of the NVS based on the RVS.

Abstract: A power electronics assembly for a power generation system includes a housing and an attenuator card positioned within the housing. The attenuator card may include at least one printed circuit board for a high-voltage attenuator circuit. The power electronics assembly also includes a potting material at least partially filling the housing on one or more sides of the attenuator card, a detachable end cap positioned at a first end of the housing, and multi-phase wiring communicatively coupled to the high-voltage attenuator circuit through the end cap.

Abstract: Provided is a power supply device in which the reliability of a voltage output is improved, and also provided is a system comprising the power supply device and an electric tool. The power supply device (1) is provided with: a secondary battery cell (2a); an output unit connected to an electric tool and supplying the power of the secondary battery cell (2a) to the electric tool; and switching elements (Q1), (Q2) capable of interrupting a current path from the secondary battery cell (2a) to the electric tool. The switching element (Q1) switches whether or not to interrupt the current path not by being controlled by a control circuit (12) but in accordance with whether the electric tool connected to the output unit has a shorting bar (59) or not.

Abstract: During a first mode of operation, a zero current detect (ZCD) signal is asserted in response to detecting a zero current condition at a switch node of a power converter. The power converter enters a light load mode of operation when the ZCD signal is asserted between a beginning point and a trigger point of a period of a PWM signal. A compensator voltage is generated based on a feedback voltage indicative of an output voltage. The compensator voltage is compared to a threshold voltage that represents a limit for the compensator voltage during the light load mode of operation determined over a range of the output voltage. The power converter exits the light load mode back to the first mode of operation in response to the compensator voltage being beyond the threshold voltage.

Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion (e.g. DC/DC) and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. According to an aspect, timing control of edges of a control signal to the high voltage semiconductor devices is provided by a basic edge delay circuit that includes a transistor, a current source and a capacitor. An inverter can be selectively coupled, via a switch, to an input and/or an output of the basic edge delay circuit to allow for timing control of a rising edge or a falling edge of the control signal.

Abstract: In a power converter, a switching network having switches that operate at a common frequency and duty cycle interconnects circuit elements. These circuit elements include capacitors that are in a capacitor network and a magnetic filter. When connected to the capacitors by a switch from the switching network, the magnetic filter imposes a constraint upon inter-capacitor charge transfer between the capacitors to maintain the filter's second terminal at a voltage. The switching network transitions between states. These states include a first state, a second state, and a third state. In both the first state and the third state, the first magnetic-filter terminal couples to the capacitor network. In the second state, which occurs between the first and third state, the switches ground the first magnetic-filter terminal.

Abstract: A power converter includes N power conversion units. Each power conversion unit includes a main switching circuit, a transformer, a synchronous rectifier circuit, an input signal terminal and a signal processor. A primary winding of the transformer is connected with the main switching circuit. The synchronous rectifier circuit is connected with a secondary winding of the transformer. The input signal terminal receives a first PWM control signal. The signal processor generates first and second PWM driving signals to drive the main switching circuit according to the first PWM control signal, and a phase difference between the first and second PWM driving signals is (180±?) degree. The signal processor generates third and fourth PWM driving signals to drive the synchronous rectifier circuit according to the first PWM control signal, and a phase difference between the third and fourth PWM driving signals is (180±?) degree.

Abstract: A control method for an LLC resonant converter includes the following steps. Firstly, the LLC resonant converter is enabled. Then, the sonant converter is operated in a first modulation mode, so that the magnitude of the output voltage is greater than or equal to an intermediate voltage value. When the magnitude of the output current is greater than zero, a determining step is performed to determine whether the magnitude of the output voltage is greater than a reference voltage value. When the determining result is satisfied, the LLC resonant converter is operated in the first modulation mode. When the determining result is not satisfied, the LLC resonant converter is operated in a second modulation mode, so that the magnitude of the output voltage is lower than the intermediate voltage value.

Abstract: A power semiconductor circuit is provided for clamping the voltage across the circuit when a power semiconductor switch is opened (i.e., turned off). The circuit may include a first surge arrester and a first semiconductor switch coupled in parallel with the power semiconductor switch. The first semiconductor switch is coupled in series with the first surge arrester. A second surge arrester may be coupled to the gate of the first semiconductor switch to control current flow through the first semiconductor switch and the first surge arrester.

Abstract: A rectifier arrangement (20) for rectifying an AC voltage into a DC voltage has connections, circuit arrangements, an interconnection apparatus (26) and an intermediate circuit (50). The connections include first and second connections (22, 21). The intermediate circuit (50) has a first line (51), a second line (52) and at least one capacitor (61, 62) between the first and second lines (51, 52). The circuit arrangements (31, 32, 33, 34, 35, 36) each have a first circuit arrangement connection (A) and a second circuit arrangement connection (B), between which a changeover arrangement (92) and a coil (91) are connected in series. The interconnection apparatus (26) enables at least: a first configuration in which the first connection (22) is connected to at least one first circuit arrangement connection (A), and a second configuration in which the first connection (22) is connected to at least one second circuit arrangement connection (B).

Abstract: Disclosed herein is a symmetric split planar transformer in the context of a DC-DC isolated converter. The symmetric split planar transformer reduces or eliminates asymmetry in the distribution of parasitic capacitance across the isolation barrier going from one end to another end of a primary coil, and as a result, undesirable electromagnetic interference (EMI) due to common mode dipole emission across the isolation barrier may be reduced. In some embodiments, the primary winding is split into at least a first coil and a second coil, each occupying a different area side-by-side on a substrate. The transformer is symmetric in the sense that a capacitive coupling of the first coil to a secondary winding is the same as a capacitive coupling of the second coil to the secondary winding, such that common mode EMI may be reduced. Each coil may include stacked spiral coil portions in multiple metal planes to increase inductive density across the isolation barrier.

Abstract: A method for switching control of a multi-level converter. The multi-level converter has a plurality of modules. A total switching state is formed from respective module switching states of the plurality of modules by the switching control. A current state of charge of all energy stores of the multi-level converter is provided continuously to the switching control. The switching control is divided into an offline part and an online part, wherein, in the offline part, a plurality of offline switching tables is calculated by way of optimizers in a continuous sequence and, for calculation of a respective offline switching table of the plurality of offline switching tables, a respective cost function is minimized according to at least one predefined offline optimization criterion for evaluating the total switching state. In the online part, an online switching table is selected from the plurality of offline switching tables in a continuous sequence.

Abstract: Systems and methods are provided for monitoring or protecting an electric power distribution system using protective devices that may rely on accurate time signals from a common time source. A first protective device may receive a first time signal deriving from the common time source and a second protective device may receive a second time signal deriving from the common time source. The first time signal and the second time signal may be compared; when a difference between them exceeds a defined threshold, time signal manipulation may be detected. The protective devices may modify their operation in response to or to account for the time signal manipulation.

Abstract: An integrated circuit for a power supply circuit. The integrated circuit includes an oscillator circuit configured to output an oscillator voltage that rises with a predetermined slope from a first voltage, upon an inductor current of the power supply circuit becoming smaller than a first predetermined value, an error voltage output circuit configured to output an error voltage corresponding to a difference between a reference voltage and a feedback voltage corresponding to the output voltage, a drive circuit configured to turn on and off a transistor of the power supply circuit respectively upon the inductor current becoming smaller than the first predetermined value, and upon the oscillator voltage reaching a second voltage that is based on the error voltage, and an output circuit configured to change the first and/or second voltage based on a rectified voltage obtained by full-wave rectification of the AC voltage, and to output the changed voltage.

Abstract: Provided is a power supply device in which the reliability of a voltage output is improved, and also provided is a system comprising the power supply device and an electric tool. The power supply device (1) is provided with: a secondary battery cell (2a); an output unit connected to an electric tool and supplying the power of the secondary battery cell (2a) to the electric tool; and switching elements (Q1), (Q2) capable of interrupting a current path from the secondary battery cell (2a) to the electric tool. The switching element (Q1) switches whether or not to interrupt the current path not by being controlled by a control circuit (12) but in accordance with whether the electric tool connected to the output unit has a shorting bar (59) or not.

Abstract: A conducted electrical weapon may deploy a single electrode. The single electrode may be deployed in response to a first activation signal of a sequence of activation signals. The conducted electrical weapon may deploy a second electrode in response to a second activation signal of the sequence of activation signals. A signal generator of the conducted electrical weapon may provide a stimulus signal between the single electrode and the second electrode. Deploying the single electrode may include deploying fewer electrodes than a minimum number required by the conducted electrical weapon to provide the stimulus signal at a remote location.

Abstract: The present invention discloses a reference circuit with temperature compensation, which is characterized in that a current output circuit is designed to receive a reference voltage from a bias voltage generation circuit, generate two reference currents with opposite temperature variation characteristics, and then merge them into a compensated current with temperature compensation. In addition, a voltage output circuit is designed to receive a reference voltage from a bias voltage generation circuit, which includes several field-effect transistors operating in saturation regions, and a precision voltage increases with threshold voltages of the field-effect transistors to compensate for the temperature variation. Resistors can be incorporated or sizes of the field effect transistors can be changed to adjust the output current, output voltage or the temperature variation characteristics.

Abstract: A power system includes a pulse width modulation device. The pulse width modulation device outputs first, second, third and fourth driving signals. The pulse width modulation device receives a control signal. The control signal is divided into a positive periodic signal and a negative periodic signal. A portion of the positive periodic signal higher than or equal to a maximum threshold voltage is clamped as the maximum threshold voltage to generate a first comparison waveform. The positive periodic signal is clamped as the reference voltage level to generate a second comparison waveform. According to the first comparison waveform, a first ramp signal is generated. According to the second comparison waveform, a first pulse width modulation signal is generated. The first, second, third and fourth driving signals are adjusted according to the first ramp signal and the first pulse width modulation signal.