Abstract: In the electric power converting apparatus, an electric current sensor that measures an electric current that flows through a busbar includes: a magnetic flux concentrating core that has a first end portion and a second end portion that face each other so as to have a measuring space interposed; and a magnetoelectric transducer that has a magnetically sensitive portion that is disposed in the measuring space. The magnetoelectric transducer generates a signal in response to a magnitude of a magnetic field that is sensed by the magnetically sensitive portion. Where a core opening direction of the magnetic flux concentrating core is a direction that is directed from the busbar, through the measuring space, and outward from the magnetic flux concentrating core, a direction of the magnetic leakage field at the electric reactor is a direction that is different than the core opening direction.

Abstract: Provided is a power supply system comprising: distributed energy resources (2) connected to a power line (L1) for feeding power from a commercial power system (10) to an important load (30); a switch (3) provided in the power line (L1) for opening and closing the power line (L1); an impedance element (4) connected in parallel to the switch (3) in the power line (L1); a voltage detection unit (5) for detecting a voltage on the commercial power system (10) side with respect to the switch (3); and a control unit (6) for releasing, when a voltage detected by the voltage detection unit (5) becomes equal to or lower than a set point, the switch (3) such that the distributed energy resources (2) and the commercial power system (10) are connected through the impedance element (4), and the distributed energy resources (2) continue operation including reverse power flow.

Abstract: A high-voltage DC floating system includes a source, a power rail, a power bus, a load, and a pre-charge circuit. The power bus includes a positive bus portion and a negative bus portion. The pre-charge circuit includes a first pre-charge circuit portion that is configured to equalize a voltage across the positive power supply switch between the source and a Y-capacitance of the load and a second pre-charge circuit portion that defines a switched path to ground that is configured to equalize a voltage associated with a Y-capacitance of the negative power rail.

Abstract: An apparatus for generating a steady state positive voltage (PVS) signal and a steady state negative voltage (NVS) signal is presented. The apparatus includes a bias signal generation module for generating a steady state reference voltage signal (RVS) based on a varying supply voltage signal (VDD), the RVS having a voltage level less than the PVS. The apparatus further includes a positive signal generation module (PSGM) generating the PVS, the PSGM including a first capacitor, the PSGM employing the first capacitor to generate a portion of the PVS based on the RVS. The apparatus further includes a negative signal generation module (NSGM) generating the NVS, the NSGM including a second capacitor, the NSGM employing the second capacitor to generate a portion of the NVS based on the RVS.

Abstract: A correction current output circuit comprises a first voltage dividing circuit for generating a voltage in which an output voltage from a bandgap reference voltage circuit is divided in multiple stages, first and second correction circuits connected between a power supply and a ground, and a second voltage dividing circuit for dividing the above voltage in multiple stages in a path in which a positive temperature characteristic voltage is generated with the band gap reference voltage circuit. Current output terminals of a the second transistor of the first correction circuit and a first transistor of the second correction circuit are connected to a common connection point, and a current for correcting the temperature characteristic of a reference voltage generation circuit is output from the common connection point.

Abstract: Methods, apparatus, systems, and articles of manufacture providing adaptive voltage clamps are disclosed. An example apparatus includes a voltage clamp to clamp a drain-to-source voltage of a transistor to a first voltage when the drain-to-source voltage exceeds the first voltage, and a controller to generate a control signal to direct the voltage clamp to clamp the drain-to-source voltage to a second voltage different from the first voltage based on a fault signal.

Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.

Abstract: An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side IC controller of the AC-DC converter includes a SR-SNS pin coupled to a peak-detector block, a zero-crossing block, and a calibration block. The calibration block is configured to: measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin; and set timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on Tloop, Tpkpk, and Tzpk.

Abstract: A relay control device includes a coil, a movable iron armature that is switched from an open state to a closed state when the coil is excited, a switching current output circuit that applies first current for switching the movable iron armature from the open state to the closed state to the coil, and a holding current output circuit that applies second current for holding the movable iron armature in the closed state to the coil. The switching current output circuit applies the first current to the coil when a first time has elapsed from when the second current is started to be applied to the coil, and the value of the second current is lower than the value of the first current.

Abstract: An overvoltage protection device includes: input terminals; output terminals; at least two overvoltage protection elements for forming staggered protection levels; and at least one longitudinal element electrically connecting an input terminal and an output terminal to conduct an operating current. In order to form a first protection level, a first overvoltage protection device is connected to two input terminals on an input side upstream of the at least one longitudinal element, and, in order to form a second protection level, a second overvoltage protection element is connected to two output terminals on an output side and downstream of the at least one longitudinal element, the at least one longitudinal element influencing a response of the at least two overvoltage protection elements in case of an overvoltage. The at least one longitudinal element is provided with a thermal overload protection device for reducing a possible current flow.

Abstract: To suppress a malfunction of an overcurrent protection circuit caused by rise of a sense voltage in a mirror period immediately after turn-off of a semiconductor switching element. A semiconductor device includes: a semiconductor switching element; a sense resistor; an overcurrent protection circuit which outputs a control signal for controlling on-drive and off-drive of the semiconductor switching element based on whether a sense voltage exceeds a threshold value; and a diode which clamps the sense voltage. When the sense voltage exceeds the threshold value, the overcurrent protection circuit outputs a signal for off-driving the semiconductor switching element as the control signal.

Abstract: A circuit includes a first voltage divider coupled between an output node and a ground voltage, and a second voltage divider coupled between the output node and a modulation node. The first voltage divider includes the modulation node. The modulation node is configured to receive a pulse width modulation (PWM) modulated control signal having an open drain configuration. The modulation node is switchable by the PWM modulated control signal between a floating state and a grounded state. The modulation node experiences a high impedance with respect to a ground connection while in the floating state and experiences a low impedance with respect to the ground connection while in the grounded state.

Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.

Abstract: An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side integrated circuit (IC) controller of the AC-DC converter includes a SR-SNS pin, a VBUS_IN pin, a first voltage-to-current converter, a sample-and-hold (S/H) circuit, a second voltage-to-current converter, and a signal generation circuit. The first voltage-to-current converter is coupled to remove a component of the output bus voltage sensed on the VBUS_IN pin from the voltage sensed on the SR-SNS pin. The S/H circuit is coupled to sample the voltage sensed on the SR-SNS pin and to provide a sampled voltage. The second voltage-to-current converter is coupled to convert the sampled voltage to a feed-forward current. The signal generation circuit is coupled to receive the feed-forward current and to generate feed-forward signals used to control operation of a primary side of the AC-DC converter.

Abstract: A PFWM control system for a switching-mode power supply (SMPS) circuit including a boost conversion circuit and a DC-DC converter. The PFWM control system includes a duty cycle control unit, a frequency control unit and a PFWM waveform generator module. The duty cycle control unit samples an output voltage or current or power of the DC-DC converter, and calculates a duty cycle of a switching component of the SMPS. The frequency control unit samples an input or output voltage of the boost conversion circuit, and calculates an operation frequency of the switching component. The PFWM waveform generator module synthesizes a PFWM drive signal according to the duty cycle and operation frequency. The PFWM drive signal drives switching component of the boost conversion circuit and the DC-DC converter, so as to control an output voltage, an output current, or an output power provided to a load by the DC-DC converter.

Abstract: A SMPS circuit for three-phase AC input includes: a first input rectification circuit, a first capacitor, a feedback control and driving circuit, and multiple boost converter circuits. The first input rectification circuit rectifies input voltage and charges the first capacitor, forming a first loop. In each boost converter circuit, a second input rectification circuit rectifies input voltage and charges a second capacitor, forming a second loop; a first inductor, the second capacitor and a first switching component form a third loop in which rectified voltage on the second capacitor charges the first inductor. The first inductor, second capacitor, first capacitor and first output rectification circuit form a fourth loop in which induced voltage on first inductor and voltage on second capacitor are superimposed to charge first capacitor through the first output rectification circuit. The SMPS circuit provides high efficiency, high reliability, low EMI noise and good inrush inhibition capability.

Abstract: An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side IC controller of the AC-DC converter includes a SR-SNS pin coupled to a peak-detector block, a zero-crossing block, and a calibration block. The calibration block is configured to: measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin; and set timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on Tloop, Tpkpk, and Tzpk.

Abstract: The present invention discloses a DC solid-state circuit breaker with self-adapt fault current limiting capability. The topology of the DC solid-state circuit breaker is a H-bridge circuit consisting of two unidirectional breakable bridge arms and two series-connected diode bridge arms, wherein the two unidirectional breakable bridge arms are connected in series to the two series-connected diode bridge arms in a same direction to form two series branches, respectively; the series branches are connected in parallel; a series branch formed by a DC reactor L and a DC biased power supply is connected to the PCC between the two unidirectional breakable bridge arms and the PCC between the two series-connected diode bridge arms; the DC line is connected to the two PCCs, respectively.

Abstract: A conducted electrical weapon (“CEW”) launches wire-tethered electrodes from multiple cartridges to provide a stimulus signal through a human or animal target to impede locomotion of the target. The CEW may detect the quality of the electrical coupling (e.g., connection) of pairs of electrodes with the target. In accordance with the quality of the connections, the CEW may provide pulses of a stimulus signal to the various connections between electrode pairs in accordance with a sequence. The sequence may provide pulses at a first maximum pulse rate to any one connection to increase the likelihood of inducing neuromuscular incapacitation (“NMI”) and to save energy. The sequence may provide pulses to all connections at a second maximum pulse rate to increase the likelihood of inducing NMI and to save energy.

Abstract: A line length between an input end of a switching circuit and a high frequency capacitor is shorter than a line length between an output end of a DC power supply and the high frequency capacitor. A current path going through the switching circuit and the high frequency capacitor is the shortest among a plurality of current paths through which a switching current is caused to flow by switching at the switching circuit. Furthermore, the high frequency capacitor makes the ratio of time during which the voltage across the high-side switch element changes by a switching operation of the high-side switch element and the ratio of time during which the voltage across the low-side switch element changes by a switching operation of the low-side switch element the same, and thus reduces a harmonic wave current included in a current output from the high frequency power generation circuit.