Abstract: A memory module includes one or more memory devices and a memory interface chip coupled to the one or more memory devices via one or more communication links. The memory module further includes a persistent memory storing one or more sets of training and calibration settings corresponding to communication over the one or more communication links, where the one or more sets of training and calibration settings are stored in the persistent memory before operation of the memory module and used to configure one or more components of the memory interface chip during the operation of the memory module.

Abstract: Different pages of a quad-level cell (QLC) memory can have different data retention characteristics. A controller of a data storage device can store selected data in relatively-lower data retention pages of the QLC block. For example, data for an internal data storage device operation can be stored in the relatively-lower data retention pages of QLC memory, and host data can be stored in the relatively-higher data retention pages of QLC memory. Other examples are provided.

Abstract: A memory processing unit (MPU) can include a first memory, a second memory, a plurality of processing regions and control logic. The first memory can include a plurality of regions. The plurality of processing regions can be interleaved between the plurality of regions of the first memory. The processing regions can include a plurality of compute cores. The second memory can be coupled to the plurality of processing regions. The control logic can configure data flow between compute cores of one or more of the processing regions and corresponding adjacent regions of the first memory. The control logic can also configure data flow between the second memory and the compute cores of one or more of the processing regions. The control logic can also configure data flow between compute cores within one or more respective ones of the processing regions.

Abstract: A controller controls an operation of a semiconductor memory device based on a request received from a host. The controller includes a host interface, a first function block, a second function block, and an internal command cache. The host interface generates a first internal command in response to the request. The first function block generates a second internal command in response to the first internal command. The second function block operates in response to the second internal command. The internal command cache caches at least one internal command corresponding to a reference internal command.

Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including running sample data through each of a set of error-handling operations performed on data residing in a segment of the memory device in an existing order; and determining an optimized order of the set of error-handling operations based on probability data and latency data, wherein the probability data is associated with a result of running the sample data, and wherein the optimized order comprises an adjustment to an order of one or more error-handling operations of the set of error-handling operations in the existing order.

Abstract: A system receives a quota request in which a tenant, one or more locations, and a capacity upper limit related to a requested quota are designated, executes conflict determination n based on quota information, and adds information related to the requested quota to the quota information when a result of the conflict determination is false. The quota information includes information representing a tenant, one or more locations, and a capacity upper limit for each quota of the plurality of storage devices at the plurality of locations. For each of the plurality of locations, a capacity usable by the tenant among a capacity of the storage device at the location is equal to or less than the capacity upper limit of the quota corresponding to the location and the tenant.

Abstract: A data-saving system includes a data-saving section to acquire and save multiple pieces of data generated when a board working machine performs a board work, a standard storage section that is a candidate for a save destination for saving the data, an additional storage section that is capable of being added to the system and removed from the system, the additional storage section being a candidate for the save destination for saving the data, a degree-of-priority setting section to set a degree of priority for saving for each of the multiple pieces of data based on an execution state of the board work when the data is generated, and a save destination control section to control the save destination of the data based on the set degree of priority while referring to one or more conditions of a condition of presence or absence of the additional storage section.

Abstract: In one embodiment, an apparatus includes a memory and a scheduler. The scheduler is coupled to the memory and a memory controller. The memory stores a plurality of metadata requests. Each of the plurality of metadata requests is associated with one of a plurality of metadata priority levels. The scheduler schedules transmission of a first metadata request of the plurality of metadata requests to the memory controller based at least in part on a first metadata priority level associated with the first metadata request and a first bandwidth portion of a metadata request bandwidth. The first bandwidth portion is associated with the first metadata priority level. Other embodiments are described and claimed.

Abstract: A stacked memory device includes memory dies over a base die. The base die includes separate memory channels to the different dies and external channels that allow an external processor access to the memory channels. The base die allows the external processor to access multiple memory channels using more than one external channel. The base die also allows the external processor to communicate through the memory device via the external channels, bypassing the memory channels internal to the device. This bypass functionality allows the external processor to connect to additional stacked memory devices.

Abstract: Embodiments of the present invention relate to multiple parallel lookups using a pool of shared memories by proper configuration of interconnection networks. The number of shared memories reserved for each lookup is reconfigurable based on the memory capacity needed by that lookup. The shared memories are grouped into homogeneous tiles. Each lookup is allocated a set of tiles based on the memory capacity needed by that lookup. The tiles allocated for each lookup do not overlap with other lookups such that all lookups can be performed in parallel without collision. Each lookup is reconfigurable to be either hash-based or direct-access. The interconnection networks are programed based on how the tiles are allocated for each lookup.

Abstract: Systems and methods for maintaining order consistency for asynchronous writes in a network device. In one embodiment, a method includes issuing, by a feature agent of a network device, a plurality of writes to software tables which may be contained in the feature agent. For each write, a corresponding entry is added to a log associated with the software tables, the log entry identifying an order of the write among the plurality of writes. A hardware agent accesses the log to select a next one of the entries in the identified write order and then accesses the software table to retrieve content identified by the selected log entry. The hardware agent then translates the information from the software table to a different form if necessary and writes the information to one or more hardware tables that are indicated by the write associated with the selected log entry.

Abstract: Examples of the present disclosure provide a memory system and operation method thereof, a host device and operation method thereof, and a computer-readable storage medium. The memory system includes a memory device and a memory controller coupled to the memory device; The memory controller is configured to: receive a read command, the read command indicating to read event log information generated during running of firmware, the event log information including an index number and a parameter value of an event log; and the firmware runs different functional modules to correspondingly generate different event log elements, the different event log elements corresponding to different index numbers.

Abstract: A method and apparatus of managing memory includes storing a first memory page at a shared memory location in response to the first memory page including data shared between a first virtual machine and a second virtual machine. A second memory page is stored at a memory location unique to the first virtual machine in response to the second memory page including data unique to the first virtual machine. The first memory page is accessed by the first virtual machine and the second virtual machine, and the second memory page is accessed by the first virtual machine and not the second virtual machine.

Abstract: A data storage device includes storage media and control circuitry and is configured to enable the creation of partitions with different performance levels. The storage media includes a first set and a second set of memory blocks having different performance levels. The control circuitry is configured to: in response to a request from a host system, provide performance data from the first set of memory blocks and the second set of memory blocks to the host system. The control circuitry is further configured to: receive partition settings from the host system, the partition settings creating a first partition including at least part of the first set of memory blocks and a second partition including at least part of the second set of memory blocks, wherein the first partition has a better performance level than the second partition; and save the partition settings to the storage media.

Abstract: A memory device includes a plurality of memory cells. Each memory cell stores a plurality of signal levels representing a plurality of values corresponding to a respective plurality of bits, bits in corresponding respective positions of significance across the plurality of memory cells constituting respective memory pages of the memory device. The memory device also includes decoding circuitry to decode each bit value of one of the respective memory pages using bit values read from at least one other one of the respective memory pages, adjacent to the one of the respective memory pages. The plurality of signal levels may represent the plurality of values according to a Gray code. The decoding circuitry may be configured to compare each signal level to a set of voltage thresholds, and to decode a subset of the plurality of signal levels using fewer than all voltage thresholds in the set of voltage thresholds.

Abstract: An embodiment maps identifying information of a remote registry into a database within a local inventory at a local registry hub. An embodiment selects at least one remote registry from an index maintained in the local inventory in accordance with a policy received at a scheduler from an external client of the local registry hub. An embodiment selects a locally stored image in accordance with a policy received from an external client of the local registry hub. An embodiment uploads replicas of the selected image via one or more registry agents, each registry agent transmitting to its corresponding remote registry, transmitting constituent layers of the replica across multiple remote registries simultaneously such that a subset of the layers constituting the image are uploaded to each remote registry. An embodiment stores metadata for the uploaded image in a cache within a local metadata store.

Abstract: A user can select a capacity setting for a transitional partition that determines the allocation between a low-density partition and a high-density partition in the transitional partition. The transitional partition can dynamically change among multiple settings having different capacities for the low-density partition. If the current setting of the transitional partition does not efficiently utilize the available storage space based on the user's preferences for storing different types of data in the low-density partition and the high-density partition, then the user can choose to change the transitional partition to a different setting that better suits the individual user's storage allocation preferences. Therefore, valuable storage space will not be under-utilized but instead will be repurposed for more efficient use by converting a low-density partition to a high-density partition, and vice versa.

Abstract: Selective packing of small block write operations is implemented prior to compression, to improve compression efficiency and hence reduce bandwidth requirements of a Remote Data Replication (RDR) facility. Compression characteristics of write IO operations are forecast, and write IO operations with similar forecast compression characteristics are pooled. Write IO operations are also grouped according to extent, device, and storage group. Write operations from a given compression pool are then preferentially selected from the extent-level grouping, next from the device-level grouping, and then from the SG-level grouping, to create an IO package. The IO package is then compressed and transmitted on the RDR facility. By creating an IO package prior to compression, it is possible to achieve greater compression than would be possible if each individual write IO operation were to be individually compressed to thereby reduce network bandwidth of the RDR facility.

Abstract: A data arrangement method based on file system, a memory storage device and a memory control circuit unit are disclosed. The method includes: analyzing a file system stored in a system region to obtain a plurality of first logical units to which a first file belongs and first distribution information of a plurality of first physical units in a storage region, wherein the first physical units are mapped by the first logical units; determining whether to activate a data arrangement operation on the first file according to the first distribution information; after the data arrangement operation on the first file is activated, reading first data belonging to the first file from the first physical units; and writing, sequentially, the read first data to at least one second physical unit in the storage region.