Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.

Abstract: Techniques for accessing a storage system involve: based on a detection that a first host configured to use a first protocol to access a storage system is connected to the storage system, determining a source logical storage space from a second group of logical storage spaces associated with a second protocol. The second protocol is different from the first protocol. The techniques further involve: determining, from a first group of logical storage spaces associated with the first protocol, a target logical storage space to which the source logical storage space is mapped. The techniques further involve: allocating the target logical storage space to the first host, so that the first host accesses the storage system via the target logical storage space. Accordingly, suitable protocols can be flexibly used to access the storage system without cumbersome and time-consuming operations.

Abstract: A technique includes, in response to a cache miss occurring with a given processing node of a plurality of processing nodes, using a directory-based coherence system for the plurality of processing nodes to regulate snooping of an address that is associated with the cache miss. Using the directory-based coherence system to regulate whether the address is included in a snooping domain is based at least in part on a number of cache misses associated with the address.

Abstract: A method includes using a memory address map, locating a first portion of an application in a first memory and loading a second portion of the application from a second memory. The method includes executing in place from the first memory the first portion of the application, during a first period, and by completion of the loading of the second portion of the application from the second memory. The method further includes executing the second portion of the application during a second period, wherein the first period precedes the second period.

Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.

Abstract: A method, system, and computer program product for managing input/output (I/O) operations in log structured arrays (LSA) is provided. The method receives a write request for a storage volume. The write request including a set of data. The method determines the set of data for a target extent of the storage volume is not copied to a target location based on a target map for a flash copy volume. An LSA is instructed to perform an internal copy-on-write (COW) for the set of data during a next IO operation for the storage volume. Based on the internal COW instruction, the method moves an internal pointer of the target location from a virtual volume to the flash copy volume.

Abstract: Apparatuses and methods for performing concurrent memory access operations for different memory planes are disclosed herein. An example apparatus may include a memory array having a plurality of memory planes. Each of the plurality of memory planes comprises a plurality of memory cells. The apparatus may further include a controller configured to receive a group of memory command and address pairs. Each memory command and address pair of the group of memory command and address pairs may be associated with a respective memory plane of the plurality of memory planes. The internal controller may be configured to concurrently perform memory access operations associated with each memory command and address pair of the group of memory command and address pairs regardless of page types associated with the pairs of the group (e.g., even if two or more of the memory command and address pairs may be associated with different page types).

Abstract: A storage system is described. The storage system may include a plurality of storage tiers, each including at least one storage device, each storage device including storage and a controller. Metadata storage may store metadata for an image stored in the plurality of storage tiers, which includes a location in the plurality of storage tiers where the image is stored. A receiver may receive a request to access the image from a host. Retrieval software, executed by a processor, may retrieve the image from the plurality of storage tiers using the location where the image is stored. A transmitter may transmit the image to the host.

Abstract: A data storage system can provide low cost and optimized performance with a cartridge housing multiple separate data storage devices and each of the data storage devices being concurrently engaged by a device player. The device player may have a processor configured to analyze mechanical performance of each data storage device and data performance of data resident in each data storage device.

Abstract: Network scaling techniques for HCI and/or heterogeneous storage clusters. The techniques are based on the use of cluster-wide logical networks and IP port abstractions. Each logical network represents a pool of IP addresses having a common set of properties. Each logical network has an associated type and a corresponding set of protocols that define its purpose. Each IP port abstraction is associated with physical and/or virtual network objects inherently visible to a storage administrator. Each IP port abstraction functions as a target for assignment of an IP address from a pool of IP addresses represented by a logical network. The IP port abstractions are backed by underlying heterogeneous network objects but have unified sets of capabilities. Network scaling can be implemented by applying one or more IP addresses represented by one or more logical networks to selected sets of IP port abstractions backed by underlying heterogeneous network objects.

Abstract: An indication that one or more program operations have been interrupted as a result of a read operation can be received at a first controller component associated with a memory sub-system. Context data associated with interrupted program operations can be received at the first controller component. A control sequence based on the context data can be generated at the first controller component. The control sequence can indicate how a second controller component associated with the memory sub-system interacts with a memory component of the memory sub-system to perform the read operation and to resume the interrupted program operations. The control sequence can further specify one or more additional operations that are associated with copying data of the interrupted program operations between first and second memory locations of the memory component. The control sequence can be provided to the second controller component.

Abstract: Embodiments of the present invention relate to multiple parallel lookups using a pool of shared memories by proper configuration of interconnection networks. The number of shared memories reserved for each lookup is reconfigurable based on the memory capacity needed by that lookup. The shared memories are grouped into homogeneous tiles. Each lookup is allocated a set of tiles based on the memory capacity needed by that lookup. The tiles allocated for each lookup do not overlap with other lookups such that all lookups can be performed in parallel without collision. Each lookup is reconfigurable to be either hash-based or direct-access. The interconnection networks are programed based on how the tiles are allocated for each lookup.

Abstract: A storage system is managed. For example, in response to a request at a first storage node for data related to a second storage node, it is determined whether the first storage node and the second storage node belong to the same storage node group having an interconnection structure. If it is determined that the first storage node and the second storage node belong to different storage node groups, data is transmitted between the first storage node and the second storage node based on a mapping between storage nodes in a first storage node group with the first storage node and storage nodes in a second storage node group with the second storage node. Thus, data transmission can be performed between different storage node groups through a mapping relationship.

Abstract: The present technology relates to a memory controller and a method of operating the same. The memory controller may include a block manager designating a first memory block as an open block, which is driven to program m-bit data per cell, where m is a natural number, an address manager increasing an access count value corresponding to a logical address for the first memory block whenever a program request or a read request including the logical address is received from a host, and a data manager determining a representative attribute of data programmed in the first memory block based on access count values for the logical addresses for the first memory block when a flush request is received from the host. The block manager may determine whether to designate a new open block according to the determined representative attribute.

Abstract: Optimizing copy operations in a storage array, including: receiving a plurality of copy operations; detecting a triggering event that causes a storage array controller to initiate execution of the plurality of copy operations; and combining, in dependence upon a metadata optimization policy, the plurality of copy operations into a single copy operation.

Abstract: Creating a virtual storage system, including: instantiating one or more virtual storage controllers; instantiating one or more virtual storage devices each including multiple storage tiers; and constructing a virtual storage system in which the one or more virtual storage devices are coupled to each of the one or more virtual storage controllers.

Abstract: A storage device is connected to a migration source storage device that stores migration target data via a data line. A transportable external mass storage device that stores the migration target data migrated from the migration source storage device is connected to the storage device. The storage device references logical configuration information received from the migration source storage device via the data line and restores and stores the migration target data stored in the external mass storage device.

Abstract: A data processing device may include an internal volume that is sealed from space outside the internal volume and an optical system. The optical system may include a first portion, disposed in the internal volume, adapted to receive network data units from devices disposed in the internal volume and a second portion of the optical system. The optical system may also include the second portion, disposed outside of the internal volume, adapted to obtain the network data units from the first portion via an optical connection using transmission at optical frequencies.

Abstract: Reinforcement learning is used to dynamically tune cache policy parameters. The current state of a workload on a cache is provided to a reinforcement learning process. The reinforcement learning process uses the cache workload characterization to select an action to be taken to adjust a value of one of multiple parameterized cache policies used to control operation of a cache. The adjusted value is applied to the cache for an upcoming time interval. At the end of the time interval, a reward associated with the action is determined, which may be computed by comparing the cache hit rate during the interval with a baseline hit rate. The process iterates until the end of an episode, at which point the parameters of the cache control policies are reset. The episode is used to train the reinforcement learning policy so that the reinforcement learning process converges to a trained state.

Abstract: Systems and methods are described for using a Deep Reinforcement Learning (DRL) agent to automatically tune Quality of Service (QoS) settings of volumes in a distributed storage system (DSS). According to one embodiment, a DRL agent is trained in a simulated environment to select QoS settings (e.g., a value of one or more of a minimum IOPS parameter, a maximum IOPS parameter, and a burst IOPS parameter). The training may involve placing the DRL agent into every feasible state representing combinations of QoS settings, workload conditions, and system metrics for a period of time for multiple iterations, and rewarding the DRL agent for selecting QoS settings that minimize an objective function based on a selected measure of system load. The trained DRL agent may then be deployed to one or more DSSs to constantly update QoS settings so as to minimize the selected measure of system load.