Abstract: A process of forming electrodes is simplified during modularizing of a solar battery. According to the manufacturing method and the manufacturing apparatus, a thin solar battery is manufactured at a reduced cost and with a better yield. Using a robot which includes a suction chip which can handle a semiconductor film 2 without any damage which is separated from a particular substrate 1, the semiconductor films 2 are each accurately placed through a transparent resin 3 onto a glass substrate 7 which serves as a window of a solar battery, and p-type and n-type electrodes are printed at a time on the semiconductor films 2 which are arranged. Further, since a monolithic tab electrode is soldered to connect the electrodes, the manufacturing processes of the solar battery are simplified.

Abstract: In forming an element isolating region in a silicon semiconductor layer of an SOI substrate, a silicon nitride film of a predetermined thickness is deposited over an oxide film formed on a SOI layer. The silicon nitride film is patterned in a design size of active regions, and side walls of a silicon nitride film are formed on the side surfaces of the patterned silicon nitride film. A first LOCOS process is carried out using the nitride film as an oxidation mask. A LOCOS film formed by the first LOCOS process is removed to form narrower concavities under the side walls. Then, another silicon nitride film is deposited, and is removed leaving portions thereof forming the concavities. Then, a second LOCOS process is carried out to form a LOCOS film as an element isolating region. The second LOCOS process uses the oxidation mask having the narrow cavities, so that stress at the boundary of the active region and the element isolation region is reduced, and the growth of bird's beaks can be suppressed.

Abstract: A fabrication method of a semiconductor device capable of effective gettering treatment even when electronic elements are further miniaturized and further integrated and a semiconductor substrate or wafer is upsized. First, a single-crystal silicon substrate having a p-type gettering layer in its interior is prepared. Transistors are formed at the main surface of the substrate. An interlayer dielectric layer is formed to cover the transistors. Contact holes are formed in the interlayer dielectric layer to uncover specific positions of the respective transistors. The substrate is rapidly heated to a first temperature of 700.degree. C. to 850.degree. C. at a heating rate. The substrate is gradually cooled from the first temperature to a second temperature of approximately 600.degree. C. at a cooling rate. Metallic wiring lines are formed on the interlayer dielectric layer to electrically connected to the respective transistors through the corresponding contact holes.

Abstract: A process for producing a semiconductor device comprising the steps of forming a titanium film having a (002) orientation, forming a titanium nitride film on the titanium film to such a thickness as allows the titanium nitride film to follow the orientation of the titanium film, and forming an aluminum alloy film on the titanium nitride film, thereby to form a layer structure for wiring including the aluminum alloy film having a (111) orientation.

Abstract: The present invention is intended to provide a semiconductor optoelectric device with high luminescent efficiency and a method of manufacturing the same. The semiconductor optoelectric device 18 according to the present invention is constructed by depositing compound-semiconductor layers 13 and 14 on a monocrystalline substrate 11 of a hexagonal close-packed structure. The shape of the monocrystalline substrate 11 is a parallelogram. Individual sides of the parallelogram are parallel to a <11-20> orientation. As the monocrystalline substrate, sapphire, zinc oxide or silicon carbide may be used. As the compound-semiconductor layers, an n-type GaN layer 13 and p-type GaN layer 14 may be used.

Abstract: A procedure for forming the barrier layer includes a plasma procedure in the fabricating procedure. The procedure is that an opening is formed on a dielectric layer, which is formed over a semiconductor substrate, by a damascene technology or a patterning process. Then, the plasma procedure is applied by following a procedure in which a halide gas is flowed over the substrate. Then, the halide gas is dissolved by applying plasma to it to form halogen atoms with free bonds, which can enter the dielectric layer to form another halide with the dielectric material and stay close to the surface. Then, a metal layer is formed over the substrate. The metal layer fills the opening and results in a reaction with the halide in the surface of the dielectric layer. A nonvolatile metallic halide layer, therefore, is formed. The nonvolatile metallic halide layer is a nonvolatile insulating layer that acts as the barrier layer between the metal layer and the dielectric layer.

Abstract: A method of manufacturing a capacitor whose top and bottom electrodes have the nearly equal doping concentrations. In the method, a top surface of the capacitor top electrode is polished by a CMP (chemical mechanical polishing) and then doped using the same doping process as the capacitor bottom electrode, so that other elements can be isolated during the doping process. After forming the capacitor bottom electrode, thermal oxidation is performed so that the injected impurity ions of the capacitor bottom electrode are segregated toward a top surface portion thereof. With this method, a doping concentration at the top surface portion of the capacitor bottom electrode becomes higher than that at other portions thereof, and thereby the capacitor top and bottom electrodes may have a nearly same doping concentration at the interface therebetween.

Abstract: A thin film magnetic head is fabricated on a substrate by depositing a seed layer on the substrate. A lower magnetic layer is plated on the substrate in an opening provided in an insulative layer which is deposited on the seed layer. A plurality of magnetic layers are plated at one end of the lower magnetic layer to build-up and form a first side pole by using the above seed layer as a seed. Another plurality of magnetic layers are plated at the other end of the lower magnetic layer to build-up and form a second side pole by using the same seed layer as a seed. The first and second side poles thus formed include upper and lower ends, the lower ends being plated to the ends of the lower magnetic layer. A first upper pole is plated to the upper end of the first side pole. The first upper pole includes a gap end facing the second side pole. A gap region of nonmagnetic material is deposited adjacent the gap end of the first upper pole.

Abstract: A high-precision, linear MOS-transistor-gate capacitor device is provided by applying a source/drain high-energy, high-dose ion implantation through implant windows in a polysilicon top plate of the capacitor. The ion implantation may be a step of generic MOS source/drain process flow.

Abstract: A method of fabricating high-density flat cell mask ROM is disclosed. The method comprises, formed a plurality of trenches in a silicon substrate firstly. An oxynitride layer is then grown on resultant surfaces to about 1-5 nm, After refilling a plurality of trenches with a first in-situ phosphorus doping polysilicon layer or amorphous silicon, etching back the polysilicon layer to form a flat surface by a CMP process is achieved. Subsequently, a thermal oxidation process is carried out to grow an oxide layer and to form a plurality of buried bit lines by diffusing the conductive impurities in the polysilicon layer through the oxynitride layer into the silicon substrate. A second in-situ n+ doped polysilicon layer is deposited and patterned as word lines; then a patterned photoresist coated on the second polysilicon layer except predetermining coding regions. Finally, a coding boron implant into the predetermined coding region is done to form normally off transistors.

Abstract: A cleaving apparatus for separating a wafer (or bar) bar of optical devices into separate bars (or individual optical devices) comprises a relatively thin wire, preferably tungsten. The wire is forced against the underside of the bar directly underneath the location of a top side scribe mark. The wire, having a highly uniform, well-controlled radius of curvature, induces a known, reproducible stress through the body of the bar and nucleates a cleavage crack under the scribe mark. A force applied to the top surface of the bar will allow the cleaving crack to propagate cleanly along a single crystal surface through the depth of the bar to the location of the wire.

Abstract: A method for fabricating a semiconductor device, such as a MOS (metal-oxide semiconductor) transistor, with self-aligned silicide is provided. This method can prevent junction leakage between the silicide and the substrate so as to allow the resultant semiconductor device to have reliable performance. The method includes the steps of preparing a semiconductor substrate; forming at least one transistor element over the substrate, the transistor element including a pair of source/drain regions, a gate, a dielectric layer over the gate, and a spacer on the sidewall of the gate; and performing an ion-bombardment process so as to transport one part of the dielectric layer that is adjacent to the top of the spacer to beside the bottom of the spacer.