Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.

Abstract: Power converters including electronic-embedded transformers for current sharing and load-independent voltage gain are described. In one example, a power converter system includes an input, an output, a power converter between the input and output, and a controller. The converter includes a first bridge, a second bridge, and an electronic-embedded transformer (EET) between the first and second bridge. The EET includes a capacitor and a capacitance coupling switch bridge. The controller generates switching control signals for the first and second bridges and phasing drive control signals for the capacitance coupling switch bridge in the EET. The controller applies a phase shift to the phasing drive control signals for the EET as compared to the switching control signals for the first and second bridges, so that the voltage across the capacitor in the EET cancels the leakage inductance of the transformer windings in the EET, at any switching frequency.

Abstract: In order to protect an inverter from prohibited switching states, a monitor including monitoring inputs and monitoring outputs is provided. The monitoring inputs are connected to the control outputs in order to receive the switching patterns, and the monitoring outputs are connected to the power switches. The monitor is designed to compare a transition from a first switching pattern to a second switching pattern with a number of prohibited transitions and/or with a number of permitted transitions and block the second switching pattern in the event of a match with one of the prohibited transitions and/or in the event of a deviation from the number of permitted transitions and to output the second switching pattern to the power switches via the monitoring outputs in the event of a deviation from the number of prohibited transitions and/or in the event of a match with one of the permitted transitions.

Abstract: A ZCVTT switching circuit includes a switch, and a passive block coupled to the switch and configured to damp an input signal from the switch. The switching circuit further includes a recycle positive energy (RPE) block coupled to the passive block and configured to recycle positive energy from a positive spike from the passive block, and a recycle negative energy (RNE) block coupled to the passive block and configured to recycle negative energy from a negative spike from the passive block.

Abstract: A reference circuit generates a reference circuit output signal that has a curvature-corrected linear dependence on the temperature. It includes a first reference circuit, with a first output signal that is based on a base-emitter voltage of a bipolar junction transistor (BJT) and a second reference circuit, with a second output signal that is based on a gate-source voltage of a metal-oxide-semiconductor (MOS) transistor operating in weak inversion mode. It has an output circuit that adds the first output signal and the second output signal to obtain the reference circuit output signal. The reference circuit output signal may be a current or a voltage. It may be independent of the temperature, or have a positive or negative temperature coefficient.

Abstract: A system includes: a pre-charge circuit configured to produce direct current (DC) electrical power; a common DC bus; and a plurality of inverters, each inverter including: a local DC bus; a capacitor network connected to the local DC bus; an electrical network connected to the local DC bus, the electrical network configured to generate an alternating current (AC) drive signal; and a plurality of switching assemblies, each switching assembly being associated with one of the inverters, and each switching assembly configured to control whether the local DC bus and the capacitor network of the associated inverter are electrically connected to the common DC bus or to the pre-charge circuit.

Abstract: Described embodiments include a circuit for reducing output voltage noise in a voltage regulator includes an amplifier having first and second amplifier inputs, a compensation terminal and an amplifier output. The first amplifier input is coupled to a reference voltage terminal, and the compensation terminal coupled to an output terminal. A buffer amplifier has a buffer input and a buffer output, and the buffer input is coupled to the amplifier output. A first transistor is coupled between a supply voltage terminal and the output terminal, and has a first control terminal that is coupled to the buffer output. A boost current injection circuit has a boost input and a boost output, and the boost input is coupled to the supply voltage terminal. A second transistor is coupled between the boost output and the compensation terminal, and has a second control terminal.

Abstract: A power conversion device include a switch for switching so as to output by selecting one of a command value the first DC voltage controller outputs or holds or the command value the second DC voltage controller outputs, a detector that detects the opening of the contactor and the recovery from voltage disturbance in the system on the AC side of the power conversion circuit, and a switching controller controls the switching of the switch so that selects and outputs the command value output by the second DC voltage controller when the detector detects the opening of the contactor, and selects and outputs the command value held by the first DC voltage controller when the detector detects the recovery from the voltage disturbance.

Abstract: A three-level power converter includes a direct current power supply unit including a filter capacitor connected between a high potential line and an intermediate potential line and a filter capacitor connected between the intermediate potential line and a low potential line, and a power conversion circuit that converts a three-level direct current voltage output from the high potential line, the intermediate potential line, and the low potential line into a three-phase alternating current voltage. A controller generates an imbalance signal representing an imbalance between a first capacitor voltage and a second capacitor voltage on the basis of values detected by voltage sensors, and generates a modulation signal for causing the power conversion circuit to perform a two-phase modulation operation on the basis of a superimposed signal obtained by superimposing the imbalance signal on a reference signal of the three-phase alternating current voltage.

Abstract: Systems and methods for controlling a dual active bridge converter are disclosed herein. Switch control signals are provided to respective switches of at least one bridge of a dual active bridge converter. Control circuitry causes the switch control signals to switch according to a first switching sequence. After causing the switch control signals to switch according to the first switching sequence, the control circuitry causes the switch control signals to switch according to a second switching sequence, distinct from the first switching sequence, to distribute switching losses among the switches.

Abstract: An exemplary system includes an inverter coupled to a DC source, eight power switches and three DC-link capacitors that synthesize seven output voltage levels. In one example the inverter includes a four-level active neutral pointed clamped inverter (4L-ANCP) that includes six power switches of the eight power switches is operated at a switching frequency with a first voltage stress level, and a half-bridge that includes the other two of the eight power switches is coupled to the 4L-ANCP and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level.

Abstract: The invention discloses a low power consumption and high precision resistance-free CMOS reference voltage source circuit, which includes a, a positive temperature coefficient voltage generation circuit and a starting circuit. The self-bias current source circuit uses two NMOS tubes with different threshold voltages in the subthreshold region to form a stack structure, which generates the bias current and negative temperature coefficient voltage on the order of nanoampere. The positive temperature coefficient voltage generation circuit uses PMOS differential to generate positive temperature coefficient voltage for the structure and performs first-order curvature compensation for negative temperature coefficient voltage.

Abstract: Disclosed are a modulation strategy suitable for balancing losses of power switches in a bridge arm of a neutral point clamped three level inverter and an implementation method. The modulation strategy includes that an operation type of an inverter is determined and a corresponding modulation style is selected on the basis of a power factor (PF) angle; a corresponding modulation interval is selected according to the modulation style; and drive signals for various power switches are outputted, to balance switching losses of inner and outer sides of a bridge arm. The modulation strategy of the present disclosure enables the rational utilization of freewheeling paths to achieve a balanced distribution of losses between the inner and outer power switches of the inverter bridge within the entire PF range, thereby prolonging the service life of power electronic devices.

Abstract: A resonant converter has a primary resonant tank circuit and a secondary resonant tank circuit. An inverter circuit converts an input DC voltage received by the resonant converter at an input voltage node to a pulsating signal that is fed to the primary resonant tank circuit to generate a resonant tank current that flows through a primary winding of a transformer. The resonant tank current induces current in a secondary winding of the transformer. The induced current is rectified by a rectifier and the rectified signal is filtered to generate an output DC voltage at an output voltage node. The secondary resonant tank circuit is disposed between the secondary winding of the transformer and the output voltage node, and a tank node of the secondary resonant tank is connected to the primary resonant tank circuit through the inverter circuit.

Abstract: A smart power stage module includes an output stage and a driving circuit. The output stage includes a low-side switch and provides an output current. The driving circuit controls an operation of the output stage according to a PWM signal. The driving circuit includes a determination circuit generating a control signal according to the PWM signal and a signal combination circuit providing a current monitoring signal representing the output current. The current monitoring signal is a combination of a simulated current signal and an actual sensed current signal. The signal combination circuit includes a switching circuit switching according to the control signal to adjust a proportion of simulated current signal and actual sensed current signal. When the on-time period part of low-side switch is shorter than a default time period, the switching circuit shortens duration of simulated current signal in the current monitoring signal according to the control signal.

Abstract: A three-level flying capacitor multi-level (3L-FCM) power converter is controlled by a switching signal generator having a reference signal for generating switching signals for driving a first pair S1, S1? and a second pair S2, S2? of switches. Circuitry generates, from the reference signal, a first modified reference signal defined as half of the sum of 1 and the reference signal. From the first modified reference signal a second modified reference signal is generated having a half-period phase shift from the first modified reference signal. A carrier signal having a constant frequency is generated and a first comparator and a second comparator compare the first and the second modified reference signals to the carrier signal to generate frequency signals for driving the first pair of switches S1, S1?, and the second pair of switches S2, S2?, respectively.

Abstract: A DC-DC regulator system includes a power circuit which has a first input coupled to receive an input voltage, a second input coupled to receive a control signal and an output to provide a regulated output voltage. The system includes a control circuit which has a first input coupled to receive the regulated output voltage, a second input coupled to receive a reference voltage, a first output to provide the control signal, and a second output to provide a converter clock signal. The system includes an out-of-audio circuit which has a first input coupled to receive a minimum threshold frequency signal, a second input coupled to receive the converter clock signal, a third input coupled to the power circuit output, and a fourth input coupled to receive a bandwidth control clock signal.

Abstract: This patent presents a multidimensional space vector modulation (MDSVM) circuit formed by coupling a half-bridge logic control circuit not directly coupled to electronic components with at least three half-bridge logic control circuits coupled to electronic components. The half-bridge logic control circuit not directly coupled with any electronic components can form a full-bridge circuit with any other half-bridge logic control circuit coupled with electronic components. Therefore, users can further control the voltage difference between both ends of each electronic component separately and then individually control the strength and direction of current flowing through each electronic component and solving the problem of control attributed to the complexity of prior art.

Abstract: A control device includes: a prediction unit configured to predict the harmonic current at each of prediction points comprised in a predetermined prediction target period after current time, based on control information of the motor in at least a next carrier cycle of the inverter, and a command value determination unit configured to output, to the active filter unit, a current command value for generating a compensation current having a polarity opposite to a polarity of a harmonic current at a prediction point, at a timing corresponding to the prediction point comprised in the next carrier cycle in the prediction target period, based on a prediction result of the prediction unit. Each of the prediction points is provided at a predetermined time interval since start time of the prediction target period. The time interval is longer as the next carrier cycle is longer.

Abstract: Disclosed is an asymmetric half-bridge flyback converter and a control method, including: in an initial switching cycle of the asymmetric half-bridge flyback converter, obtaining a pre-turnoff time of the second switch transistor, and controlling the second switch transistor to be turned off after a delay which lasts for a first time and starts at the pre-turnoff time of the second switch transistor; in a non-initial switching cycle of the asymmetric half-bridge flyback converter, obtaining a judgment result by judging whether the first switch transistor is operated with zero-voltage switching in a current switching cycle, and adjusting a length of the first time based on the judgment result. The present disclosure can realize zero-voltage switching of the asymmetric half-bridge flyback converter, and at the same time, satisfy a requirement for achieving more ideal dead-time setting under a wider range of input voltage and a wider range of output voltage.