Patents Examined by Zeev Kitov
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Patent number: 6831823Abstract: A substrate chucking apparatus includes an electrostatic chuck for electrostatically chucking a substrate, and a DC power supply for applying a DC chucking voltage to the electrostatic chuck. An amplitude of the chucking voltage Vc is exponentially decreased with respect to a chucking time after an operation of chucking the substrate starts. Such a control of the chucking voltage variation is executed by a control device.Type: GrantFiled: August 7, 2002Date of Patent: December 14, 2004Assignee: Nissin Electric Co., Ltd.Inventor: Shuya Ishida
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Patent number: 6829126Abstract: An ESD protection circuit including an NMOS transistor connected between an input/output pad and a ground. The NMOS transistor has a parasitic bipolar transistor, and at least one diode is connected between the input/output pad and the NMOS transistor.Type: GrantFiled: December 28, 2001Date of Patent: December 7, 2004Assignee: Hynix Semiconductor, Inc.Inventors: Myoung Goo Lee, Hong Bae Park
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Patent number: 6813134Abstract: An electrostatic chucking device having a laminated structure formed by sequentially laminating a first insulation layer, an electrode layer, and a second insulation layer on a metal substrate. The first and second insulation layers are formed from polyimide films. At least one adhesion layer is provided between the metal substrate and the first insulation layer, and, preferably, between the first insulation layer and the electrode layer, and between the electrode layer and the second insulation layer. The adhesion layer is a thermoplastic polyimide-based adhesive film having a film thickness of 5 to 50 &mgr;m. The electrostatic chucking device may be manufactured by a low-temperature compression bonding process under pressure at a temperature of 100 to 250° C. between the metal substrate and the first insulation layer, between the first insulation layer and the electrode layer, and between the electrode layer and the second insulation layer using thermoplastic polyimide-based adhesion films.Type: GrantFiled: August 10, 2001Date of Patent: November 2, 2004Assignees: Creative Technology Corporation, Kawamura Sangyo Co., Ltd.Inventors: Yoshiaki Tatsumi, Kinya Miyashita
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Patent number: 6809911Abstract: The present invention relates to a safety switching device for safely switching off an electrical load such as an electrically driven machine. The safety switching device has a failsafe disconnection unit and a non-failsafe signaling unit, both of which are supplied with an external control signal. The disconnection unit fail-safely switches off the electrical load as a function of the control signal but with a first delay. The signaling unit produces an external reporting signal as a function of the control signal in a non-delayed and non-failsafe manner.Type: GrantFiled: January 31, 2003Date of Patent: October 26, 2004Assignee: Pilz GmbH & Co.Inventors: Rolf Dickhoff, Winfried Gräf
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Patent number: 6798636Abstract: A method of estimating the effect of the parasitic currents in an electromagnetic actuator for the control of an engine valve, the parasitic currents being modelled by means of an equivalent parasitic current which circulates in an equivalent turn which is short-circuited and magnetically coupled to a magnetic circuit formed by an electromagnet and an actuator body and the value of the equivalent parasitic current being estimated by resolving the differential equation obtained by applying the generalized Ohm's law to the equivalent turn.Type: GrantFiled: November 13, 2001Date of Patent: September 28, 2004Assignee: Magneti Marelli Powertrain S.p.A.Inventors: Egidio D'Alpaos, Flavia D'Antonio
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Patent number: 6788511Abstract: A domain power notification system detects when a power domain experiences a power condition, such as lost power and low-voltage power, and communicates that information to the domains that communicate with the problem domain. As a result, the effected domains stop communicating with the problem domain without passing erroneous information.Type: GrantFiled: November 9, 2001Date of Patent: September 7, 2004Assignee: Advanced Micro Devices, Inc.Inventors: Simon Bikulcius, Mark A. Landguth
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Patent number: 6778369Abstract: An electrical distribution device having a main part including a main breaking device, at least one secondary part having at least one secondary breaking device, and an electrical power distribution line connected between the main and secondary parts. The secondary breaking device includes secondary control circuit for enabling opening of at least one secondary breaking device if a current flowing in said breaking device is lower than a preset opening current threshold. A distributed electrical installation includes at least one such device. An electrical protection process for an electrical distribution device includes an opening step of the secondary breaking devices when a current flowing in these devices is lower than a preset opening current threshold following detection of a fault.Type: GrantFiled: January 15, 2002Date of Patent: August 17, 2004Assignee: Schneider Electric Industries S.A.Inventor: Pierre Perichon
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Patent number: 6760203Abstract: A switching power supply with overcurrent protection is provided that comprises a current detection resistor (8) for detecting electric current through an FET (5); a capacitor (11) for accumulating electric charge in response to overcurrent through the current detection resistor (8) due to late OFF switching of the FET (5); and a transistor (12) for reducing source voltage applied to a feed terminal of a control circuit (7) below an operation voltage. When accumulated electric charge in the capacitor (11) exceeds a predetermined level, the transistor (12) is operated to reduce source voltage for the control circuit (7) below operative voltage to stop operation of the control circuit (7) and to thereby restrain overcurrent during delayed time until OFF switching of the FET (5).Type: GrantFiled: June 27, 2002Date of Patent: July 6, 2004Assignee: Sanken Electric Co., Ltd.Inventor: Hiroshi Usui
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Patent number: 6760205Abstract: An active inductance circuit for ESD parasitic cancellation is described. A feedback circuit on a transconductance amplifier is utilized to transform and reflect the impedance of an active inductor to minimize effects of parasitics produced by ESD circuitry. The active inductance circuit may be programmably implemented, allowing tunable component values.Type: GrantFiled: April 3, 2002Date of Patent: July 6, 2004Assignee: Xilinx, Inc.Inventor: Michael J. Gaboury
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Patent number: 6754058Abstract: A current breaker circuit by which currents flowing in loads respectively connected to a plurality of storage devices connected in series are broken in accordance with a single external control signal. The current breaker circuit includes semiconductor switching devices inserted between the storage devices and the loads respectively, a unit for supplying the external control signal to at least one of the semiconductor switching devices, and control signal generating units for generating ON/OFF signals in accordance with turning ON/OFF of the semiconductor switching device supplied with the external control signal so as to supply the ON/OFF signals to the other semiconductor switching devices.Type: GrantFiled: May 31, 2002Date of Patent: June 22, 2004Assignee: Nagano Japan Radio Co., Ltd.Inventors: Seiichi Anzawa, Hiroshi Nishizawa, Chihiro Inoue, Fujio Matsui
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Patent number: 6738239Abstract: A novel motor driver with an active snubber circuit. The motor driver is interposed between an external electrical power source and an electrical motor. The electrical motor is driven in first and second states such that the electrical motor produces an inductive flyback current when it switches torque direction. The motor driver comprises a reverse voltage protector in series between the power source and the electrical motor allowing flow of electrical power to the motor; and a capacitor arranged in parallel circuit with the motor between the motor and the diode (or other reverse voltage protector). The active snubber circuit is in parallel circuit with the motor between the diode and the electrical motor. The active snubber circuit comprises a switch having a sensor responsive to increases in the bus voltage resulting from the inductive flyback current and a resistor in series with the switch regulating electrical current flow.Type: GrantFiled: February 26, 2001Date of Patent: May 18, 2004Assignee: Woodward Governor CompanyInventor: David C. Petruska
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Patent number: 6724603Abstract: An Electrostatic Discharge (ESD) protection circuit (9) includes a plurality of I/O and power supply pad cells (22, 40) that comprise external pads (31, 41) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices (36, 46) coupled in parallel between an ESD bus (14) and a VSS bus (18) and distributed among the plurality of pad cells. One or more trigger circuits (50) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus (12) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.Type: GrantFiled: August 9, 2002Date of Patent: April 20, 2004Assignee: Motorola, Inc.Inventors: James W. Miller, Geoffrey B. Hall, Alexander Krasin, Michael Stockinger, Matthew D Akers, Vishnu G. Kamat
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Patent number: 6714396Abstract: An undervoltage tripping device for a multipolar low-voltage switching device is described. The tripping device contains an electromagnetic tripping mechanism for effectuating a tripping of the multipolar low-voltage switching device given a drop below a predeterminable voltage limit value. The tripping mechanism has a magnetic circuit with a spring-loaded armature and a trip coil including a number of winding portions corresponding to a number of phases of a multiphase power supply circuit. A rectifier bridge is powered by the multiphase power supply circuit. The rectifier bridge has a number of rectifier branches corresponding to the number of the phases of the multiphase power supply circuit. The rectifier bridge is connected to the tripping mechanism and the rectifier branches jointly power the tripping mechanism. The tripping mechanism effectuates an all-pole tripping of the low-voltage switching device given a failure of one of the phases of the multiphase power supply circuit.Type: GrantFiled: October 29, 2001Date of Patent: March 30, 2004Assignee: Ellenberger & Poensgen GmbHInventor: Peter Meckler
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Patent number: 6710990Abstract: As technology in the semiconductor industry advances, semiconductor devices decrease in size to become faster and less expensive per function. Smaller semiconductor devices, particularly MOSFETs, are increasingly sensitive to Electrostatic Discharge (ESD). ESD can either destroy or permanently damage a semiconductor device. Embodiments of the present invention assist in preventing ESD damage to semiconductor devices. An embodiment of the present invention utilizes a diode connected to the substrate terminal of a MOSFET. Under normal operation up to the maximum operating voltage, the diode and MOS devices are open and do not conduct. The diode triggers when an ESD pulse causes the reverse breakdown voltage of the diode to be exceeded. The resultant current switches a connected MOS device, operating in bipolar mode, to dissipate the damaging ESD pulse. The ESD pulse is shunted to ground, thereby avoiding damage to the rest of the device.Type: GrantFiled: January 22, 2002Date of Patent: March 23, 2004Assignee: LSI Logic CorporationInventors: John de Q. Walker, Todd A. Randazzo
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Patent number: 6690555Abstract: A novel trigger switch for an electrostatic discharge protection circuit is disclosed The trigger switch includes a first transistor with one source/drain terminal coupled to a positive electrostatic discharge node of the electrostatic discharge protection circuit. A second transistor has one source/drain terminal coupled to a negative electrostatic discharge node of the electrostatic discharge protection circuit. The second transistor has a second source/drain terminal coupled to a second source/drain terminal of the first transistor. A first resistance is coupled between the positive electrostatic discharge node and a gate terminal of the first transistor. A first capacitance is coupled between the negative electrostatic discharge node and the gate terminal of the first transistor. A second resistance is coupled between the negative electrostatic discharge node and a gate terminal of the second transistor.Type: GrantFiled: March 25, 2001Date of Patent: February 10, 2004Assignee: National Semiconductor CorporationInventor: Ronald Pasqualini
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Patent number: 6687100Abstract: A method of rapidly dissipating energy from a contactor controlled by a switching device, the steps comprising: operably connecting a metal oxide varistor to the switching device; interrupting electrical current to the contactor; absorbing energy from the contactor; and, limiting the amount of voltage across the switching device.Type: GrantFiled: December 30, 1999Date of Patent: February 3, 2004Assignee: Square D CompanyInventors: Julius Isaiah Rice, Roger Alan Plemmons
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Patent number: 6671145Abstract: Resettable circuit interrupting devices, such as GFCI devices, that include a reset lockout mechanism, an independent trip mechanism and reverse wiring protection. A conical reset plunger is notched to force a successful test before reset.Type: GrantFiled: March 20, 2001Date of Patent: December 30, 2003Assignee: Leviton Manufacturing Co., Inc.Inventors: Frantz Germain, Stephen Stewart, Roger M. Bradley, David Y. Chan, Nichalas L. Disalvo, William R. Ziegler
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Patent number: 6650518Abstract: In a production system included in a power modulator for the protection of a load connected to the power modulator, comprising a charging system, a power impulse former, a control arrangement and a pulse transformer with a first protection circuit in the form of a crowbar circuit connected to the input side and the load connected to the output side of the pulse transformer, a second protection circuit is connected to the output side of the pulse transformer between the low potential and the ground potential connections thereof wherein the second protection circuit includes a controlled switch with a resistor arranged in parallel therewith.Type: GrantFiled: April 12, 2001Date of Patent: November 18, 2003Assignee: Forschungszentrum Karlsruke GmbHInventors: Grigory Kuperman, Klaus-Peter Jüngst
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Patent number: 6646840Abstract: An ESD protection device including a compound transistor structure having a trigger transistor and an ESD protection transistor. The trigger transistor includes a breakdown potential between the standoff voltage of a circuit to be protected and the breakdown potential of the ESD protection transistor. When activated, the trigger transistor operates to turn on the ESD protection transistor that is designed to carry the bulk of the conduction current associated with an ESD event. The trigger transistor is designed with an internal gain mechanism to ensure that it will not be turned off when a modified snapback voltage is reached during the ESD protection transistor operation. The trigger transistor is a minor contributor to the conducting current with the ESD protection transistor after such time as protection circuit operation acts. A process for fabricating a suitable compound transistor structure is disclosed.Type: GrantFiled: August 3, 2000Date of Patent: November 11, 2003Assignee: Fairchild Semiconductor CorporationInventors: Alvin Sugerman, Raymond Roberts, Michael Harley-Stead
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Patent number: 6643115Abstract: Disclosed is an electrostatic chuck comprising a ceramic dielectric layer having a surface for placing thereon a work that is to be held, and an electrode provided on a surface opposite to the surface of the ceramic dielectric layer for placing the work thereon, wherein: the placing surface of the ceramic dielectric layer is sectionalized into an outer peripheral region and a central region by gas injection grooves extending in a circumferential manner; the surface roughness Ra(o) of the outer peripheral region of the placing surface and the surface roughness Ra(i) ot the central region satisfy the following conditions: 0.6≦Ra(i)≦1.5 &mgr;m Ra(o)≦0.7 &mgr;m Ra(i)≧Ra(o) and the outer peripheral region of the placing surface is higher than the inner peripheral region by not less than 0.6 &mgr;m.Type: GrantFiled: February 27, 2002Date of Patent: November 4, 2003Assignee: Kyocera CorporationInventors: Katsushi Sakaue, Shoji Kosaka, Ichio Kiyofuji, Junji Ohe, Masaki Terazono, Yasushi Migita, Naohito Higashi, Hitoshi Atari