Patents by Inventor A Mei Yang

A Mei Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9813323
    Abstract: A packet forwarding network may include switches that forward network traffic between end hosts that are coupled to the forwarding network. An analysis network may be connected to the forwarding network. A controller may control the switches in the forwarding network to implement desired forwarding paths. The controller may configure the switches to form switch port groups. The controller may identify a port group that is connected to the analysis network. The controller may select a subset of the forwarded packets and may control selected switches to copy the subset to the identified port group. The controller may establish network tunnels between the switches and the port group. In this way, the controller may control the switches to perform efficient traffic monitoring regardless of the location on the forwarding network at which the traffic monitoring network is connected and without interfering with normal packet forwarding operations through the forwarding network.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: November 7, 2017
    Assignee: Big Switch Networks, Inc.
    Inventors: Vishnu Emmadi, Srinivasan Ramasubramanian, Shrinivasa Kini, Mei Yang, Sudeep Dilip Modi, Gregor Mathias Maier, Rajneesh Bajpai
  • Patent number: 9800221
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: October 24, 2017
    Assignees: STMicroelectronics (Shenzhen) R&D Co., Ltd., STMicroelectronics S.r.l.
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9613886
    Abstract: An optical coupling module includes a silicon photonic substrate, and an optical waveguide module. The silicon photonic substrate has a first surface and a first grating on the first surface for diffracting the light which passes through the grating. The optical waveguide module is disposed on the silicon photonic substrate, wherein the optical waveguide module includes an optical waveguide having an end disposed in corresponding to the first grating of the silicon photonic substrate. Otherwise, the optical waveguide module has a reflective surface coupled to the end of the optical waveguide and adapted to reflect the light emerging from or incident into the grating to form an optical path between the silicon photonic substrate and the optical waveguide for transmitting the light.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: April 4, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Jui-Ying Lin, Chia-Hsin Chao, Shu-Mei Yang, Chun-Hsing Lee, Chien-Chun Lu
  • Publication number: 20170070201
    Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20170063323
    Abstract: The present invention provides a circuit board, a housing including the aforementioned circuit board, and a filter including the aforementioned circuit board or housing. The circuit board includes an upper surface, a lower surface opposite to the upper surface, and at least one side surface connected between the upper and lower surfaces. The at least one side surface includes grooves formed therein and extending through the upper and lower surfaces. The circuit board further includes upper solder pads, lower solder pads, and conductive connections. The upper and lower solder pads are disposed flat against the upper and lower surfaces, respectively, and separately located beside the grooves. The conductive connections are separately disposed in the grooves and provide guide grooves within the grooves. Two ends of each of the conductive connections are separately connected to corresponding one of the upper solder pads and corresponding one of the lower solder pads.
    Type: Application
    Filed: December 14, 2015
    Publication date: March 2, 2017
    Inventor: Shu-Mei Yang
  • Patent number: 9532142
    Abstract: A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: December 27, 2016
    Assignees: STMicroelectronics (Shenzhen) R&D Co., Ltd., STMicroelectronics S.r.l.
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Patent number: 9461598
    Abstract: A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 4, 2016
    Assignees: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD, STMICROELECTRONICS S.R.L.
    Inventors: Kelvin Jian Wen, Mei Yang, Zheng Hua Song, Xian Xiong, Cristiano Meroni
  • Publication number: 20160265022
    Abstract: An apparatus and associated methods of use for a controlled combination of reagents is disclosed. The apparatus includes a vessel 400, a vessel insert 220, and a cap element 200. The vessel 400 has a body portion 410 for receiving a biological sample. The vessel insert 220 receives at least one reagent therein. Preferably, the vessel insert 220 is received in a portion 420 of the vessel 400. The cap element 200 is attached to the vessel 400 to secure the vessel insert 220 in the vessel 400. During use, the vessel insert 220 is adapted to release its contents when the biological sample is introduced into the body portion 410 of the vessel 400 upon application of an intermixing force to the vessel insert 220. A variety of intermixing forces may be applied, depending upon the embodiment of the present invention and its associated methods of use.
    Type: Application
    Filed: October 24, 2014
    Publication date: September 15, 2016
    Applicant: BECTON, DICKINSON AND COMPANY
    Inventors: Mei Yang-Woytowitz, Brent Pohl, Gary F. Hershner, Dwight Livingston, Eric Ursprung, Gerard Lotz, Kevin Bailey, Ammon David Lentz, Michael A. Brasch, Ming-hsiung Yeh, Patrick Shawn Beaty, Charles C. Yu, Timothy M. Wiles, Liping Feng, Ben Turng, Xiaofei Chang, Patrick R. Murray
  • Publication number: 20160269825
    Abstract: A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.
    Type: Application
    Filed: May 19, 2016
    Publication date: September 15, 2016
    Inventors: XiangSheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20160234091
    Abstract: A packet forwarding network may include switches that forward network traffic between end hosts that are coupled to the forwarding network. An analysis network may be connected to the forwarding network. A controller may control the switches in the forwarding network to implement desired forwarding paths. The controller may configure the switches to form switch port groups. The controller may identify a port group that is connected to the analysis network. The controller may select a subset of the forwarded packets and may control selected switches to copy the subset to the identified port group. The controller may establish network tunnels between the switches and the port group. In this way, the controller may control the switches to perform efficient traffic monitoring regardless of the location on the forwarding network at which the traffic monitoring network is connected and without interfering with normal packet forwarding operations through the forwarding network.
    Type: Application
    Filed: February 10, 2015
    Publication date: August 11, 2016
    Inventors: Vishnu Emmadi, Srinivasan Ramasubramanian, Shrinivasa Kini, Mei Yang, Sudeep Dilip Modi, Gregor Mathias Maier, Rajneesh Bajpai
  • Patent number: 9386372
    Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: July 5, 2016
    Assignees: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD., STMICROELECTRONICS S.R.L.
    Inventors: Xiangsheng Li, Cristiano Meroni, Mei Yang, Xian Feng Xiong
  • Publication number: 20160138076
    Abstract: Presented herein are methods and compositions for the detection of specific beta-lactamases, including class A serine carbapenemases, metallo-beta-lactamases, AmpC beta-lactamases, and extended-spectrum beta-lactamases (ESBLs). The methods presented herein include methods that permit the detection of the presence of specific beta-lactamases in bacterial samples within as few as 2 to 10 minutes.
    Type: Application
    Filed: June 22, 2015
    Publication date: May 19, 2016
    Applicant: Becton, Dickinson and Company
    Inventors: Mei Yang-Woytowitz, Charles Yu, Timothy Wiles
  • Patent number: 9331644
    Abstract: A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: May 3, 2016
    Assignee: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
    Inventors: Mei Yang, YueHua Wang, Xaut Zhang, Kelvin Wen, XiangSheng Li
  • Patent number: 9318333
    Abstract: In patterning a transistor, some of a layer of gate dielectric material is allowed to remain over a semiconductor substrate upon which the transistor is formed. This remaining dielectric material retards the implantation of dopants into the underlying substrate, effectively lengthening a channel region of the transistor. This mitigates unwanted short channel effects, such as leakage currents, for example, and thus mitigates yield loss by establishing a transistor that performs in a more predictable or otherwise desirable manner.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: April 19, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Vidyut Gopal, Shankar Sinha, Jean Yee-Mei Yang, Phillip L. Jones
  • Patent number: 9316608
    Abstract: A biosensor that is capable of detecting the presence and/or concentration of an analyte or biomarker includes at least one electrically conductive electrode operatively coupled to an impedance analyzer for measuring the change in the resistive impedance ?ZRe of the electrode in response to an applied alternating current at a plurality of frequencies. In one embodiment, at least one electrode is covered with a self-assembled monolayer that is chemically bonded to a surface. A plurality of virus particles such as phage viruses are immobilized on the self-assembled monolayer and may be exposed to a test or sample solution. The virus particles may be obtained from phage-displayed libraries to detect a wide variety of targets including, for example, DNA, RNA, small molecules, and proteins or polypeptides. In another embodiment, the virus particles are electrostatically bound to a substrate in between a pair of elongated electrodes disposed on a substrate.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: April 19, 2016
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Gregory A. Weiss, Reginald M. Penner, Phillip Y. Tam, Li-Mei Yang, Tyler Brigham
  • Publication number: 20160081211
    Abstract: The present invention relates to a shell and a wave filter of an electronic device. The shell comprises a base, two sidewalls, and a plurality of terminals. The base comprises an upper lateral and a lower lateral, the upper lateral and the lower lateral are opposite to each other. The sidewalls are disposed at the upper lateral and located separately at the opposite sides of the base, the sidewalls are opposite to each other, the side of the sidewall that faces away the base has a surface. The terminals are symmetrically arranged in order at the other opposite sides of the base, the terminals are embedded in the base, each terminal includes an upper section and an lower section, the upper section vertically extends upwards from the upper lateral, the lower section horizontally extends outwards from the lower lateral, at least a portion of the lower section is affixed flatly to the lower lateral.
    Type: Application
    Filed: June 3, 2015
    Publication date: March 17, 2016
    Inventor: Shu-Mei Yang
  • Publication number: 20160021032
    Abstract: A controller implemented on computing equipment may be used to control switches in a network. End hosts may be coupled to the switches. The controller may generate a virtual network topology of virtual switches, virtual routers, and virtual system routers that are distributed over underlying switches in the network. The controller may form virtual switches from respective groups of end hosts, virtual routers from groups of virtual switches that include virtual interfaces that are coupled to virtual switches, and a virtual system router from groups of virtual routers that includes virtual system router interfaces that are coupled to the virtual routers. The controller may control the virtual network topology by generating respective flow table entries based on identified network policies for each of the virtual routers, virtual system routers, and virtual switches. The controller may control the virtual system routers to route packets between the virtual routers.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 21, 2016
    Inventors: Gregor Mathias Maier, Vishnu Emmadi, Sudeep Dilip Modi, Kanzhe Jiang, Kuang-Ching Wang, Srinivasan Ramasubramanian, Mei Yang, Robert W. Sherwood, Mandeep Singh Dhami
  • Publication number: 20160020939
    Abstract: A network of switches having ports coupled to other switches or end hosts may be controlled by a controller. The controller may identify whether any switch ports have failed. In response to identifying that a port has failed at a first switch, the controller may modify link aggregation group mappings of the other switches to handle failover. The controller may modify the link aggregation group mapping of each other switch to include a first mapping that includes ports coupled to the first switch and a second mapping that does not include any ports coupled to the first switch. The controller may configure forwarding tables at the switches to forward network packets using the first or second mappings based on network topology information maintained by the controller.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 21, 2016
    Inventors: Srinivasan Ramasubramanian, Vishnu Emmadi, Sudeep Dilip Modi, Kanzhe Jiang, Kuang-Ching Wang, Gregor Mathias Maier, Mei Yang, Robert W. Sherwood, Mandeep Singh Dhami
  • Publication number: 20160020993
    Abstract: A controller implemented on computing equipment may control switches in a network. The controller may provide flow tables that implement network policies to the switches to control packet forwarding through the network. The controller may provide debug table entries to the switches for use in a debug table that is separate from the flow table. The debug table entries may match incoming network packets and increment corresponding counters on the switches. The controller may retrieve count information from the counters for performing debugging operations on the network. For example, the controller may identify conflicts between fields of a selected flow table entry, determine whether elephant packet flows are present between switches, determine whether desired load balancing is being performed, determine whether a network path has changed, determine whether packet loss has occurred, and/or determine whether network packets are taking undesired paths based on the retrieved count information.
    Type: Application
    Filed: February 19, 2015
    Publication date: January 21, 2016
    Inventors: Xin Wu, Rajneesh Bajpai, Robert W. Sherwood, Srinivasan Ramasubramanian, Gregor Mathias Maier, Richard Leegan Lane, II, Kenneth Hsinchao Chiang, Mei Yang
  • Publication number: 20150381125
    Abstract: A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the bias voltage of the output of the amplifier pair varies proportionally to a change of the power supply.
    Type: Application
    Filed: February 4, 2015
    Publication date: December 31, 2015
    Applicants: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD, STMICROELECTRONICS S.R.L.
    Inventors: Kelvin Jian Wen, Mei Yang, Zheng Hua Song, Xian Xiong, Cristiano Meroni