Patents by Inventor A-Ming Chang

A-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020082
    Abstract: An electronic device including a working screen, a sharing screen and a processor is provided. The processor is electrically connected to the working screen and the sharing screen and is configured to: create a virtual desktop of the working screen; assign the virtual desktop to the sharing screen; executes an application; and share the virtual desktop containing a window frame of the application to a remote computer device or share the window frame itself to the remote computer device.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 18, 2024
    Applicant: Acer Incorporated
    Inventors: Kuan-Ju CHEN, Hung-Ming CHANG, Chao-Kuang YANG
  • Patent number: 11874657
    Abstract: An unmanned aerial vehicle (UAV) control system and a UAV control method are provided. The UAV control method includes: storing a reporting configuration by a UAV; communicatively connecting to the UAV and storing at least one historical status information corresponding to the UAV by a server; reporting to the server at least one current status information according to the reporting configuration by the UAV; calculating a variance between the at least one historical status information and the at least one current status information by the server; and updating the reporting configuration of the UAV according to the variance by the server.
    Type: Grant
    Filed: May 23, 2021
    Date of Patent: January 16, 2024
    Assignee: Far EasTone Telecommunications Co., Ltd.
    Inventors: Herman Chunghwa Rao, Chen-Tsan Yu, Hua-Pei Chiang, Chien-Peng Ho, Chyi-Dar Jang, Yao-Ming Chang, Che-Yu Liao
  • Publication number: 20240014311
    Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer and a recess. The group III-V body layer is disposed on the substrate. The group III-V barrier layer is disposed on the group III-V body layer in the active region and the isolation region. The recess is disposed in the group III-V barrier layer without penetrating the group III-V barrier layer in the active region.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Wen-Jung Liao
  • Publication number: 20240014309
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer, wherein the composition of the first III-V compound layer and the second III-V compound layer are different from each other. A source electrode and a drain electrode are disposed on the second III-V compound layer. A gate electrode is disposed on the second III-V compound layer between the source electrode and the drain electrode. An insulating layer is disposed between the drain electrode and the gate electrode and covering the second III-V compound layer. Numerous electrodes are disposed on the insulating layer and contact the insulating layer, wherein the electrodes are positioned between the gate electrode and the drain electrode and a distribution of the electrodes decreases along a direction toward the gate electrode.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Chih-Tung Yeh
  • Publication number: 20240012633
    Abstract: Examples of updating a device firmware of an electronic device, based on a firmware update are described. The device firmware may include a device firmware volume comprising a plurality of device firmware files and a device firmware descriptor corresponding to content of the device firmware volume. The firmware update may also include a firmware update volume comprising a plurality of updated firmware files, and a firmware update descriptor comprising a hash value of content of the firmware update volume. Further, the device firmware volume may be updated based on a comparison between the hash value of the firmware update volume with the corresponding hash value of the device firmware volume.
    Type: Application
    Filed: July 8, 2020
    Publication date: January 11, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: KANG-NING FENG, MING CHANG HUNG, Reily CHANG
  • Publication number: 20240014310
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240002515
    Abstract: Provided are an anti-CD11b antibody or an antigen-binding portion thereof, and methods and use of the antibody for modulating immunoresponses by regulating CD11b expression on cells.
    Type: Application
    Filed: May 18, 2023
    Publication date: January 4, 2024
    Applicant: Ascendo Biotechnology, Inc.
    Inventors: Yen-Ta Lu, Chia-Ming Chang, Tsai-Yin Wei, I-Fang Tsai, Ling-Chiao Wu
  • Patent number: 11857022
    Abstract: An upper for an article of footwear is configured to be connected to a sole structure and is configured to receive a foot. The upper includes a knitted component having a strobel portion that is configured to be disposed underneath the foot. The strobel portion defines an interior surface and an exterior surface of the knitted component. The strobel portion defines a strobel passage between the interior surface and the exterior surface. Also, the upper includes a tensile strand that extends through the strobel passage.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 2, 2024
    Assignee: NIKE, Inc.
    Inventors: Daniel A. Podhajny, Chung-Ming Chang, Ya-Fang Chen, Pei-Ju Su
  • Patent number: 11860507
    Abstract: A cascaded focusing and compressing postcompression system includes at least one CASCADE (cascaded focusing and compressing) module. The CASCADE module includes a focusing unit and a compressing unit. The focusing unit is for nonlinear broadening a bandwidth of the light pulses. The compressing unit is for shortening a pulse duration of the light pulses.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: January 2, 2024
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Ming-Chang Chen, Ming-Shian Tsai, An-Yuan Liang, Chia-Lun Tsai
  • Patent number: 11862275
    Abstract: Systems and methods are provided for testing a Device Under Test (DUT) in its working environment. A control computer is coupled to an air compressor and generates a temperature control signal that is provided to the air compressor to generate an amount of hot air or cold air to set the temperature of the DUT's working environment to a desired test temperature. The control computer also generates at least one test signal that is sent to a hardware test element for testing at least one memory component of the DUT at the desired test temperature and obtaining test results. The control computer analyzes the test results to determine a parameter adjustment for the at least one memory element so that it operates in a stable manner at the test temperature.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: January 2, 2024
    Assignee: KINGTIGER TECHNOLOGY (CANADA) INC.
    Inventors: Bosco Chun Sang Lai, Sunny Lai-Ming Chang, Lawrence Wai Cheung Ho, Eric Sin Kwok Chiu, Simon Shu Man Choi, Arthur Yu Kuen Lam
  • Patent number: 11861337
    Abstract: A method of compiling neural network code to executable instructions for execution by a computational acceleration system having a memory circuit and one or more acceleration circuits having a maps data buffer and a kernel data buffer is disclosed, such as for execution by an inference engine circuit architecture which includes a matrix-matrix (MM) accelerator circuit having multiple operating modes to provide a complete matrix multiplication. A representative compiling method includes generating a list of neural network layer model objects; fusing available functions and layers in the list; selecting a cooperative mode, an independent mode, or a combined cooperative and independent mode for execution; selecting a data movement mode and an ordering of computations which reduces usage of the memory circuit; generating an ordered sequence of load objects, compute objects, and store objects; and converting the ordered sequence of load objects, compute objects, and store objects into the executable instructions.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Andre Xian Ming Chang, Aliasger Zaidy, Eugenio Culurciello, Marko Vitez
  • Publication number: 20230420387
    Abstract: A chip package includes a semiconductor substrate, a first light-transmissive sheet, a second light-transmissive sheet, a first antenna layer, and a redistribution layer. The first light-transmissive sheet is disposed over the semiconductor substrate, and has a top surface facing away from semiconductor substrate and an inclined sidewall adjacent to the top surface. The second light-transmissive sheet is disposed over the first light-transmissive sheet. The first antenna layer is disposed between the first light-transmissive sheet and the second light-transmissive sheet. The redistribution layer is disposed on the inclined sidewall of the first light-transmissive sheet, and is in contact with an end of the first antenna layer.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Inventors: Chia-Ming CHENG, Shu-Ming CHANG
  • Patent number: 11854807
    Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Min Hsiao, Chien-Wen Lai, Ru-Gun Liu, Chih-Ming Lai, Shih-Ming Chang, Yung-Sung Yen, Yu-Chen Chang
  • Patent number: 11854820
    Abstract: A method includes forming a first layer on a substrate; forming a first plurality of trenches in the first layer by a patterning process; and forming a second plurality of trenches in the first layer by another patterning process, resulting in combined trench patterns in the first layer. A first trench of the second plurality connects two trenches of the first plurality. The method further includes forming dielectric spacer features on sidewalls of the combined trench patterns. A space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features and another space between two opposing sidewalls of one of the two trenches is partially filled by the dielectric spacer features.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ru-Gun Liu, Cheng-Hsiung Tsai, Chung-Ju Lee, Chih-Ming Lai, Chia-Ying Lee, Jyu-Horng Shieh, Ken-Hsien Hsieh, Ming-Feng Shieh, Shau-Lin Shue, Shih-Ming Chang, Tien-I Bao, Tsai-Sheng Gau
  • Patent number: 11851387
    Abstract: A fabricating method for a 1,4-diamine cyclic compound derivative includes: performing a first thermal process to form a first compound, in which the first compound has a structure represented by formula (i): in which R represents a C1 to C12 hydrocarbon group; performing a second thermal process, which includes performing a reduction reaction on the first compound to form a second compound, in which the second compound has a structure represented by formula (ii), and performing a third thermal process, which includes performing a reduction reaction on the second compound to form the 1,4-diamine cyclic compound derivative, in which the 1,4-diamine cyclic compound derivative has a structure represented by formula (I) or formula (II): in which R represents a C1 to C12 hydrocarbon group, in which R represents a C1 to C12 hydrocarbon group.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: December 26, 2023
    Assignee: Yuanhan Materials Inc.
    Inventors: En Ming Chang, Hung-Chun Yu, Feng-Chao Yu
  • Publication number: 20230408930
    Abstract: In a method of tool matching, aberration maps of two or more optical systems of two or more scanner tools are determined. A photoresist pattern is generated by projecting a first layout pattern by an optical system of each one of the two or more scanner tools on a respective substrate. One or more Zernike coefficients of the two or more optical systems are adjusted based on the determined aberration maps of the two or more optical systems to minimize critical dimension (CD) variations in a first region of the photoresist patterns on each respective substrate.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 21, 2023
    Inventors: Shih-Chuan HUANG, Sheng-Min WANG, Shih-Ming CHANG, Ken-Hsien HSIEH
  • Patent number: 11846729
    Abstract: A virtual reality positioning device including a casing, a plurality of lenses, and a plurality of optical positioning components is provided. The casing has a plurality of holes. The lenses are installed in the holes, respectively, where a field angle of each of the lenses is greater than or equal to 120 degrees and less than or equal to 160 degrees, and the lenses include convex lenses or Fresnel lenses. The optical positioning components are installed in the casing and aligned to the lenses, respectively. In addition, a virtual reality positioning system and manufacturing method of a virtual reality positioning device are provided.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: December 19, 2023
    Assignee: Acer Incorporated
    Inventors: Li Lin, Ker-Wei Lin, Chun-Ta Chen, Chun-Yu Chen, Hao-Ming Chang, Chun-Hsien Chen, Shih-Ting Huang, Hui-Yen Wang
  • Patent number: 11848208
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first spacer over a substrate. The method includes partially removing the first spacer to form a gap dividing the first spacer into a first part and a second part. The method includes forming a filling layer covering a first top surface and a first sidewall of the first spacer. The filling layer and the first spacer together form a strip structure. The method includes forming a second spacer over a second sidewall of the strip structure. The method includes forming a third spacer over a third sidewall of the second spacer. The third spacer is narrower than the second spacer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chih-Ming Lai, Shih-Ming Chang, Wei-Liang Lin, Chin-Yuan Tseng, Ru-Gun Liu
  • Patent number: 11845426
    Abstract: A movable carrier auxiliary system includes an environmental detecting device, a control device, a state detecting device, and a parking auxiliary device. The environmental detecting device includes an image capturing module and an operation module. A parking auxiliary method thereof includes capture an environmental image around a movable carrier with the image capturing module; analyze whether the environmental image has a parking space with the operation module; detect a movement state of the movable carrier with the state detecting device; generate a prompting message with the parking auxiliary device based on an analysis result of the operation module and the movement state of the movable carrier, thereby the driver could manipulate the control device based on the prompting message to move the movable carrier to the parking space, improving a convenience and a safety when parking the movable carrier.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: December 19, 2023
    Assignee: ABILITY OPTO-ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yeong-Ming Chang, Chien-Hsun Lai, Yao-Wei Liu
  • Patent number: D1012330
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 23, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Li-Ming Chang, Chien-Fu Shen, Hsin-Ying Wang