Patents by Inventor Aaftab A. Munshi
Aaftab A. Munshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7479960Abstract: A computer graphics method and apparatus allows designer control over the rendering of objects and scenes, in a rendering system using ray tracing for example. A modeling system is adapted to accept rules for controlling how certain objects affect the appearance of certain other objects. In a ray tracing implementation, rules are specified by ray type and can be specified as either “including” all but certain objects or “excluding” specific objects for any given object. A rendering system extracts these rules from a bytestream or other input including other graphics data and instructions, and populates lists for internal use by other components of the rendering system. A ray tracer in the rendering system is adapted to consult the list when performing ray tracing, so as to enforce the rendering control specified by the content creator when the objects and scene are rendered.Type: GrantFiled: October 4, 2005Date of Patent: January 20, 2009Assignee: Pasternak Solutions, LLCInventor: Aaftab A. Munshi
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Publication number: 20080276064Abstract: A method and an apparatus that allocate a stream memory and/or a local memory for a variable in an executable loaded from a host processor to the compute processor according to whether a compute processor supports a storage capability are described. The compute processor may be a graphics processing unit (GPU) or a central processing unit (CPU). Alternatively, an application running in a host processor configures storage capabilities in a compute processor, such as CPU or GPU, to determine a memory location for accessing a variable in an executable executed by a plurality of threads in the compute processor. The configuration and allocation are based on API calls in the host processor.Type: ApplicationFiled: May 3, 2007Publication date: November 6, 2008Inventors: Aaftab Munshi, Jeremy Sandmel
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Publication number: 20080276262Abstract: A method and an apparatus that schedule a plurality of executables in a schedule queue for execution in one or more physical compute devices such as CPUs or GPUs concurrently are described. One or more executables are compiled online from a source having an existing executable for a type of physical compute devices different from the one or more physical compute devices. Dependency relations among elements corresponding to scheduled executables are determined to select an executable to be executed by a plurality of threads concurrently in more than one of the physical compute devices. A thread initialized for executing an executable in a GPU of the physical compute devices are initialized for execution in another CPU of the physical compute devices if the GPU is busy with graphics processing threads.Type: ApplicationFiled: May 3, 2007Publication date: November 6, 2008Inventors: Aaftab Munshi, Jeremy Sandmel
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Publication number: 20080276220Abstract: A method and an apparatus that execute a parallel computing program in a programming language for a parallel computing architecture are described. The parallel computing program is stored in memory in a system with parallel processors. The system includes a host processor, a graphics processing unit (GPU) coupled to the host processor and a memory coupled to at least one of the host processor and the GPU. The parallel computing program is stored in the memory to allocate threads between the host processor and the GPU. The programming language includes an API to allow an application to make calls using the API to allocate execution of the threads between the host processor and the GPU. The programming language includes host function data tokens for host functions performed in the host processor and kernel function data tokens for compute kernel functions performed in one or more compute processors, e.g. GPUs or CPUs, separate from the host processor.Type: ApplicationFiled: May 3, 2007Publication date: November 6, 2008Inventors: Aaftab Munshi, Jeremy Sandmel
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Publication number: 20080276261Abstract: A method and an apparatus that allocate one or more physical compute devices such as CPUs or GPUs attached to a host processing unit running an application for executing one or more threads of the application are described. The allocation may be based on data representing a processing capability requirement from the application for executing an executable in the one or more threads. A compute device identifier may be associated with the allocated physical compute devices to schedule and execute the executable in the one or more threads concurrently in one or more of the allocated physical compute devices concurrently.Type: ApplicationFiled: May 3, 2007Publication date: November 6, 2008Inventors: Aaftab Munshi, Jeremy Sandmel
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Patent number: 7397479Abstract: The present invention is directed toward a texture combine circuit for generating fragment graphics data for a pixel in a graphics processing system. The texture combine circuit includes at least one texture combine unit and is coupled to receive graphics data, such as a plurality of texture graphics data, and perform user selected graphics combine operations on a set of input data selected from the plurality of texture graphics data to produce the fragment graphics data for the pixel. The texture combine circuit may include several texture combine units in a cascade connection, where each texture combine unit is coupled to receive the plurality of texture graphics data and the resultant output value of the previous texture combine units in the cascade.Type: GrantFiled: August 25, 2004Date of Patent: July 8, 2008Assignee: Micron Technology, Inc.Inventor: Aaftab Munshi
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Publication number: 20070279421Abstract: A system for rendering three-dimensional graphics for display on a display using bins, the system including a graphics rendering engine configured to receive information representative of three-dimensional (3-D) objects in an object space and to render an image for display on the display, the graphics rendering engine including a processor, a pixel shader configured to perform rendering operations, and a programmable vertex shader configured to perform rendering operations, wherein the graphics rendering engine is configured to perform rendering operations and to compute locations of vertices of polygons corresponding to the 3-D objects.Type: ApplicationFiled: May 30, 2006Publication date: December 6, 2007Inventors: Andrew Gruber, Aaftab Munshi
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Patent number: 7266616Abstract: Digital rendering over a network is described. Rendering resources associated with a project are stored in a project resource pool at a rendering service site, and for each rendering request received from a client site the project resource pool is compared to current rendering resources at the client site. A given rendering resource is uploaded from the client site to the rendering service only if the project resource pool does not contain the current version, thereby conserving bandwidth. In one embodiment, redundant generation of raw rendering resource files is avoided by only generating those raw rendering resource files not mated with generated rendering resource files. Reducing redundant generation of raw resources is also described, as well as statistically reducing the number of raw resource files required to be uploaded to the rendering service for multi-frame sessions.Type: GrantFiled: August 8, 2001Date of Patent: September 4, 2007Assignee: Pasternak Solutions LLCInventors: Aaftab A. Munshi, Avi I. Bleiweiss
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Publication number: 20060290696Abstract: The present invention relates to computer graphics applications involving scene rendering using objects modeled at multiple levels of detail. In accordance with an aspect of the invention, a ray tracer implementation allows users to specify multiple versions of a particular object, categorized by LOD ID's. A scene server selects the version appropriate for the particular scene, based on the size of the object on the screen for example, and provides a smooth transition between multiple versions of an object model. In one example, the scene server will select two LOD representations associated with a given object and assign relative weights to each representation. The LOD weights are specified to indicate how to blend these representations together.Type: ApplicationFiled: August 14, 2006Publication date: December 28, 2006Applicant: Pasternak Solutions LLCInventors: Aaftab Munshi, Mark Wood-Patrick
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Publication number: 20060269127Abstract: A block-based image compression method and encoder/decoder circuit compress a plurality of pixels in a block where each pixel includes a corresponding color value and a corresponding luminance value. The encoder circuit includes a luminance-level-based representative color generator to generate representative color values for each of a plurality of luminance levels to produce at least a high color value and a low color value. In response to generating the representative color values, the luminance-level-based representative color generator associates each of the pixels in the block with one of the plurality of representative color values to produce corresponding bitmap values. The encoder circuit further includes a color type block generator to perform at least one of: (a) generate block color data indicating a regular/alternate color block type and (b) representing a block color type by ordering the representative color values that are to be sent to a decoder.Type: ApplicationFiled: May 27, 2005Publication date: November 30, 2006Applicant: ATI-Technologies, Inc.Inventors: Charles Ogden, Aaftab Munshi
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Patent number: 7126605Abstract: The present invention relates to computer graphics applications involving scene rendering using objects modeled at multiple levels of detail. In accordance with an aspect of the invention, a ray tracer implementation allows users to specify multiple versions of a particular object, categorized by LOD ID's. A scene server selects the version appropriate for the particular scene, based on the size of the object on the screen for example, and provides a smooth transition between multiple versions of an object model. In one example, the scene server will select two LOD representations associated with a given object and assign relative weights to each representation. The LOD weights are specified to indicate how to blend these representations together.Type: GrantFiled: October 7, 2003Date of Patent: October 24, 2006Inventors: Aaftab A. Munshi, Mark Wood-Patrick
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Publication number: 20060215914Abstract: A block-based image compression method and encoder/decoder circuit compresses a plurality of pixels having corresponding original color values and luminance values in a block according to different modes of operation. The encoding circuit includes a luminance-level-based representative color generator to generate representative color values for each of a plurality of luminance levels derived from the corresponding luminance levels to produce at least a block color offset value and a quantization value. According to mode zero, each of the pixels in the block is associated with one of the plurality of generated representative color values to generate error map values and a mode zero color error value. According to mode one, representative color values for each of at least three luminance levels are also generated to produce at least three representative color values, corresponding bitmap values and a mode one color error value.Type: ApplicationFiled: March 25, 2005Publication date: September 28, 2006Applicant: ATI Technologies, Inc.Inventors: Milivoje Aleksic, Aaftab Munshi, Charles Ogden
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Publication number: 20060139351Abstract: A computer graphics method and apparatus allows designer control over the rendering of objects and scenes, in a rendering system using ray tracing for example. A modeling system is adapted to accept rules for controlling how certain objects affect the appearance of certain other objects. In a ray tracing implementation, rules are specified by ray type and can be specified as either “including” all but certain objects or “excluding” specific objects for any given object. A rendering system extracts these rules from a bytestream or other input including other graphics data and instructions, and populates lists for internal use by other components of the rendering system. A ray tracer in the rendering system is adapted to consult the list when performing ray tracing, so as to enforce the rendering control specified by the content creator when the objects and scene are rendered.Type: ApplicationFiled: October 4, 2005Publication date: June 29, 2006Applicant: Believe, Inc.Inventor: Aaftab Munshi
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Patent number: 6956570Abstract: A computer graphics method and apparatus allows designer control over the rendering of objects and scenes, in a rendering system using ray tracing for example. A modeling system is adapted to accept rules for controlling how certain objects affect the appearance of certain other objects. In a ray tracing implementation, rules are specified by ray type and can be specified as either “including” all but certain objects or “excluding” specific objects for any given object. A rendering system extracts these rules from a bytestream or other input including other graphics data and instructions, and populates lists for internal use by other components of the rendering system. A ray tracer in the rendering system is adapted to consult the list when performing ray tracing, so as to enforce the rendering control specified by the content creator when the objects and scene are rendered.Type: GrantFiled: June 27, 2001Date of Patent: October 18, 2005Assignee: Believe, Inc.Inventor: Aaftab A. Munshi
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Patent number: 6937246Abstract: A cache for a graphics system storing both an address tag and an identification number for each block of data stored in the data cache. An address and identification number of a requested block of data is provided to the cache, and is checked against all of the address and identification number entries present. A block of data is provided if both the address and the identification number of the requested data matches an entry in the cache. However, if the address of the requested data is not present, or if the address matches an entry but the associated identification number does not match, a cache miss occurs, and the requested graphics data must be retrieved from a system memory. The address and identification number are updated, and the requested data replaces the former graphics data in the data cache. As a result, a block of data stored in the cache having the same address as the requested data, but having data that is invalid, can be invalidated without invalidating the entire cache.Type: GrantFiled: February 9, 2004Date of Patent: August 30, 2005Assignee: Micron Technology, Inc.Inventors: Aaftab Munshi, James R. Peterson
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Patent number: 6919908Abstract: The present invention includes a method and apparatus for graphics processing in a handheld device including a transform engine capable of receiving vertex information. The transform engine generates a plurality of vertices from the vertex information, wherein each of the vertices includes a corresponding bin identifier. The method and apparatus further includes view frame factors defining a clipping region such that when any of the plurality of vertices is within the clipping region, a clip identifier is generated for that vertex using the corresponding bin identifier. A vertex shader coupled to a clipping module, wherein the clipping module generates supplemental vertices and the vertex shader receives the supplemental vertices therefrom. The vertex shader combines the supplemental vertices with the bin identifiers and are provided to a vertex buffer.Type: GrantFiled: August 6, 2003Date of Patent: July 19, 2005Assignee: ATI Technologies, Inc.Inventors: Aaftab A. Munshi, Mark H. Sternberg
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Publication number: 20050030320Abstract: The present invention includes a method and apparatus for graphics processing in a handheld device including a transform engine capable of receiving vertex information. The transform engine generates a plurality of vertices from the vertex information, wherein each of the vertices includes a corresponding bin identifier. The method and apparatus further includes view frame factors defining a clipping region such that when any of the plurality of vertices is within the clipping region, a clip identifier is generated for that vertex using the corresponding bin identifier. A vertex shader coupled to a clipping module, wherein the clipping module generates supplemental vertices and the vertex shader receives the supplemental vertices therefrom. The vertex shader combines the supplemental vertices with the bin identifiers and are provided to a vertex buffer.Type: ApplicationFiled: August 6, 2003Publication date: February 10, 2005Applicant: ATI Technologies, Inc.Inventors: Aaftab Munshi, Mark Stemberg
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Publication number: 20050024377Abstract: The present invention is directed toward a texture combine circuit for generating fragment graphics data for a pixel in a graphics processing system. The texture combine circuit includes at least one texture combine unit and is coupled to receive graphics data, such as a plurality of texture graphics data, and perform user selected graphics combine operations on a set of input data selected from the plurality of texture graphics data to produce the fragment graphics data for the pixel. The texture combine circuit may include several texture combine units in a cascade connection, where each texture combine unit is coupled to receive the plurality of texture graphics data and the resultant output value of the previous texture combine units in the cascade.Type: ApplicationFiled: August 25, 2004Publication date: February 3, 2005Inventor: Aaftab Munshi
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Publication number: 20050024370Abstract: A graphics processing system including a cache memory circuit coupled to the graphics processor and the address and data busses for storing graphics data according to a respective address. The cache memory includes first and second memories coupled together by a plurality of activation lines. The first memory has a corresponding plurality of address detection units to store addresses and provide activation signals in response to receiving a matching address. The second memory includes a corresponding plurality of data storage locations. Each data storage location is coupled to a respective one of the plurality of address storage locations by a respective activation line to provide graphics data in response to receiving an activation signal from the respective address storage location.Type: ApplicationFiled: August 31, 2004Publication date: February 3, 2005Inventor: Aaftab Munshi
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Patent number: 6850244Abstract: A method and system for providing surface texture in a graphics image rendered by a graphics processing system. Color values of a pixel having a normal vector normal to a surface in which the pixel is located are calculated based on a perturbed normal vector. The perturbed normal vector is displaced from the normal vector by a displacement equal to the sum of a first vector tangent to the surface at the location of the pixel scaled by a first scale factor and a first displacement value, and a second vector tangent to the surface at the location of the pixel and scaled by a second scale factor and a second displacement value, the second vector perpendicular to the first vector. The displacement values are representative of partial derivatives of a function defining a texture applied to the surface and the scale factors are used to scale the magnitude of the resulting perturbed normal. The color value for the pixel being rendered will be based on the perturbed normal vector instead of the normal vector.Type: GrantFiled: January 11, 2001Date of Patent: February 1, 2005Assignee: Micron Techology, Inc.Inventors: Aaftab Munshi, Colin Sharp