Patents by Inventor Abbas Jamshidi Roudbari

Abbas Jamshidi Roudbari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200220098
    Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.
    Type: Application
    Filed: October 31, 2019
    Publication date: July 9, 2020
    Inventors: Tsung-Ting Tsai, Abbas Jamshidi Roudbari, Chuan-Sheng Wei, HanChi Ting, Jae Won Choi, Jianhong Lin, Nai-Chih Kao, Shih Chang Chang, Shin-Hung Yeh, Takahide Ishii, Ting-Kuo Chang, Yu Hung Chen, Yu-Wen Liu, Yu-Chuan Pai, Andrew Lin
  • Patent number: 10636356
    Abstract: Electronic devices may include displays having organic light-emitting diode pixels, display driver circuitry, and gate driver circuitry. To reduce the amount of space occupied in the inactive area of a display by the gate driver circuitry, one or more of the shift registers in the gate driver circuitry may include register circuits that are shared by multiple rows of pixels. Different drivers may use different clock frequencies to ensure synchronous operation of the display even when some register circuits share pixel rows. For increased flexibility in the arrangement of the register circuits in the shift registers, one or more of the shift registers may be split across the active area of the display. In some cases, one of the emission drivers may be omitted from the gate driver circuitry and a single emission driver may provide multiple emission control signals for the pixels.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: April 28, 2020
    Assignee: Apple Inc.
    Inventors: Chuang Qian, Tsung-Ting Tsai, Shyuan Yang, Cheng-Chih Hsieh, Abbas Jamshidi Roudbari, Ting-Kuo Chang, Shih-Chang Chang
  • Publication number: 20200118497
    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
    Type: Application
    Filed: December 12, 2019
    Publication date: April 16, 2020
    Inventors: Keitaro Yamashita, Abbas Jamshidi Roudbari, Shin-Hung Yeh, Tsung-Ting Tsai, Shih-Chang Chang, Ting-Kuo Chang, Ki Yeol Byun, Warren S. Rieutort-Louis
  • Publication number: 20200098314
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Chin-Wei Lin, Shyuan Yang, Chuang Qian, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Publication number: 20200064702
    Abstract: To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.
    Type: Application
    Filed: July 8, 2019
    Publication date: February 27, 2020
    Inventors: Shin-Hung Yeh, Warren S. Rieutort-Louis, Abbas Jamshidi Roudbari, Chien-Ya Lee, Lun Tsai
  • Patent number: 10573265
    Abstract: Electronic devices, storage medium containing instructions, and methods pertain to cancelling noise that results from application of clocks/clock drivers of a display. The electronic display may inject counter noise into the cathode. For example, the counter noise may be injected via a sensing layer, via unused clocks, and/or via a power rail of the display.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: February 25, 2020
    Assignee: Apple Inc.
    Inventors: Mohammad Ali Jangda, Marc Joseph DeVincentis, Abbas Jamshidi-Roudbari, Warren S. Rieutort-Louis
  • Patent number: 10546540
    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: January 28, 2020
    Assignee: Apple Inc.
    Inventors: Keitaro Yamashita, Abbas Jamshidi Roudbari, Shin-Hung Yeh, Tsung-Ting Tsai, Shih-Chang Chang, Ting-Kuo Chang, Ki Yeol Byun, Warren S. Rieutort-Louis
  • Publication number: 20200013360
    Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.
    Type: Application
    Filed: July 22, 2019
    Publication date: January 9, 2020
    Inventors: Shin-Hung Yeh, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Publication number: 20200013342
    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
    Type: Application
    Filed: September 20, 2019
    Publication date: January 9, 2020
    Inventors: Keitaro Yamashita, Abbas Jamshidi Roudbari, Shin-Hung Yeh, Tsung-Ting Tsai, Shih-Chang Chang, Ting-Kuo Chang, Ki Yeol Byun, Warren S. Rieutort-Louis
  • Publication number: 20190393295
    Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.
    Type: Application
    Filed: April 4, 2019
    Publication date: December 26, 2019
    Inventors: Tiffany T. Moy, Yuchi Che, Seonpil Jang, Warren S. Rieutort-Louis, Bhadrinarayana Lalgudi Visweswaran, Jae Won Choi, Abbas Jamshidi Roudbari, Myung-Kwan Ryu, Hirokazu Yamagata, Keisuke Otsu
  • Publication number: 20190371237
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may include a drive transistor coupled in series with one or more emission transistors and a respective organic light-emitting diode (OLED). A semiconducting-oxide transistor may be coupled between a drain terminal and a gate terminal of the drive transistor to help reduce leakage during low-refresh-rate display operations. A silicon transistor may be further interposed between the semiconducting-oxide transistor and the gate terminal of the drive transistor. One or more capacitor structures may be coupled to the source terminal and/or the drain terminal of the semiconducting-oxide transistor to reduce rebalancing current that might flow through the semiconducting-oxide transistor as it is turned off. Configured in this way, any emission current flowing through the OLED will be insensitive to any potential drift in the threshold voltage of the semiconducting-oxide transistor.
    Type: Application
    Filed: January 23, 2019
    Publication date: December 5, 2019
    Inventors: Chuang Qian, Tsung-Ting Tsai, Cheng-Chih Hsieh, Shyuan Yang, Ting-Kuo Chang, Abbas Jamshidi Roudbari, Shih Chang Chang
  • Patent number: 10490128
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may include a drive transistor coupled in series with one or more emission transistors and a respective organic light-emitting diode (OLED). A semiconducting-oxide transistor may be coupled between a drain terminal and a gate terminal of the drive transistor to help reduce leakage during low-refresh-rate display operations. A silicon transistor may be further interposed between the semiconducting-oxide transistor and the gate terminal of the drive transistor. One or more capacitor structures may be coupled to the source terminal and/or the drain terminal of the semiconducting-oxide transistor to reduce rebalancing current that might flow through the semiconducting-oxide transistor as it is turned off. Configured in this way, any emission current flowing through the OLED will be insensitive to any potential drift in the threshold voltage of the semiconducting-oxide transistor.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 26, 2019
    Assignee: Apple Inc.
    Inventors: Chuang Qian, Tsung-Ting Tsai, Cheng-Chih Hsieh, Shyuan Yang, Ting-Kuo Chang, Abbas Jamshidi Roudbari, Shih Chang Chang
  • Patent number: 10482822
    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: November 19, 2019
    Assignee: Apple Inc.
    Inventors: Keitaro Yamashita, Abbas Jamshidi Roudbari, Shin-Hung Yeh, Tsung-Ting Tsai, Shih-Chang Chang, Ting-Kuo Chang, Ki Yeol Byun, Warren S. Rieutort-Louis
  • Patent number: 10438540
    Abstract: Aspects of the subject technology relate to display circuitry. The display circuitry includes gate-in-panel (GIP) control circuitry on opposing sides of a display pixel array. The GIP control circuitry can include scan drivers for each pixel row on both sides of that pixel row, the scan drivers on either side configured for enablement or disablement for single-sided reduced-power operations. The GIP control circuitry can include a single scan driver and a single emission controller for each pixel row, in which the scan driver and emission controller for each row are disposed on opposing sides of the row. The scan drivers for a first subset of the pixel rows can be interleaved with the emission controllers for a different subset of the pixel rows.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: October 8, 2019
    Assignee: Apple Inc.
    Inventors: Shyuan Yang, Abbas Jamshidi Roudbari, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis
  • Patent number: 10402000
    Abstract: A touch sensitive device that can detect the amount of pressure being applied to a touch screen from a user or other external object is provided. A spacer of the touch screen can be coated with a layer of conductive material and the change in capacitance between the spacer and various circuit elements of the touch screen can be measured. The change in capacitance can be correlated to the amount of pressure being applied to the touch screen, thus providing a method to determine the pressure being applied. During operation of the device, the system can time multiplex touch, display and pressure sensing operations so as to take advantage of an integrated touch and display architecture.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: September 3, 2019
    Assignee: Apple Inc.
    Inventors: Abbas Jamshidi-Roudbari, Shih Chang Chang, Cheng-Ho Yu, Ting-Kuo Chang
  • Publication number: 20190237010
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventors: Chin-Wei Lin, Shyuan Yang, Chuang Qian, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Patent number: 10360862
    Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: July 23, 2019
    Assignee: Apple Inc.
    Inventors: Shin-Hung Yeh, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Patent number: 10304378
    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: May 28, 2019
    Assignee: Apple Inc.
    Inventors: Chin-Wei Lin, Shyuan Yang, Chuang Qian, Abbas Jamshidi Roudbari, Ting-Kuo Chang
  • Patent number: 10288944
    Abstract: A display may have an active area surrounded by a border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. The liquid crystal layer may be retained within the display using a ring of sealant that is dispensed along the border area on the thin-film transistor layer. The thin-film transistor layer may include at least a substrate, a dielectric layer formed over the substrate, a first planarization layer formed on the dielectric layer, and a second planarization layer formed on the first planarization layer. A first continuous trench structure may be formed along the border of the display to help prevent moisture seepage. A second trench structure that is separate from the first trench structure may be formed along the border of the display to help provide proper sealant adhesion.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: May 14, 2019
    Assignee: Apple Inc.
    Inventors: Abbas Jamshidi Roudbari, Shih-Hung Yeh, Ting-Kuo Chang
  • Patent number: 10249254
    Abstract: Methods and devices useful in discharging an aberrant charge on the VCOM of an electronic display and harvesting energy from the VCOM of the electronic display are provided. By way of example, a method may include supplying an activation signal to an active switching device of an electronic display. The active switching device is configured to discharge an aberrant charge on a common electrode of the electronic display. The method further includes discharging the aberrant charge by way of the active switching device. Discharging the aberrant charge comprises preventing a possible occurrence of image artifacts from becoming apparent on the electronic display.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: April 2, 2019
    Assignee: Apple Inc.
    Inventors: Kasra Omid-Zohoor, Hyunwoo Nho, Keitaro Yamashita, Majid Gharghi, Sarath Chandrasekhar Venkatesh Kumar, Ting-Kuo Chang, Abbas Jamshidi Roudbari