Abstract: It is proposed a method for regulating the activity of a core running at a given clock rate. The method comprises: monitoring (S100) a value of a parameter of the core, the parameter being a critical parameter for a safe operating of the core; determining whether the monitored value reaches a trigger value; when the monitored value reaches the trigger value (S120): modifying the clock rate of the core (S130) by decreasing the ratio of active cycles of the clock; and running the core at the clock rate modified (S140) by decreasing the ratio of active cycles of the clock; when the monitored value reaches a second time the trigger value (S170): modifying the clock rate of the core (S180) by increasing the ratio of active cycles of the clock; and running the core at the clock rate (S190) modified by increasing the ratio of active cycles of the clock.

Abstract: Transaction exchanges are controlled between two integrated circuits in a system having the integrated circuits (ICs), a power supply supplying power to a link between the ICs, thereby enabling transaction exchanges between both ICs and a controller controlling the ICs and the power supply. This involves receiving an order at the controller, wherein the order requires the link to be closed. An instruction is sent from the controller to each of the two ICs, wherein the instruction causes each of the ICs to stop initiating new transaction requests. For each one of the ICs, in response to detecting that the one of the two ICs has stopped initiating new transactions, it is detected when all pending transactions initiated by the one of the two ICs have been executed. The link is closed in response to detecting that all pending transactions of both of the two ICs have been executed.

Abstract: An integrated circuit and a method for transmitting messages from initiator units of an integrated circuit to at least one target unit of the integrated circuit. The initiator units transform first digital messages into second digital messages, the second messages being added, then transmitted to the target unit. The transformation of the first messages into second messages comprises the application of an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix.

Abstract: A method for transmitting messages from first units of an integrated circuit to at least one second unit of the integrated circuit. The first units generate first digital messages and transform them into second digital messages obtained by application of an orthogonal or quasi-orthogonal transformation to the first messages. The second messages of the first units are added up and transmitted to the second unit.

Abstract: An integrated circuit and a method for transmitting messages from initiator units of an integrated circuit to at least one target unit of the integrated circuit. The initiator units transform first digital messages into second digital messages, the second messages being added, then transmitted to the target unit. The transformation of the first messages into second messages comprises the application of an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix.

Abstract: A method for transmitting messages from first units of an integrated circuit to at least one second unit of the integrated circuit. The first units generate first digital messages and transform them into second digital messages obtained by application of an orthogonal or quasi-orthogonal transformation to the first messages. The second messages of the first units are added up and transmitted to the second unit.