Patents by Inventor Abdul R. Ismail

Abdul R. Ismail has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190138078
    Abstract: Embodiments are directed toward a universal serial bus (USB) controller including a USB Type-C port that couples to a USB Type-C link including high speed data lines and an alternate mode function line to carry low power commands related to an alternate mode function. In embodiments, the controller or a processor coupled to the controller monitors the line used by the alternate mode function for the low power commands and provides information about the low power commands to a device policy manager (DPM) to determine a power distribution policy for a plurality of devices coupled to the DPM. In embodiments, the power distribution policy supplements or replaces a low power policy of a device of using a USB-C/Power delivery policy and another device using an alternate mode low power policy. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Inventors: Rajaram Regupathy, Abdul R. Ismail
  • Publication number: 20190121752
    Abstract: Embodiments of the present disclosure are directed toward a universal serial bus (USB) device and a USB host controller. The USB device and USB host controller may be configured to couple to one another via a USB link that may include a high-speed data line and a low-speed data line. The USB device may then transmit, via the high-speed data line, an indication of a digital image to the USB host controller. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 25, 2019
    Inventors: Huimin Chen, Karthi R. Vadivelu, Abdul R. Ismail, Raul Gutierrez
  • Publication number: 20190121764
    Abstract: A method and a device to participate in a managed Universal Serial Bus (USB) ecosystem. The method including establishing a connection with a plurality of devices in the ecosystem as a many-to-many relationship between extended USB device policy managers, and coordinating power and data exchange within the plurality of devices the ecosystem including at least one device that is not directly connected.
    Type: Application
    Filed: October 23, 2017
    Publication date: April 25, 2019
    Inventors: Rajaram REGUPATHY, Abdul R. ISMAIL
  • Publication number: 20190086994
    Abstract: An first apparatus is provided which comprises: a first port coupled to a second port of a second apparatus; first one or more circuitries to monitor current of a power bus that is to supply power from the first port to the second port; and second one or more circuitries to: while the first port is to operate in a high-current mode of operation, determine that the current of the power bus is less than a threshold current; and cause the first port to enter a suspend mode of operation from the high-current mode of operation, in response to the current of the power bus being less than the threshold current.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 21, 2019
    Applicant: Intel Corporation
    Inventors: Rajaram Regupathy, Abdul R. Ismail
  • Publication number: 20190050350
    Abstract: Apparatuses, methods and storage medium associated with virtualizing a USB device controller of a SoC in a computing platform hosting multiple VMs, are disclosed herein. In some embodiments, a CRM includes instructions to implement a USB driver stack in a SOS of a SVM on the computing platform. The USB driver stack of the SOS includes a SOS device controller driver to communicate with one or more USB devices of the computing platform, via a USB device controller of the SoC; and a SOS function virtualization driver to communicate with one or more corresponding UVM function virtualization drivers of the UVMs to paravirtualize the SOS device controller driver to the UVMs. Other embodiments are also described and claimed.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventors: Rajaram Regupathy, Abdul R. Ismail
  • Publication number: 20190042523
    Abstract: An apparatus is provided, where the apparatus includes a plurality of input/output (I/O) ports and a controller. A first port, a second port, and a third port are to be respectively coupled to a first device with a first class type, a second device with a second class type, and a third device with a third class type. The controller is to determine that individual ones of the first and second devices are to perform asynchronous transfer with the apparatus, and that the third device is to perform a transfer that is different from the asynchronous transfer. The controller is to allocate bandwidth to the first and second I/O ports, based at least in part on the first class type and the second class type. The controller is to ignore the third class type, while allocating bandwidth to the third I/O port.
    Type: Application
    Filed: June 12, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Abdul R. Ismail, Rajaram Regupathy
  • Publication number: 20190034377
    Abstract: A device including a transceiver to support asymmetrical full duplex communication across a connected medium. The transceiver including a transmission circuit to receive a transmission input and transmit the transmission input via a SuperSpeed data driver and a low frequency periodic signal (LFPS) transmitter over the connected medium, and a receiver circuit coupled to transmission circuit, the receiver circuit to filter a received signal from the connected medium through a low pass filter to an LFPS receiver.
    Type: Application
    Filed: December 19, 2017
    Publication date: January 31, 2019
    Inventors: Huimin CHEN, Yong YANG, Karthi VADIVELU, Abdul R. ISMAIL
  • Publication number: 20180356873
    Abstract: A method and system for managing power for Universal Serial Bus (USB) ports, in particular USB Type-C ports that are connected to USB devices that do not support USB power delivery (USB PD). The method and system present an advertisement of a default power supply to a USB device, receive power attribute information from a USB device configuration descriptor during USB device enumeration, in response to the connecting USB device not supporting USB power deliver (USB PD), and dynamically change the power supply to meet the power requirements of the connecting USB device identified by the power attribute information.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventors: Rajaram REGUPATHY, Abdul R. ISMAIL, Paul Sathya CHELLADURAI
  • Publication number: 20180189224
    Abstract: Apparatuses relating to periodic Universal Serial Bus (USB) transaction scheduling at fractional bus intervals are described. In one embodiment, an apparatus includes a receptacle to receive a plug of a first device and a second device; a transceiver circuit coupled to the receptacle; and a controller circuit to: switch between a first mode for a first class of data transfers and a second mode for a second class of data transfers, wherein the first class preempts the second class of data transfers, schedule a data transfer with the transceiver circuit for a first endpoint of the first device at a first service interval of a bus interval when in the first mode, and schedule a data transfer with the transceiver circuit for a second, different endpoint of the second device at a second service interval that is smaller than the first service interval when in the first mode.
    Type: Application
    Filed: December 31, 2016
    Publication date: July 5, 2018
    Inventors: KARTHI R. VADIVELU, ABDUL R. ISMAIL, NAUSHEEN ANSARI
  • Publication number: 20180183899
    Abstract: Described is an apparatus comprising a first circuitry and a second circuitry. The first circuitry may be operable to provide output to a unidirectional data path for carrying a packetized data stream. The second circuitry may be operable to provide output to, and obtain input from, a bidirectional control path for carrying a packetized control stream. The packetized data stream may comprise pixel data traffic and frame-synchronous metadata traffic, and the packetized control stream may comprise frame-asynchronous metadata traffic and control traffic.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 28, 2018
    Applicant: Intel Corporation
    Inventors: Nausheen ANSARI, Srikanth KAMBHATLA, Abdul R. ISMAIL, Karthi R. VADIVELU, John S. HOWARD, Gal YEDIDIA, Reuven ROZIC, Paul S. DIEFENBAUGH, Zachary F. HAMM
  • Patent number: 9558145
    Abstract: In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store an output of the counter, a mirror elastic buffer to store samples of the counter output received from the first register, where the mirror elastic buffer is to mirror an elastic buffer of a receiver circuit, and a resolution logic to receive a counter output sample from the mirror elastic buffer and a current counter value output from the counter, and to determine a transit latency for a data element to traverse the receiver circuit based at least in part on the counter output sample and the current counter value. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: January 31, 2017
    Assignee: Intel Corporation
    Inventors: David J. Harriman, Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich
  • Publication number: 20160350247
    Abstract: Techniques for latency improvement are described herein. The techniques may include an apparatus having a receiver configured to receive transfers over a bus. The transfers include a periodic transfer at a predefined interval, wherein the periodic transfer is associated with a guaranteed bandwidth over the bus. The transfers may also include an asynchronous transfer at any time within the predefined interval. The apparatus may also include logic configured to implement a modified periodic transfer at an interval that is less than the predefined interval, and a modified asynchronous transfer comprising a priority status above the asynchronous transfer.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 1, 2016
    Applicant: INTEL CORPORATION
    Inventors: John S. Howard, Karthi R. Vadivelu, Abdul R. Ismail
  • Publication number: 20160124894
    Abstract: In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store an output of the counter, a mirror elastic buffer to store samples of the counter output received from the first register, where the mirror elastic buffer is to mirror an elastic buffer of a receiver circuit, and a resolution logic to receive a counter output sample from the mirror elastic buffer and a current counter value output from the counter, and to determine a transit latency for a data element to traverse the receiver circuit based at least in part on the counter output sample and the current counter value. Other embodiments are described and claimed.
    Type: Application
    Filed: January 8, 2016
    Publication date: May 5, 2016
    Inventors: David J. Harriman, Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich
  • Patent number: 9262347
    Abstract: In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store an output of the counter, a mirror elastic buffer to store samples of the counter output received from the first register, where the mirror elastic buffer is to mirror an elastic buffer of a receiver circuit, and a resolution logic to receive a counter output sample from the mirror elastic buffer and a current counter value output from the counter, and to determine a transit latency for a data element to traverse the receiver circuit based at least in part on the counter output sample and the current counter value. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: February 16, 2016
    Assignee: Intel Corporation
    Inventors: David J. Harriman, Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich
  • Publication number: 20150117504
    Abstract: In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store an output of the counter, a mirror elastic buffer to store samples of the counter output received from the first register, where the mirror elastic buffer is to mirror an elastic buffer of a receiver circuit, and a resolution logic to receive a counter output sample from the mirror elastic buffer and a current counter value output from the counter, and to determine a transit latency for a data element to traverse the receiver circuit based at least in part on the counter output sample and the current counter value. Other embodiments are described and claimed.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventors: David J. Harriman, Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich
  • Publication number: 20140095578
    Abstract: Systems and methods that provide that provide the sharing of capabilities over a communicative link, such as a network, is disclosed. The capabilities may be shared seamlessly between electronic devices by using preexisting device drivers.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: VENKATESH RAJENDRAN, ABDUL R. ISMAIL, CHARLES L. BRABENAC, KRISTOFFER D. FLEMING, BAHAREH SADEGHI
  • Patent number: 8671225
    Abstract: A method for managing data between a virtual machine a bus controller includes transmitting an input output (IO) request from the virtual machine to a service virtual machine that owns the bus controller. According to an alternate embodiment, managing data between a virtual machine and a bus controller includes trapping a register access made by the virtual machine. A schedule is generated to be implemented by the bus controller. Status is returned to the virtual machine via a virtual host controller. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: March 11, 2014
    Assignee: Intel Corporation
    Inventors: Kiran S. Panesar, Sanjay Kumar, Abdul R. Ismail, Philip Lantz
  • Patent number: 8612060
    Abstract: Methods and systems may include an apparatus having a power line interface and a controller with management logic. The management logic can manage the power delivery policies of devices connected to the power line interface based on changes in the power delivery capability of the apparatus.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: December 17, 2013
    Assignee: Intel Corporation
    Inventors: David J. Harriman, Robert A. Dunstan, Abdul R. Ismail
  • Publication number: 20120331189
    Abstract: A controller for a host system includes an interface and a buffer. The interface receives a plurality of data units isochronously received from a connected device, and the buffer stores the data units and then output a data block upon the occurrence of at least one condition. Each data unit stores data of a first size and the data block includes data of a second size greater than the first size. The connected device may be a Universal Serial Bus (USB) device or another type of device.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Inventors: Anshuman THAKUR, Abdul R. Ismail
  • Patent number: 8335875
    Abstract: A controller for a host system includes an interface and a buffer. The interface receives a plurality of data units isochronously received from a connected device, and the buffer stores the data units and then output a data block upon the occurrence of at least one condition. Each data unit stores data of a first size and the data block includes data of a second size greater than the first size. The connected device may be a Universal Serial Bus (USB) device or another type of device.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: December 18, 2012
    Assignee: Intel Corporation
    Inventors: Anshuman Thakur, Abdul R. Ismail