Abstract: The presently invention is directed to ways to measure distortion effects while allowing for the possibility of significant reduction in test cost. An exemplary embodiment of the present invention provides a method for amplifier distortion measurement including comparing a first amplitude response of an output signal from a power amplifier to a second amplitude response of a reference input signal to determine a set of Amplitude-to-Amplitude (“AM-AM”) distortion values. Additionally, the method for amplifier distortion measurement includes equalizing the first amplitude response of the output signal to match the second amplitude response of the reference input signal based on the set of AM-AM distortion values and creating a difference signal based on a comparison of the equalized output signal to the reference input signal.

Abstract: An exemplary embodiment of the present invention provides a method of measuring I-Q mismatch in a system having a transmitter. The transmitter comprises an in-phase up-converter, a quadrature-phase up-converter, and a power detector.

Abstract: The various embodiments of the present disclosure relate generally to power-conscious self-healing transceiver systems and methods. An embodiment of the present invention provides a method of power-consciously self-healing a transceiver system. The method comprises providing a transceiver device having a plurality of tuning elements configured to control a plurality of specifications of the device, determining initial values for the plurality of tuning elements, and performing a hardware-iterative gradient search to obtain values for each tuning element such that the plurality of specifications are within a tolerated range.

Abstract: The presently invention is directed to ways to measure distortion effects while allowing for the possibility of significant reduction in test cost. An exemplary embodiment of the present invention provides a method for amplifier distortion measurement including comparing a first amplitude response of an output signal from a power amplifier to a second amplitude response of a reference input signal to determine a set of Amplitude-to-Amplitude (“AM-AM”) distortion values. Additionally, the method for amplifier distortion measurement includes equalizing the first amplitude response of the output signal to match the second amplitude response of the reference input signal based on the set of AM-AM distortion values and creating a difference signal based on a comparison of the equalized output signal to the reference input signal.

Abstract: Systems and methods are disclosed for evaluating the length of elongated elements in a sample. The disclosed systems and methods may include using a direct current stimulus to determine a direct current base length region corresponding to at least a portion of the sample. Furthermore, the disclosed systems and methods may include using an alternating current stimulus to determine that the direct current base length region corresponds to a first set of elongated elements and a second set of elongated elements. The first set of elongated elements may have a first base length and the second set of elongated elements may have a second base length. The elongated elements may comprise, for example, chain molecules, deoxyribonucleic acid (DNA), ribonucleic acid (RNA), or proteins. Furthermore, the disclosed systems and methods may include measuring an ion current through a nanopore, the ion current produced by the alternating current stimulus.

Abstract: The present invention relates to novel compounds of general formula (I), their regioisomers, tautomeric forms, novel intermediates involved in their synthesis, their pharmaceutically acceptable salts and pharmaceutical compositions containing them. The present invention also relates to a process of preparing compounds of general formula (I), their regioisomers, their tautomeric forms, their pharmaceutically acceptable salts pharmaceutical compositions containing them, and novel intermediates involved in their synthesis.

Abstract: Various embodiments of self-calibration systems and methods are described. One method embodiment, among others, includes imposing an alternate test to components within the device, responsive to the imposition of the alternate test, providing test responses corresponding to the components, and substantially, simultaneously mapping each of the test responses to corresponding specification values of the components.

Abstract: Various embodiments of self-calibration systems and methods are described. One method embodiment, among others, includes imposing an alternate test to components within the device, responsive to the imposition of the alternate test, providing test responses corresponding to the components, and substantially, simultaneously mapping each of the test responses to corresponding specification values of the components.

Abstract: The present invention describes systems and methods to provide defect-tolerant logic devices. An exemplary embodiment of the present invention provides a defect-tolerant logic device including a plurality of CMOS gates and at least one defective CMOS gate included within the plurality of CMOS gates. Additionally, the at least one defective CMOS gate is enabled to be reconfigured into a pseudo-NMOS transistor if a P-network of the at least one defective CMOS gate is diagnosed as defective. Furthermore, the at least one defective CMOS gate is enabled to be reconfigured into a pseudo-PMOS transistor if the N-network of the at least one defective CMOS gate is diagnosed as defective.

Abstract: A method and device prevent a set-top terminal from accepting a download of new programming or data over a cable network when the download would be redundant of information already possessed by the set-top terminal or would cause an inconvenience to subscribers. When the set-top terminal is signaled that a new download is being offered, the set-top terminal checks to see if the download in fact contains a newer version of data or programming than is currently resident in the set-top terminal. The set-top terminal also checks whether criteria for accepting a download are met. The criteria are conditions that tend to indicate that an interruption of service to accept a download would not inconvenience the subscriber at that time. When the criteria are met, the download is accepted. Otherwise, the download is not accepted or is not accepted until the criteria are satisfied.

Abstract: The present invention describes systems and methods to provide defect-tolerant logic devices. An exemplary embodiment of the present invention provides a defect-tolerant logic device including a plurality of CMOS gates and at least one defective CMOS gate included within the plurality of CMOS gates. Additionally, the at least one defective CMOS gate is enabled to be reconfigured into a pseudo-NMOS transistor if a P-network of the at least one defective CMOS gate is diagnosed as defective. Furthermore, the at least one defective CMOS gate is enabled to be reconfigured into a pseudo-PMOS transistor if the N-network of the at least one defective CMOS gate is diagnosed as defective.

Abstract: A single test stimulus and a simple test configuration with embedded envelope detectors are used to estimate all the specification values of interest for an RF circuit under test in an integrated circuit chip. Envelope detectors are deployed as sensors inside the circuit under test. Where more than one circuit is in an RF device in the integrated circuit, each RF circuit in the device may have its own envelope detector. A signal having, for example, time-varying envelopes is used as an optimized test stimulus. The test uses the time-varying and low frequency envelope of the test response. The circuit's response under test to the optimized test stimulus has features highly correlated with the specifications of interest. The test stimulus is optimized for a set of training circuits, and each training circuit in the set is selected to provide one of a spectrum of test responses to the stimulus.

Abstract: A bit error rate test on a transceiver is accelerated by adding a phase offset to data phase encoding and decoding in the transceiver and by mapping bit error rate test results from an elevated error rate condition to a normal error rate condition for the transceiver. The elevated error rate is accomplished by adjusting the phase of the phase encoder and decoder with the value of the phase offset so that the encoded data transmission signal is not as robust against noise as it normally would be. Noise in the form of an interference signal is introduced during the transmission, and the bit error rate is measured after the receiver has decoded the signal. The bit error rate (BER) data with an elevated propensity for error is mapped against bit error rate data for normal operations. A mapping function is built to map BERE (bit error rate elevated) data—data from the elevated error rate condition for data encoding, to BERN (normal bit error rate) data—data from the normal error rate condition for data encoding.

Abstract: Devices and methods to test high speed analog-to-digital and digital-to-analog signal converters are provided. According to one embodiment, a testing device can comprise an output, a mixer, and an input. The output can provide a signal, and the mixer can receive the signal and provide a test signal to a data converter having a sampling frequency. The test signal can be spectrally impure. The input can sample the data converter output at a frequency less the sampling frequency so that the data converter output is under sampled. According to another embodiment, a first set of data converters are tested to obtain a mapping function that relates dynamic specifications to device signatures. Then a second set of data converters can be tested and based on their device signatures mapped with the mapping function, dynamic specifications for the second set of data converters can be obtained. Other embodiments are also claimed and described.

Abstract: Systems and methods are disclosed for evaluating the length of elongated elements in a sample. The disclosed systems and methods may include using a direct current stimulus to determine a direct current base length region corresponding to at least a portion of the sample. Furthermore, the disclosed systems and methods may include using an alternating current stimulus to determine that the direct current base length region corresponds to a first set of elongated elements and a second set of elongated elements. The first set of elongated elements may have a first base length and the second set of elongated elements may have a second base length. The elongated elements may comprise, for example, chain molecules, deoxyribonucleic acid (DNA), ribonucleic acid (RNA), or proteins. Furthermore, the disclosed systems and methods may include measuring an ion current through a nanopore, the ion current produced by the alternating current stimulus.

Abstract: A single test stimulus and a simple test configuration with embedded envelope detectors are used to estimate all the specification values of interest for an RF circuit under test in an integrated circuit chip. Envelope detectors are deployed as sensors inside the circuit under test. Where more than one circuit is in an RF device in the integrated circuit, each RF circuit in the device may have its own envelope detector. A signal having, for example, time-varying envelopes is used as an optimized test stimulus. The test makes use of the time-varying and low frequency envelope of the test response. The response of the circuit under test to the optimized test stimulus has features highly correlated with the specifications of interest. The test stimulus is optimized for a set of training circuits, and each training circuit in the set is selected to provide one of a spectrum of test responses to the stimulus.

Abstract: Devices and methods to test high speed analog-to-digital and digital-to-analog signal converters are provided. According to one embodiment, a testing device can comprise an output, a mixer, and an input. The output can provide a signal, and the mixer can receive the signal and provide a test signal to a data converter having a sampling frequency. The test signal can be spectrally impure. The input can sample the data converter output at a frequency less the sampling frequency so that the data converter output is under sampled. According to another embodiment, a first set of data converters are tested to obtain a mapping function that relates dynamic specifications to device signatures. Then a second set of data converters can be tested and based on their device signatures mapped with the mapping function, dynamic specifications for the second set of data converters can be obtained. Other embodiments are also claimed and described.

Abstract: A system for signaling a distributed network status indication to a local user includes an access device configured to monitor a status of the distributed network and a processing module configured to process information pertaining to the monitored status of the distributed network. The system also includes at least one user device comprising a status identifier, where the processing module is configured to transmit a signal to the at least one user device pertaining to the monitored status of the distributed network, and where the status identifier of the at least one user device is configured to output an indication corresponding to the status of the distributed network.

Abstract: The present invention relates to two novel Gonadotropin releasing hormones muGnRH I and muGnRH II of amino acid SEQ ID 1 as QHWSAWRLPG, and SEQ ID 2 QHWSWGILPG respectively, useful for induced breeding in fish both in combination and alone, by activating production of Gonadotropin, and a method of isolating the same from Indian Murrel brain, and further, a method of inducing breeding in fishes using the said novel gonadotropin releasing hormones.

Abstract: A method for using an alternate performance test to reduce test time and improve manufacturing yield. The method comprises establishing a specification test limit within which a product would be accepted under specification test criteria and inner and outer alternate test error bounds relative to the specification test limit; initially testing the product with the alternate test; accepting the product if the alternate test result is within the inner alternate test error bound; rejecting the product if the alternate test result is outside the outer alternate test error bound; and retesting the product using the specification test if the alternate test result is on or between the alternate error bounds. On retesting, the product is ordinarily rejected if the specification test result is outside the specification test limits. The method may further comprise modifying a production test to produce a specification test whose guardband is narrower than the production test.