Patents by Inventor Abhishek

Abhishek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250097770
    Abstract: Aspects of the present disclosure provide mechanisms for conveying (critical) updates to a corresponding STA that is in an unassociated state. In some cases, a network entity may obtain an update during a communication session, such as a sensing measurement session. The network entity may then output a notification of the update to another wireless device. The network entity may also output the actual update itself.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 20, 2025
    Inventors: Yanjun SUN, Alireza RAISSINIA, Abhishek Pramod PATIL, Gaurang NAIK, Sai Yiu Duncan HO, Abdel Karim AJAMI, Alfred ASTERJADHI, George CHERIAN
  • Publication number: 20250095099
    Abstract: One embodiment provides a graphics processor comprising a system interface and circuitry coupled with the system interface. The circuitry includes an execution resource and a preemption status register. The execution resource is configured to execute an instruction. During execution of the instruction, the execution resource is to receive a request to preempt execution of a thread associated with the instruction and, based on a value stored in the preemption status register, execute at least one additional instruction after receipt of the request to preempt execution of the thread.
    Type: Application
    Filed: September 23, 2024
    Publication date: March 20, 2025
    Applicant: Intel Corporation
    Inventors: Altug Koker, Ingo Wald, David Puffer, Subramaniam M. Maiyuran, Prasoonkumar Surti, Balaji Vembu, Guei-Yuan Lueh, Murali Ramadoss, Abhishek R. Appu, Joydeep Ray
  • Publication number: 20250093281
    Abstract: Images of an object may be captured at a computing device. Each of the images may be captured from a respective viewpoint based on image capture configuration information identifying one or more parameter values. A multiview image digital media representation of the object may be generated that includes some or all of the images of the object and that is navigable in one or more dimensions.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 20, 2025
    Applicant: Fyusion, Inc.
    Inventors: Stefan Johannes Josef Holzer, Santiago Arano Perez, Abhishek Kar, Matteo Munaro, Pavel Hanchar, Radu Bogdan Rusu, Martin Markus Hubert Wawro, Ashley Wakefield, Rodrigo Ortiz Cayon, Josh Faust, Jai Chaudhry, Nico Gregor Sebastian Blodow, Mike Penz
  • Publication number: 20250096380
    Abstract: The disclosed technology relates to an electrical feedthrough for a battery cell. The electrical feedthrough may include a pin configured to form an external battery terminal, an insulator surrounding the pin and configured to electrically isolate the pin, a channel, and a serpentine tab electrically coupled to the pin at a first end. The serpentine tab is nested within the channel to minimize use of space within an enclosure of the battery cell thereby increasing energy capacity of the battery cell by eliminating the need to allot space within the enclosure to accommodate the tab.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 20, 2025
    Inventors: Kyle Tse, Abhishek P. Shiwalkar, Shawn G. Fink, Christopher R. Pasma, Hirotsugu Oba, Brian K. Shiu
  • Publication number: 20250097312
    Abstract: Disclosed are some implementations of systems, apparatus, methods and computer program products for implementing a bi-level subscription process. A server computing device subscribes to a global topic. The server computing device receives a discovery message published to the global topic, where the discovery message specifies an instance name, a data center, and an instance URL. The server computing device subscribes to a regional topic having the instance name. The server computing device receives a metadata message published to the regional topic having the instance name, where the metadata message includes a tenant identifier, source information pertaining to a source from which events are to be obtained, and destination information pertaining to a destination via which the events are to be transmitted. The server computing device stores the source information and destination information in association with the tenant identifier, obtains events from the source and transmits the events to the destination.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Applicant: Salesforce, Inc.
    Inventors: Yatin UMROTKAR, Alexey Syomichev, Abhishek Chhabra, Simi Kaleeckal Mathew, Sarvesh Parab
  • Publication number: 20250093723
    Abstract: Certain aspects pertain to methods of fabricating an optical device on a substantially transparent substrate that include a pre-deposition operation that removes a width of lower conductor layer at a distance from the outer edge of the substrate to form a pad at the outer edge. The pad and any deposited layers of the optical device may be removed in a post edge deletion operation.
    Type: Application
    Filed: July 15, 2024
    Publication date: March 20, 2025
    Inventors: Abhishek Anant Dixit, Todd William Martin, Anshu A. Pradhan
  • Publication number: 20250095693
    Abstract: An IC device may include a CMOS layer and memory layers at the frontside and backside of the CMOS layer. The CMOS layer may include one or more logic circuits, which may include MOSFET transistors. A memory layer may include one or more memory arrays. A memory array may include memory cells (e.g., DRAM cells), bit lines, and word lines. The logic circuits may include word line drivers and sense amplifiers. Word lines in different memory layers may share the same word line driver. Bit lines in different memory layers may share the same sense amplifier. The IC device may include front-back word line drivers, near-far sense amplifiers, near-far word line drivers, or front-back sense amplifiers. A memory layer may be bonded with the CMOS layer through a bonding layer that provides a bonding interface between the memory layer and the CMOS layer.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Intel Corporation
    Inventors: Abhishek A. Sharma, Juan G. Alzate-Vinasco, Fatih Hamzaoglu, Wilfred Gomes, Anand S. Murthy, Tahir Ghani, Van H. Le
  • Publication number: 20250094419
    Abstract: Systems, devices, computer-implemented methods, and tangible non-transitory computer readable media for implementing an organizational management platform that manages organizational data for an organization. The system can receive, from a user device, a user request for a report. Additionally, the system can generate a logic plan based on the user request, the logic plan determining a plurality of models. Moreover, the system can generate a first query being expressed in a custom query language. Furthermore, the system can combine the first query with a second query to generate a unified query. Subsequently, the system can translate the unified query into a final query, wherein the final query is expressed in a data access language. The system can execute the final query to retrieve data from a database, where a report is generated based on the retrieved data.
    Type: Application
    Filed: December 20, 2023
    Publication date: March 20, 2025
    Inventors: Nikunj Aggarwal, Abhishek Gupta, Naman Kumar Agarwal, Ayush Rai, Marco Nkemta Ndoping, Rohit Sivakumar, Nizar Mohammad Hejazi
  • Publication number: 20250095750
    Abstract: Various examples in accordance with the present disclosure provide example methods, systems, and apparatuses for reading non-volatile memories.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 20, 2025
    Inventors: Abhishek JAIN, Aditya VASISTH
  • Publication number: 20250095532
    Abstract: Saving power in an extended-reality device can include rendering a video stream on a display, tracking an eye of a user observing the display, ascertaining a gaze direction of the eye based on tracking the eye, calculating a foveal region of the display based on ascertaining the gaze direction in relation to the display, and modulating color hues of the video stream for pixels of the display outside the foveal region, to reduce a power consumption of the display. Modulating color hues is based on human color discrimination and display power consumption correlated to pixel color.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 20, 2025
    Inventors: Qi Sun, Yuhao Zhu, Budmonde Duinkharjav, Kenneth Chen, Abhishek Tyagi, Jiayi He
  • Publication number: 20250091817
    Abstract: An object processing system is disclosed that includes a distribution system for distributing a plurality of objects among a plurality of containers, an output conveyance system for receiving a plurality of completed containers, and a container discharge system for emptying any contents of a container of the plurality of completed containers into a destination location, the container discharge system including a discharge conveyor section in which the container is suspended and moved in a conveyor direction while permitting a bottom of the container to drop open to discharge any contents of the container into the destination location.
    Type: Application
    Filed: September 19, 2024
    Publication date: March 20, 2025
    Inventors: Jeffrey KITTREDGE, Abhishek KALURI, Mitchell GUILLAUME, Jennifer Eileen KING, Kirsten WANG, Charles BAPTISTA, Kevin AHEARN
  • Publication number: 20250091807
    Abstract: An object processing system is disclosed that includes a first support structure for supporting a plurality of containers that are positioned to receive a plurality of objects, a second support structure for receiving any of the plurality of containers when each of the plurality of containers is ready to be discharged from the first support structure, and an automated mobile transfer unit for selectively transferring a selected container from the first support structure to the second support structure, said automated mobile transfer unit including a mobile chassis unit for moving the at least one automated mobile transfer unit in a first direction among the first support structure and the second support structure, and a payload transfer system supported by the mobile chassis unit and adapted to transfer a selected container of the plurality of containers from the first support structure to the second support structure.
    Type: Application
    Filed: September 18, 2024
    Publication date: March 20, 2025
    Inventors: Jeffrey KITTREDGE, Abhishek KALURI, Mitchell GUILLAUME, Jennifer Eileen KING, Kirsten WANG, Charles BAPTISTA, Kevin AHEARN
  • Publication number: 20250097830
    Abstract: Techniques for using contextual information from a host STAs in the context of a wireless network having at least one non-AP station (STA) are disclosed. The host STA uses transmitted fields from the AP to determine a make of the AP. The host STA sends a request message to control one or more AP parameters to the AP. The host STA, if the AP accepts the message, sends another message identifying the STAs in its network. The host STA also acquires, via a message from the AP, details about the STAs associated with the AP. When receiving contextual information from itself or otherwise, the host STA determines an appropriate action, and transmits an action request message for the AP to take the action. The AP confirms once the action is taken.
    Type: Application
    Filed: August 1, 2024
    Publication date: March 20, 2025
    Inventors: Vishnu Vardhan Ratnam, Abhishek Sehgal, Boon Loong Ng, Yuming Zhu
  • Publication number: 20250098179
    Abstract: An IC device may include a CMOS layer and memory layers at the frontside and backside of the CMOS layer. The CMOS layer may include one or more logic circuits with MOSFET transistors. The CMOS layer may also include memory cells, e.g., SRAM cells. A memory layer may include one or more memory arrays. A memory array may include memory cells (e.g., DRAM cells), bit lines, and word lines. A logic circuit in the CMOS layer may control access to the memory cells. A memory layer may be bonded with the CMOS layer through a bonding layer that includes conductive structures coupled to a logic circuit in the CMOS layer or to bit lines or word lines in the memory layer. An additional conductive structure may be at the backside of a MOSFET transistor in the CMOS layer and coupled to a conductive structure in the bonding layer.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Inventors: Abhishek A. Sharma, Van H. Le, Fatih Hamzaoglu, Juan G. Alzate-Vinasco, Nikhil Jasvant Mehta, Vinaykumar Hadagali, Yu-Wen Huang, Honore Djieutedjeu, Tahir Ghani, Timothy Jen, Shailesh Kumar Madisetti, Jisoo Kim, Wilfred Gomes, Kamal Baloch, Vamsi Evani, Christopher Wiegand, James Pellegren, Sagar Suthram, Christopher M. Pelto, Gwang Soo Kim, Babita Dhayal, Prashant Majhi, Anand Iyer, Anand S. Murthy, Pushkar Sharad Ranade, Pooya Tadayon, Nitin A. Deshpande
  • Publication number: 20250095931
    Abstract: An electrical switch apparatus includes: a base including: a first side, a second side opposite the first side, and an opening that passes through the base and is configured to receive a moveable contact assembly; and geometric features on the second side of the base, the geometric features including one or more engagement features that extend from the second side. The one or more engagement features are configured to hold one or more switch components to the base without a separate fastening device.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Inventors: Abhishek Pratap Rao, Somnath Janaba Devarde, Arthur James Jur
  • Publication number: 20250094582
    Abstract: A computer-implemented method, according to one approach includes having a historical risk score generated for a current cybersecurity event in response to detecting the current cybersecurity event. A sigma rule detection score is also generated for the current cybersecurity event, in addition to an anomaly risk score that is generated for the current cybersecurity event. An IoC score is further generated for the current cybersecurity event. A machine learning model is used to evaluate the historical risk score, the sigma rule detection score, the anomaly risk score, and the IoC score. The machine learning model is also used to create a consolidated risk score corresponding to: the current cybersecurity event, the consolidated risk score incorporating the historical risk score, the sigma rule detection score, the anomaly risk score, and the IoC score.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Inventors: Aankur Bhatia, Namrata Tolani, Erin Hwang, Abhishek Basu, Ajmeera Balaji Naik, Ikenna Precious Chima, Oleksandr Shmaliy, Adrian Mahjour
  • Publication number: 20250094170
    Abstract: One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute a 32-bit intermediate product of 16-bit operands and to compute a 32-bit sum based on the 32-bit intermediate product.
    Type: Application
    Filed: September 30, 2024
    Publication date: March 20, 2025
    Applicant: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Patent number: 12254376
    Abstract: A computer-implemented system and method for entity tracking and identification is provided. A tracker associated with an entity is tracked. Communication is continuously attempted between the tracker and a tracking device associated with an individual in custody of the entity. During one of the attempted communications, an absence of the tracker is determined by identifying a time of the attempted communication and applying a time threshold to the time for the attempted communication. The absence of the tracker is identified when no communication has been established with the tracking device within the time threshold. The entity is classified as missing when the absence of the tracker is determined.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: March 18, 2025
    Assignee: XEROX CORPORATION
    Inventors: Felicia Linn, Ramkumar Abhishek, Ashish V. Pattekar
  • Patent number: 12254543
    Abstract: The embodiments herein provide a system and method for personalized cartoon image generation. The method (100) comprises launching a keyboard interface (101), capturing a digital picture (102), face segmentation using neural network (103), normalization of segmented face (104), face cartoonification (105), which generates bobble head, facial landmark extraction (106), facial expression feature transfer (109) and customization of the generated plurality of cartoon images (110). Hence, the embodiments herein helps in creation of personalized plurality of cartoon images to make the user part of the conversations and the graphics or content shared look similar to the user input face and more aesthetically pleasing instead of using any reference stickers to convey the messages.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: March 18, 2025
    Assignee: Talent Unlimited Online Services Private Limited
    Inventors: Rahul Prasad, Abhishek Sharma, Mudit Rastogi
  • Patent number: 12254765
    Abstract: A method and system are disclosed for collecting and maintaining road event information, where point-based road event location data from transportation authorities, construction companies, vehicle sensors, or combinations thereof, is susceptible to location sensor errors, digital map errors, and/or map mismatching errors. Errors less than a selected threshold are filtered by categorizing or grouping reports of point-based locations into segments along links in a representation of a road, providing improved accuracy of reporting of road events.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 18, 2025
    Assignee: HERE Global B.V.
    Inventors: Aparna Rajagopal, Abhishek Singh, Kripa Nair, Chirag Golechha, Zhenhua Zhang