Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

Abstract: An apparatus and method for providing an artificial standoff to the bottom of leads on a QFN device sufficient to provide a gap that changes the fluid dynamics of solder flow and create a unique capillary effect that drives solder up the of leads of a QFN device when it is attached to a printed wiring board (PWB).

Abstract: An apparatus and method for providing an artificial standoff to the bottom of leads on a QFN device sufficient to provide a gap that changes the fluid dynamics of solder flow and create a unique capillary effect that drives solder up the of leads of a UN device when it is attached to a printed wiring board (PWB).

Abstract: A packaged semiconductor system, including: at least one electronic device on a device mounting surface of a substrate having terminals for attaching bond wires; at least one discrete component adjacent to the at least one electronic device, a second electrode of the at least one discrete component parallel to and spaced from a first electrode by a component body; the first electrode a metal foil having a protrusion extending laterally from the body and having a surface facing towards the second electrode; bonding wires interconnecting respective terminals of the at least one electronic device, the first electrode and the second electrode, and bonded to the surface of the second electrode and to the protrusion that extend away from the respective surfaces in a same direction; and packaging compound covering portions of the at least one electronic device, the at least one discrete component, and the bonding wires.

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit package. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit package to mitigate delamination between the integrated circuit die and the die pad.

Abstract: A packaged semiconductor system, including: at least one electronic device on a device mounting surface of a substrate having terminals for attaching bond wires; at least one discrete component adjacent to the at least one electronic device, a second electrode of the at least one discrete component parallel to and spaced from a first electrode by a component body; the first electrode a metal foil having a protrusion extending laterally from the body and having a surface facing towards the second electrode; bonding wires interconnecting respective terminals of the at least one electronic device, the first electrode and the second electrode, and bonded to the surface of the second electrode and to the protrusion that extend away from the respective surfaces in a same direction; and packaging compound covering portions of the at least one electronic device, the at least one discrete component, and the bonding wires.

Abstract: A packaged semiconductor system, including: at least one electronic device on a device mounting surface of a substrate having terminals for attaching bond wires; at least one discrete component adjacent to the at least one electronic device, a second electrode of the at least one discrete component parallel to and spaced from a first electrode by a component body; the first electrode a metal foil having a protrusion extending laterally from the body and having a surface facing towards the second electrode; bonding wires interconnecting respective terminals of the at least one electronic device, the first electrode and the second electrode, and bonded to the surface of the second electrode and to the protrusion that extend away from the respective surfaces in a same direction; and packaging compound covering portions of the at least one electronic device, the at least one discrete component, and the bonding wires.

Abstract: An apparatus and method for providing an artificial standoff to the bottom of leads on a QFN device sufficient to provide a gap that changes the fluid dynamics of solder flow and create a unique capillary effect that drives solder up the of leads of a UN device when it is attached to a printed wiring board (PWB).

Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit to mitigate delamination between the integrated circuit die and the die pad.

Abstract: A packaged semiconductor system, including: at least one electronic device on a device mounting surface of a substrate having terminals for attaching bond wires; at least one discrete component adjacent to the at least one electronic device, a second electrode of the at least one discrete component parallel to and spaced from a first electrode by a component body; the first electrode a metal foil having a protrusion extending laterally from the body and having a surface facing towards the second electrode; bonding wires interconnecting respective terminals of the at least one electronic device, the first electrode and the second electrode, and bonded to the surface of the second electrode and to the protrusion that extend away from the respective surfaces in a same direction; and packaging compound covering portions of the at least one electronic device, the at least one discrete component, and the bonding wires.

Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

Abstract: The assembly of a chip (101) attached to a substrate (103) with wires (201) spanning from the chip to the substrate is loaded in a heated cavity (402) of a mold; the wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound (302); a pressure chamber (404) of the mold is loaded with a solid pellet (410) of a packaging material including a polymerizable resin, the chamber being connected to the cavity; the vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners (403) before filling the mold cavity, whereby the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.

Abstract: Methods of packaging integrated circuits are disclosed herein. In one embodiment of a method. A die having a side is provided. A conductive stud is connected to the side of the die, wherein the conductive stud has a first end that is connected to the die and an opposite second end. The die is encapsulated except for the side. A first dielectric layer is affixed to the side of the die. The first dielectric layer has a first side and a second side. The first side of the first dielectric layer is affixed to the side of the die. The conductive stud enters the first side of the first dielectric layer. A conductive layer is affixed to the second side of the first dielectric layer. The second side of the conductive stud is affixed to the conductive layer using a conductive adhesive.

Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit to mitigate delamination between the integrated circuit die and the die pad.

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit to mitigate delamination between the integrated circuit die and the die pad.

Abstract: The invention is directed to a method for inhibiting or preventing delamination at the interface of the die attach/mold compound and the die pad of a semiconductor device and a semiconductor device formed by such method. The method includes providing a leadframe having a top surface; coating the top surface of the leadframe with first and second silane coating; heating the silane coatings to form a porous layer having a porosity of at least 10%; applying a die to the porous layer; securing the die to the porous layer by a die attaching compound; and after the curing of die attach material and wire bonding, a mold compound is applied through molding.

Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.

Abstract: Methods of fabricating integrated circuits are disclosed herein. A die having a side is provided. A conductive stud extends from the side in a direction that is substantially normal to the side. A first dielectric layer is affixed to the side of the die. The first dielectric layer has a first side and a second side. The first side of the first dielectric layer is affixed to the side of the die. The conductive stud pierces the first side of the first dielectric layer. A first via is formed through the first dielectric layer between the conductive stud and the second side. The first via is electrically connected to the conductive stud.