Patents by Inventor Abram M. Castro
Abram M. Castro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11854947Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.Type: GrantFiled: October 13, 2020Date of Patent: December 26, 2023Assignee: Texas Instruments IncorporatedInventors: Abram M. Castro, Steven Kummerl
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Patent number: 11830793Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.Type: GrantFiled: November 16, 2021Date of Patent: November 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sreenivasan K. Koduri, Abram M. Castro
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Patent number: 11552005Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.Type: GrantFiled: August 10, 2021Date of Patent: January 10, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Abram M. Castro
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Publication number: 20220077030Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.Type: ApplicationFiled: November 16, 2021Publication date: March 10, 2022Inventors: Sreenivasan K. Koduri, Abram M. Castro
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Publication number: 20210366811Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.Type: ApplicationFiled: August 10, 2021Publication date: November 25, 2021Inventor: Abram M. Castro
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Patent number: 11177195Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.Type: GrantFiled: April 25, 2019Date of Patent: November 16, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sreenivasan K. Koduri, Abram M. Castro
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Patent number: 11088052Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.Type: GrantFiled: July 10, 2018Date of Patent: August 10, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Abram M. Castro
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Publication number: 20210028093Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.Type: ApplicationFiled: October 13, 2020Publication date: January 28, 2021Inventors: Abram M. Castro, Steven Kummerl
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Publication number: 20200343165Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.Type: ApplicationFiled: April 25, 2019Publication date: October 29, 2020Inventors: Sreenivasan K. KODURI, Abram M. CASTRO
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Patent number: 10804185Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.Type: GrantFiled: December 31, 2015Date of Patent: October 13, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Abram M. Castro, Steven Kummerl
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Publication number: 20200020615Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.Type: ApplicationFiled: July 10, 2018Publication date: January 16, 2020Inventor: ABRAM M. CASTRO
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Publication number: 20170194233Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.Type: ApplicationFiled: December 31, 2015Publication date: July 6, 2017Inventors: Abram M. Castro, Steven Kummerl
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Publication number: 20150371963Abstract: A semiconductor device has semiconductor chip assembled on a substrate. The substrate has a first surface including conductive traces, which have a first length and a first width, the first width being uniform along the first length, and further a pitch to respective adjacent traces. The semiconductor chip has a second surface including contact pads; the second surface faces the first surface spaced apart by a gap. A conductive pillar contacts each contact pad; the pillar includes a core and a solder body, which connects the core to the respective trace across the gap. The pillar core has a non-circular cross section of a second width and a second length greater than the second width and greater than the first width.Type: ApplicationFiled: August 28, 2015Publication date: December 24, 2015Inventors: Abram M. Castro, Mark A. Gerber
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Patent number: 9129955Abstract: A semiconductor chip (102) assembled on a substrate (101). The substrate has a first surface (101a) including conductive traces (110), which have a first length (111) and a first width (112), the first width being uniform along the first length, and further a pitch (114) to respective adjacent traces. The semiconductor chip has a second surface (102a) including contact pads (121); the second surface faces the first surface spaced apart by a gap (130). A conductive pillar (140) contacts each contact pad; the pillar includes a metal core (141) and a solder body (142), which connects the core to the respective trace across the gap. The pillar core (141) has an oblong cross section of a second width (151) and a second length (152) greater than the second width. Trace pitch (141) is equal to or smaller than twice the second width (151). The trace pitch is equal to or smaller than the second length (152).Type: GrantFiled: July 15, 2009Date of Patent: September 8, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Abram M. Castro, Mark A. Gerber
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Patent number: 8530360Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.Type: GrantFiled: January 25, 2011Date of Patent: September 10, 2013Assignee: Texas Instruments IncorporatedInventor: Abram M. Castro
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Patent number: 8133761Abstract: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.Type: GrantFiled: June 17, 2009Date of Patent: March 13, 2012Assignee: Texas Instruments IncorporatedInventors: Mark A Gerber, Kurt P Wachtler, Abram M. Castro
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Publication number: 20110143502Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.Type: ApplicationFiled: January 25, 2011Publication date: June 16, 2011Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Abram M. CASTRO
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Patent number: 7898083Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.Type: GrantFiled: January 29, 2009Date of Patent: March 1, 2011Assignee: Texas Instruments IncorporatedInventor: Abram M Castro
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Publication number: 20100193944Abstract: A semiconductor chip (102) assembled on a substrate (101). The substrate has a first surface (101a) including conductive traces (110), which have a first length (111) and a first width (112), the first width being uniform along the first length, and further a pitch (114) to respective adjacent traces. The semiconductor chip has a second surface (102a) including contact pads (121); the second surface faces the first surface spaced apart by a gap (130). A conductive pillar (140) contacts each contact pad; the pillar includes a metal core (141) and a solder body (142), which connects the core to the respective trace across the gap. The pillar core (141) has an oblong cross section of a second width (151) and a second length (152) greater than the second width. Trace pitch (141) is equal to or smaller than twice the second width (151). The trace pitch is equal to or smaller than the second length (152).Type: ApplicationFiled: July 15, 2009Publication date: August 5, 2010Applicant: Texas Instrument IncorporatedInventors: Abram M. CASTRO, Mark A. GERBER
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Publication number: 20100148374Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.Type: ApplicationFiled: January 29, 2009Publication date: June 17, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Abram M. CASTRO