Patents by Inventor Adam George

Adam George has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10503623
    Abstract: Methods and systems for monitoring containerized applications are disclosed herein. In one aspect, a containerized application that includes application program instructions and application runtime environment components is installed within an application server. An application manager determines an operational configuration of the containerized application within the application server. The application manager determines a monitor container image based, at least in part, on the determined operational configuration and an application container image of the containerized application. The application manager installs the monitor container image as a containerized monitor application that includes monitor program instructions and monitor runtime environment components that operate as a distinct execution unit managed by the same virtualization engine and the operating system kernel that manage runtime processes of the containerized application.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 10, 2019
    Assignee: CA, Inc.
    Inventor: Adam George Keller
  • Patent number: 10289417
    Abstract: A data processing apparatus contains branch prediction circuitry including a micro branch target buffer, a full branch target buffer and a global history buffer. The branch target buffer entries contain history data which indicates whether or not a number of the following blocks of program instructions, subsequent to and sequential to a block of program instruction identified by that branch target buffer entry containing a branch instruction, do themselves contain any branch instructions. If the history data indicates that the following blocks of program instructions do not contain branches, then the operation of the branch prediction circuitry is suppressed for these following blocks of program instructions so as to save energy.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 14, 2019
    Assignee: ARM Limited
    Inventors: Michael Alan Filippo, Matthew Paul Elwood, Umar Farooq, Adam George
  • Patent number: 10268581
    Abstract: A cache hierarchy and a method of operating the cache hierarchy are disclosed. The cache hierarchy comprises a first cache level comprising an instruction cache, and predecoding circuitry to perform a predecoding operation on instructions having a first encoding format retrieved from memory to generate predecoded instructions having a second encoding format for storage in the instruction cache. The cache hierarchy further comprises a second cache level comprising a cache and the first cache level instruction cache comprises cache control circuitry to control an eviction procedure for the instruction cache in which a predecoded instruction having the second encoding format which is evicted from the instruction cache is stored at the second cache level in the second encoding format. This enables the latency and power cost of the predecoding operation to be avoided when the predecoded instruction is then retrieved from the second cache level for storage in the first level instruction cache again.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: April 23, 2019
    Assignee: ARM Limited
    Inventors: Michael Filippo, Klas Magnus Bruce, Vasu Kudaravalli, Adam George, Muhammad Umar Farooq, Joseph Michael Pusdesris
  • Patent number: 10221992
    Abstract: A tool holder. The tool holder is mounted to a platform (9) and comprises a plurality of legs (1) extending from respective positions on the platform (9) for connecting the platform (9) to respective positions on the workpiece. Each leg (1) has a first joint system (8a) at its platform end allowing each leg (1) to pivot relative to the platform (9). Each first joint system (8a) has an actuator arrangement (34) having a first operating mode in which the actuator arrangement (34) is configured to apply a load to move the respective leg (1), and a second operating mode in which the actuator arrangement (34) is configured to allow free movement of the respective leg (1).
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 5, 2019
    Inventors: Adam George Antrum Rushworth, Dragos Aurelian Axinte, John Marcus Allen, James Kell, Ralph Graham Anderson
  • Patent number: 10176104
    Abstract: An apparatus comprises processing circuitry, an instruction cache, decoding circuitry to decode program instructions fetched from the cache to generate macro-operations to be processed by the processing circuitry, and predecoding circuitry to perform a predecoding operation on a block of program instructions fetched from a data store to generate predecode information to be stored to the cache with the block of instructions. In one example the predecoding operation comprises generating information on how many macro-operations are to generated by the decoding circuitry for a group of one or more program instructions. In another example the predecoding operation comprises generating information indicating whether at least one of a given subset of program instructions within the prefetched block is a branch instruction.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: January 8, 2019
    Assignee: ARM Limited
    Inventors: Vasu Kudaravalli, Matthew Paul Elwood, Adam George, Muhammad Umar Farooq, Michael Filippo
  • Publication number: 20180293166
    Abstract: A cache hierarchy and a method of operating the cache hierarchy are disclosed. The cache hierarchy comprises a first cache level comprising an instruction cache, and predecoding circuitry to perform a predecoding operation on instructions having a first encoding format retrieved from memory to generate predecoded instructions having a second encoding format for storage in the instruction cache. The cache hierarchy further comprises a second cache level comprising a cache and the first cache level instruction cache comprises cache control circuitry to control an eviction procedure for the instruction cache in which a predecoded instruction having the second encoding format which is evicted from the instruction cache is stored at the second cache level in the second encoding format. This enables the latency and power cost of the predecoding operation to be avoided when the predecoded instruction is then retrieved from the second cache level for storage in the first level instruction cache again.
    Type: Application
    Filed: April 5, 2017
    Publication date: October 11, 2018
    Inventors: Michael FILIPPO, Klas Magnus BRUCE, Vasu KUDARAVALLI, Adam GEORGE, Muhammad Umar FAROOQ, Joseph Michael PUSDESRIS
  • Publication number: 20180196685
    Abstract: To effectively manage virtualized components, a virtual network manager aggregates components into entities and maintains an entity inventory that indicates available resources within a virtual network. However, aggregating components into entities and managing the entity inventory as components come on/offline can be computationally intensive. To reduce computation time and improve consistency, the virtual network manager uses a key service that associates components with entity keys. When a component is again instantiated within a virtual network, the virtual network manager passes an identifier for the component to the key service to retrieve an associated entity key. The virtual network manager then uses the entity key to quickly determine an entity that comprises the component and updates a record of the entity in the entity inventory with the component's data.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 12, 2018
    Inventors: Charles Abraham Dorr, Garry Dean Gerossie, JR., Adam George Keller
  • Publication number: 20180196687
    Abstract: Communication between virtual and physical management tools can be hindered as new features or data are added to virtual network management tools which are incompatible with older versions of traditional network management software. To maintain compatibility with older software, a virtual network manager stores version compatibility numbers for data within an entity inventory. The entity inventory indicates active entities in a virtual network. When another management tool communicates with the virtual network manager, the management tool can register with a software version number or include a version number in a data request. The virtual network manager uses the version number to retrieve compatible data from the entity inventory and generate compatible entity models. The entity models may include more or less data and be formatted differently based on the version number received.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 12, 2018
    Inventors: Charles Abraham Dorr, Garry Dean Gerossie, JR., Adam George Keller
  • Publication number: 20180123900
    Abstract: A scenario is parsed to determine a set of declarations that define creation of a simulated network having a plurality of network elements, wherein the set of declarations define a type and a quantity for each of the plurality of network elements and defines at least one technology type for a plurality of mock inventory messages to be output from a network simulation of the simulated network. Normalized versions of the plurality of network elements are created based on the type and the quantity defined by the set of declarations. The network simulation of the simulated network is executed and includes outputting the plurality of mock inventory messages that include attributes and status of the plurality of network element from a perspective of the at least one technology type.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Charles Abraham Dorr, Adam George Keller
  • Publication number: 20180123899
    Abstract: A simulated network comprised of a plurality of network elements is created. For each network element of the plurality of network elements, a normalized version of the network element is created. A different network element already in the simulated network to which the network element is to be connected is determined. The network element is mapped to the different network element. The normalized version of the network element is stored into a first normalized inventory. A network simulation of the simulated network is executed, wherein executing the network simulation comprises outputting a plurality of messages. A message of the plurality of messages comprises a quantity and attributes of a set of network elements of the plurality of network elements having network element type that is the same, wherein the attributes of the set of network elements are from a technology-specific perspective.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Charles Abraham Dorr, Garry Dean Gerossie, JR., Adam George Keller, Adam Donald Lowe
  • Publication number: 20180095752
    Abstract: An apparatus comprises processing circuitry, an instruction cache, decoding circuitry to decode program instructions fetched from the cache to generate macro-operations to be processed by the processing circuitry, and predecoding circuitry to perform a predecoding operation on a block of program instructions fetched from a data store to generate predecode information to be stored to the cache with the block of instructions. In one example the predecoding operation comprises generating information on how many macro-operations are to generated by the decoding circuitry for a group of one or more program instructions. In another example the predecoding operation comprises generating information indicating whether at least one of a given subset of program instructions within the prefetched block is a branch instruction.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Vasu KUDARAVALLI, Matthew Paul ELWOOD, Adam GEORGE, Muhammad Umar FAROOQ, Michael FILIPPO
  • Publication number: 20170315795
    Abstract: Methods and systems for monitoring containerized applications are disclosed herein. In one aspect, a containerized application that includes application program instructions and application runtime environment components is installed within an application server. An application manager determines an operational configuration of the containerized application within the application server. The application manager determines a monitor container image based, at least in part, on the determined operational configuration and an application container image of the containerized application. The application manager installs the monitor container image as a containerized monitor application that includes monitor program instructions and monitor runtime environment components that operate as a distinct execution unit managed by the same virtualization engine and the operating system kernel that manage runtime processes of the containerized application.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventor: Adam George Keller
  • Publication number: 20170163506
    Abstract: Notification of an event related to a performance degradation in a network node of a plurality of network nodes in a network is received. The notification is forwarded to a client device. Cache priming is performed based, at least in part, on a network graph that defines connectivity among at least some of the plurality of network nodes. Cache priming includes determining a set of impacted network nodes of the plurality of network nodes that is impacted by the performance degradation based on the connectivity defined by the network graph. Cache priming includes reducing the set of impacted network nodes to a subset of the impacted network nodes. Cache priming also includes retrieving from a persistent data storage device, data defining the subset of the impacted network nodes and storing the data defining the subset of the impacted network nodes in a memory.
    Type: Application
    Filed: December 4, 2015
    Publication date: June 8, 2017
    Inventor: Adam George Keller
  • Publication number: 20160110202
    Abstract: A data processing apparatus 2 contains branch prediction circuitry 10 including a micro branch target buffer 28, a full branch target buffer 30 and a global history buffer 32. The branch target buffer entries 40 contain history data 42, 44 which indicates whether or not a number of the following blocks of program instructions, subsequent to and sequential to a block of program instruction identified by that branch target buffer entry containing a branch instruction, do themselves contain any branch instructions. If the history data 42, 44 indicates that the following blocks of program instructions do not contain branches, then the operation of the branch prediction circuitry 28, 30, 32 is suppressed for these following blocks of program instructions so as to save energy.
    Type: Application
    Filed: October 21, 2014
    Publication date: April 21, 2016
    Inventors: Michael Alan FILIPPO, Matthew Paul ELWOOD, Umar FAROOQ, Adam GEORGE
  • Patent number: 9025057
    Abstract: An apparatus, method, and other embodiments associated with performing interpolations to compute gain values that correct for varying spatial intensity are described. In one embodiment, a method includes determining, by an apparatus that processes image data, a gain value for a pixel in the image data for which there is no gain value available in the apparatus, by interpolating related gain values associated with corners of a rectangle bounding the pixel, wherein the interpolating includes determining at least two partial coefficients by interpolating pairs of the related gain values. Noise is filtered from the image data using a noise threshold, and the noise threshold is modified by using the at least two partial coefficients. The method also applies the gain value to the pixel in the image data.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: May 5, 2015
    Assignee: Marvell International Ltd.
    Inventors: Adam George, Bradley C. Aldrich, Ping-Sing Tsai
  • Patent number: 9019392
    Abstract: An image capture system including a statistics module. An image processing module is configured to receive image data corresponding to a plurality of pixels of a captured image, wherein the image data includes respective locations of each of the plurality of pixels, and implement an image processing pipeline configured to modified image data. The statistics module is configured to gather a plurality of sets of statistics using the image data and the modified image data, each of the sets of statistics corresponding to a different one of a plurality of zones within the captured image. To gather the statistics, the statistics module is further configured to determine, based on the respective location of a first pixel, a first zone of the plurality of zones that the first pixel is located in, and store data in a corresponding set of statistics for the first pixel based on the determined first zone.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: April 28, 2015
    Assignee: Marvell International Ltd.
    Inventors: Bradley C. Aldrich, Adam George, Matthew P. Wingert, Hongxin Li
  • Publication number: 20140263883
    Abstract: A tool holder. The tool holder is mounted to a platform (9) and comprises a plurality of legs (1) extending from respective positions on the platform (9) for connecting the platform (9) to respective positions on the workpiece. Each leg (1) has a first joint system (8a) at its platform end allowing each leg (1) to pivot relative to the platform (9). Each first joint system (8a) has an actuator arrangement (34) having a first operating mode in which the actuator arrangement (34) is configured to apply a load to move the respective leg (1), and a second operating mode in which the actuator arrangement (34) is configured to allow free movement of the respective leg (1).
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Inventors: Adam George Antrum RUSHWORTH, Dragos Aurelian AXINTE, John Marcus ALLEN, James KELL, Mark Hugh RAFFLES
  • Patent number: 8810680
    Abstract: A method of synthesizing color data through the use of what is called a Gradient Vector Synthesis method is comprised of calculating gradients at 0°, 45°, 90°, and 135° with respect to a generation point in a matrix of color data. A first-level edge test is performed by comparing each of the gradients to a noise threshold. If the first-level test indicates that an edge may be present along either of the diagonals, a second-level test may be performed. An interpolation technique is selected in response to the first-level edge test and, when performed, the second-level edge test. The selected interpolation technique is used to synthesize the missing color data at the generation point.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: August 19, 2014
    Assignee: Marvell International Ltd.
    Inventors: Bradley C. Aldrich, Thomas Hartin, Adam George
  • Patent number: 8704908
    Abstract: A system includes a block module, a zone module, a statistics module, and a control module. The block module is configured to associate pixel values generated by pixel sensors of an image sensor with M regions. The zone module is configured to define N zones in the M regions. Each of the N zones includes an adjustable number of the M regions. N and M are integers greater than one and N is less than or equal to M. The statistics module is configured to gather statistics corresponding to the N zones. The control module is configured to adjust pixel values generated by the pixel sensors based on the statistics.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: April 22, 2014
    Assignee: Marvell International Ltd.
    Inventors: Bradley C. Aldrich, Adam George, Matthew P. Wingert, Hongxin Li
  • Patent number: 8655058
    Abstract: A system and method of adaptive edge detection and noise reduction in an image where edge information is detected for each color component of each pixel, whether sensed or synthesized. In some embodiments, the filter applied to a selected non-edge pixel may be determined by the ultimate size of a region around the selected pixel, where the size of the region may be increased if a count of the non-edge pixels in the region is less than a threshold value.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: February 18, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Bradley C. Aldrich, Ping-Sing Tsai, Adam George