Abstract: An area saving dielectrically isolated semiconductor structure is disclosed which allows for the merger of a plurality of active devices, which share a common terminal, in a single dielectrically isolated (DI) island, or tub. In particular, an isolation groove is formed in the bottom of the DI tub and extends upwards toward the top surface of the semiconductor structure. The common diffusion region associated with the common terminal is located in the DI tub directly over the isolation groove. The isolation groove and common diffusion region thus separate the single DI tub into isolated sections, where a separate active device can be formed in each section. Isolation is achieved through the interaction of the groove with the common diffusion region to "pinch off" the conductive channel between devices in the DI tub. In a preferred embodiment, an inverted V-shaped isolation groove is utilized so as not to complicate the fabrication process.

Abstract: A solid-state relay is combined with a control circuit to form a switch which is bilateral and linear through the origin, can withstand large current or voltage surges, and can be toggled either electrically or optically. The relay portion comprises either a pair of or two subsets of DMOS transistors, and the pair of transistors or selected ones of each subset cooperate to form a pair of oppositely poled thyristors. The control circuit provides well regulated turn-on and turn-off of the relay and provides good immunity against high voltage transients on the switch's main terminals. The control circuit also serves to limit the maximum voltage that is applied to the gate oxides of the transistors.

Abstract: High-speed p-i-n and avalanche photodetectors (photodiodes) use a heavily doped buried layer to greatly limit minority carriers generated by incident light in the buried layers and the substrates of the devices from reaching the cathodes and thus enhances response time while substantially decreasing dark current. A p-i-n diode of this type with a 1.1 square millimeter active area can operate with 4 volt reverse bias and is capable of having edge rise and fall times in the 4 nanosecond range.

Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body, an n+ type cathode region located at the other end, and an n+ type gate region located between the anode and cathode regions. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.

Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body having a major surface and being separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body and having a portion which is common with the major surface, an n+ type cathode region located at the other end and having a portion which is common with the major surface, and an n+ type gate region having a portion which is common with the major surface and in one embodiment being located essentially between the anode and cathode regions and in another embodiment being located other than directly between the anode and cathode regions. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. An n+ type semiconductor layer is sandwiched between the semiconductor body and the dielectric layer.

Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body, an n+ type cathode region located at the other end. An n+ type gate region exists in a portion of the semiconductor body other than the portion which directly separates the anode and cathode regions. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.

Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first n type semiconductor body separated from a support member (semiconductor substrate) by a dielectric layer with a p+ type anode region located at one end of the semiconductor body, an n+ type cathode region located at the other end, and an n+ type gate region located between the anode and cathode regions. A second p type region of lower impurity concentration than the anode region surrounds the cathode region so as to separate it from the bulk portion of the semiconductor body. Separate low resistance electrical contacts are made to the anode, cathode, and gate regions and to the substrate. The switch is capable of switching from an "ON" and conducting state to an "OFF" (blocking) state by adjusting the potential of the gate region and without having to adjust the potential of the anode or cathode regions.

Abstract: A high voltage solid-state switch, which provides bidirectional blocking, consists of a first p- type semiconductor body on an n type semiconductor substrate. A p+ type anode region and an n+ type cathode region exist in portions of the semiconductor body. A second p type region of higher impurity concentration than the semiconductor body surrounds the cathode region. The anode region and second p type region are separated from each other by a portion of the semiconductor body. The semiconductor substrate, which acts as a gate, has an electrode connected thereto. Separate electrodes are connected to the anode and cathode regions.

Abstract: A radial type of high voltage solid-state switch is essentially a gated diode switch (GDS) with portions of the anode, cathode, shield, and gate regions being arc portions of concentric circles which have different radii. The arc length and radius of the arc portions of the anode are less than the corresponding parameters of the shield and cathode. This structure, which is denoted as a radial gated diode switch, RGDS, has lower on resistance than a standard GDS of the same area and distance between anode and shield regions.

Abstract: A semiconductor structure contains two interconnected gated diode switches in a common dielectrically isolated semiconductor tub. This structure functions as a bidirectional switch. A gate region physically located between the two switches provides electrical isolation to allow proper operation.

Abstract: Control circuitry used with the combination of a control switch (typically a gated diode switch GDS) which is coupled to a control (gate) terminal of a like load switch which consists essentially of first and second p-n-p transistors. The collector of the first p-n-p transistor is coupled to an anode of the control switch. The emitter of the first p-n-p transistor is coupled to the base of the second p-n-p transistor and to a control circuitry input terminal. The collector of the second p-n-p transistor is coupled to a gate terminal of the control switch. The control circuitry limits undesirable current flow into the load switch and has fewer components than commonly used control circuitry which performs a like function.

Abstract: An optically toggled bidirectional normally-on switch is provided with protection against bilateral voltage and bidirectional current surges by the inclusion of a pair of oppositely poled thyristors. One version uses a large junction-type field-effect transistor in its main path and a pair of smaller junction-type transistors in the subsidiary path. A photodiode array controls the gate voltage on each of the transistors and turns them off when illuminated. A control node in the subsidiary path is connected to the gates of the SCRs so that excess current in this path turns on the appropriately-poled thyristor to provide an additional shunt path for the current.

Abstract: To switch a first gated diode switch (GDS1) to the "OFF" state requires a voltage applied to the gate which is more positive than that of the anode or cathode and a sourcing of current into the gate of substantially the same order of magnitude as flows between the anode and cathode of the first switch. Control circuitry, which uses a second gated diode switch (GDSC) coupled by the cathode to the gate of the first switch (GDS1), is used to control the state of the first switch (GDS1). The control circuitry comprises a first branch circuit coupled to the gate of GDSC and to a first potential source +V1 and a second branch circuit coupled to the anode of GDSC and to a second potential source V2. The first branch circuit is connected to the gate of the second switch (GDSC) and controls the state thereof. The second branch circuit helps switch the first switch to the OFF state by providing a single current pulse or a plurality of current pulses into the gate of the first switch.

Abstract: A solid-state protector circuit utilizes the combination of two zener diodes (Z1, Z2), a resistor (R1), a capacitor (C1), and a gated diode switch (GDS) to facilitate the rapid discharge of high voltage transients.

Abstract: A solid-state protector circuit utilizes the combination of two zener diodes (Z1, Z2), a resistor (R1), a capacitor (C1), and a gated diode switch (GDS) to facilitate the rapid discharge of high voltage transients.

Abstract: A structure for achieving closely spaced high voltage devices in integrated circuits. The devices are formed in single crystalline tubs (11) in a polycrystalline substrate (10). In order to prevent the potential of the substrate from causing breakdown of the devices, there is included between the single crystalline tubs and the polycrystalline substrate a semi-insulating layer (13) which has trapping states capable of taking on charge from the single crystalline region. The shielding provided by the semi-insulating layer permits the surface regions of the device to be made closer to the polycrystalline substrate and the tubs to be made more shallow.

Abstract: Integrated circuit complementary transistors for high voltage switching applications are fabricated in separate dielectrically-isolated pockets (12), (14) of high resistivity silicon, supported in a conductive medium (11) such as polycrystalline silicon, using surface adjacent conductivity type zones constituting emitter (19), (23), base (16), (20) and collector zones (17), (21). In one embodiment using high resistivity (75-300 ohm cm) silicon, referred to as .pi. material, for the material of the pocket, one transistor is a PN.pi.P device, and the other is an NP.pi.N. In the PN.pi.P the reverse-biased base-collector pn junction is the interface between the N base zone (16) and the .pi. portion (12) of the collector zone. In the NP.pi.N transistor the base-collector junction is the interface between the lightly doped .pi. extension (14) of the base zone (20) and the N collector zone (21). A connection (32) is provided to the conductive substrate to enable application of a suitable potential thereto.

Abstract: Disclosed is a monolithic transistor circuit for high voltage applications. A high impedance bleed resistor is effectively provided across the emitter-base junction of one of the transistors. This is accomplished by placing the base regions of this and another transistor at a selected distance apart so that the zero bias depletion regions of the bases overlap to produce a punch through condition resulting in a desired current density therebetween when an external bias is supplied. The devices thus produced have a high current carrying capacity with low leakage currents.

Abstract: Disclosed are dielectrically isolated high voltage planar devices and methods of fabricating such devices. The devices are designed so that the large electric fields at the junction edges are significantly reduced; thereby permitting a closely packed structure. This concept may be achieved by forming narrow grooves at the junctions and filling with a thermally grown oxide. In a preferred embodiment, the surface of the devices lies in the (110) plane so that the walls of the grooves are perpendicular thereto in the (111) plane. Fabrication includes bonding the semiconductor wafer to a substrate with an oxide layer therebetween and forming grooves through the wafer to the oxide layer for isolation from device to device.

Abstract: A semiconductor junction-isolated PNPN crosspoint switch array has a plurality of crosspoint switches that are each formed of four regions of alternating conductivity type in a semiconductor substrate. Low enough leakage to allow the crosspoint switch array to be used in large telephone switching systems is achieved by proper selection of the thickness of the semiconductor regions and by appropriate gold doping thereof.