Abstract: A method and system detection of inherent noise present within a video source prior to digital video compression is disclosed. A noise image is extracted by subtracting a current image from its filtered version. Each pixel of the extracted noise image is normalized based on a determined principal edge image and the analog noise pixels are accumulated to generate an intermediate noise confidence value. Analog noise may be detected based on an analog noise confidence value generated based on the intermediate noise confidence value and a ringing metric, a blockiness metric, a motion vector cost of the current image, a blurriness exception weight, a flashiness exception weight, and a pan blur exception weight. The method may further comprise detection of high frequency noise based on determining a high frequency noise confidence value that may be based on a high frequency noise value and a frequency component with highest magnitude.

Abstract: Embodiments for video content source resolution detection are provided. Embodiments enable systems and methods that measure video content source resolution and that provide image-by-image source scale factor measurements to picture quality (PQ) processing modules. With the source scale factor information, PQ processing modules can be adapted dynamically (on a picture-by-picture basis) according to the source scale factor information for better picture quality enhancement. In addition, embodiments provide source resolution detection that is minimally affected by video coding artifacts and superimposed content (e.g., graphics).

Abstract: Embodiments for video content source resolution detection are provided. Embodiments enable systems and methods that measure video content source resolution and that provide image-by-image source scale factor measurements to picture quality (PQ) processing modules. With the source scale factor information, PQ processing modules can be adapted dynamically (on a picture-by-picture basis) according to the source scale factor information for better picture quality enhancement. In addition, embodiments provide source resolution detection that is minimally affected by video coding artifacts and superimposed content (e.g., graphics).

Abstract: Embodiments for video content source resolution detection are provided. Embodiments enable systems and methods that measure video content source resolution and that provide image-by-image source scale factor measurements to picture quality (PQ) processing modules. With the source scale factor information. PQ processing modules can be adapted dynamically (on a picture-by-picture basis) according to the source scale factor information for better picture quality enhancement. In addition, embodiments provide source resolution detection that is minimally affected by video coding artifacts and superimposed content (e.g., graphics).

Abstract: In a method of automatically identifying a format of a video signal, where the video signal includes HSync pulses, VSync pulses, and video display data, the video signal is received, information about timing and width characteristics of the HSync pulses and the VSync pulses is extracted from the video signal, and the format of the video signal is determined based on the extracted information.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method is disclosed herein, which may include receiving a video signal after a computer system is reset, automatically determining that an actual timing relation between the active video data and the synchronization pulse data deviates from the nominal relation by more than a tolerance value, and adjusting the actual timing relation to fall within the tolerance value. The video signal may include active video data and synchronization pulse data. A video format may define a nominal timing relation between the active video data and the synchronization pulse data.

Abstract: A method and apparatus extract information from a burst cutting area (BCA) of a recording medium. The BCA extraction includes (a) receiving a signal from the recording medium, the signal including BCA data read from the BCA, the BCA data being represented by channel symbols, (b) analog-to-digital (A/D) sampling the signal to generate input data, (c) identifying a BCA region within the input data, the BCA region corresponding to the BCA data, (d) determining an average channel symbol width of the BCA data, the average channel symbol width corresponding to an average number of A/D samples per channel symbol in the BCA data, (e) increasing a signal-to-noise ratio (SNR) of the BCA data using the average channel symbol width, (f) generating a channel pattern data from the BCA data using a selected threshold value, and (g) generating a channel symbol data from the channel pattern data using the average channel symbol width.

Abstract: In a method of automatically identifying a format of a video signal, where the video signal includes HSync pulses, VSync pulses, and video display data, the video signal is received, information about timing and width characteristics of the HSync pulses and the VSync pulses is extracted from the video signal, and the format of the video signal is determined based on the extracted information.

Abstract: A method and apparatus extract information from a burst cutting area (BCA) of a recording medium. The BCA extraction includes (a) receiving a signal from the recording medium, the signal including BCA data read from the BCA, the BCA data being represented by channel symbols, (b) analog-to-digital (A/D) sampling the signal to generate input data, (c) identifying a BCA region within the input data, the BCA region corresponding to the BCA data, (d) determining an average channel symbol width of the BCA data, the average channel symbol width corresponding to an average number of A/D samples per channel symbol in the BCA data, (e) increasing a signal-to-noise ratio (SNR) of the BCA data using the average channel symbol width, (f) generating a channel pattern data from the BCA data using a selected threshold value, and (g) generating a channel symbol data from the channel pattern data using the average channel symbol width.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method for decoding an encoded signal. A first step generates a plurality of first precision state metrics for a decoder trellis in response to a plurality of first precision branch metrics. A second step generates a plurality of second precision state metrics for a selected subset of the first precision state metrics in response to a plurality of second precision branch metrics. A third step replaces the selected subset of first precision state metrics with the second precision state metrics. A fourth step stores the first precision state metrics and the second precision state metrics.

Abstract: A method for optimizing an algorithm specified for implementation on an integrated circuit for a specified application. The algorithm is analyzed with respect to its performance, and estimates of implementation area and speed are calculated. Specifically, the degrees of freedom for the algorithm alternations under specific targeted implementation objective functions and constraints are identified. The algorithm solution space is then searched to identify the algorithm structure that is best suited for the specified design goals and constraints. Algorithm parameters which satisfy performance metrics and can be implemented with minimum silicon area are identified.

Abstract: The method of the present invention decodes a received symbol that represents data bits including message bits and parity-check bits. The method comprises (a) mapping the symbol onto a received signal point in a signal space, the signal point having an in-phase component (I) and a quadrature phase component (Q) in the signal space; (b) computing reliability information for each data bit, the reliability information associated with a distance di={square root over ((I−Ii)2+(Q−Qi)2)} between the received signal point (I, Q) and a reference constellation point (Ii, Qi) in the signal space, where i=0, 1, . . .

Abstract: An apparatus comprising a memory, a write pointer, a read pointer and a control circuit. The memory may have a plurality of memory locations accessed by a plurality of addresses. The write pointer may be configured to write data to the memory in response to a sequence of write addresses generated in response to a first control signal. The read pointer may be configured to read data from the memory in response to a sequence of read addresses generated in response to a second control signal. The control circuit may be configured to generate (i) the first control signal, and (ii) the second control signal. The order data is read from said memory may comprise a de-interleaved pattern with respect to the order the data is written to the memory.

Abstract: A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

Abstract: A method for decoding an encoded signal. The method generally comprises the steps of (A) generating a plurality of first precision state metrics for a decoder trellis in response to a plurality of first precision branch metrics, (B) generating a plurality of second precision state metrics for a selected subset of the first precision state metrics in response to a plurality of second precision branch metrics, (C) replacing the selected subset of first precision state metrics with the second precision state metrics, and (D) storing the first precision state metrics and the second precision state metrics.