Abstract: An electronic device may include a printed circuit board having a physically unclonable function (PUF) source. The electronic device may also include an integrated circuit (IC) chip positioned on the printed circuit board, and the first PUF source may be embedded in or formed on the printed circuit board external to the IC chip. The IC chip has processing circuitry that is configured to determine PUF data based on the PUF source. The processing circuitry is further configured to determine a cryptographic key or authentication token based on the PUF data and to perform at least one secure operation using the cryptographic key or authentication token.

Abstract: A payment processing device can implement a monitoring system to detect for tamper attempts at a chip card interface. The monitoring system can establish a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card 14 is present in the slot 21. During subsequent evaluations of the chip card interface by the monitoring system, a response received by the monitoring system that deviates from the baseline can indicate that a tamper attempt at the chip card interface may have occurred. If a tamper attempt is determined by the monitoring system, a remedial or corrective action can be taken.

Abstract: A payment processing device can implement a monitoring system to detect for tamper attempts at a chip card interface. The monitoring system can establish a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card 14 is present in the slot 21. During subsequent evaluations of the chip card interface by the monitoring system, a response received by the monitoring system that deviates from the baseline can indicate that a tamper attempt at the chip card interface may have occurred. If a tamper attempt is determined by the monitoring system, a remedial or corrective action can be taken.

Abstract: An electronic device may include a printed circuit board having a physically unclonable function (PUF) source. The electronic device may also include an integrated circuit (IC) chip positioned on the printed circuit board, and the first PUF source may be embedded in or formed on the printed circuit board external to the IC chip. The IC chip has processing circuitry that is configured to determine PUF data based on the PUF source. The processing circuitry is further configured to determine a cryptographic key or authentication token based on the PUF data and to perform at least one secure operation using the cryptographic key or authentication token.

Abstract: A device may run an application having information with multiple accounts associated with processing of transactions. The application may provide account information that is used to process the transactions. At the same time, a background application may operate on the device. The background application may be compatible with a second device, and when within range of the second device, may communicate background messages relevant to the transaction. The transaction may then be processed based on the account information and the background messages.

Abstract: A payment terminal can have an integrated memory scanning system that has direct access to the memory of the payment terminal. By having direct access to the memory of the payment terminal, the memory scanning system can access information about the operating system and the applications of the payment terminal to determine if the operating system or applications are performing unauthorized or forbidden actions, which may indicate that a fraudulent transaction or tamper attempt is occurring at the payment terminal. The memory scanning system can determine if an unauthorized action is occurring by comparing the information regarding the operating system or applications obtained from the memory to test criteria stored by the memory scanning system. In addition, the memory scanning system can also have a direct communications with a payment server using information from a network stack in memory that can be accessed directly by the memory scanning system.

Abstract: A point of sale system has a display for receiving touch inputs, a controller to receive the touch inputs from the display, and a secure controller to receive touch input data from the controller. The system also has a card interface module and a contactless interface module to provide encrypted data to the secure controller. The secure controller can operate in either a secure mode or a non-secure mode. When a non-secure mode is engaged, the secure controller provides the touch input data to a processor. When a secure mode is engaged, the secure controller blocks at least a portion of the touch input data from the processor.

Abstract: A transaction device includes circuitry that provides a power supply to a processor of the transaction device. Attackers may attempt to glitch the processor power supply in a manner that causes processor to operate incorrectly such as by skipping instructions. A monitoring circuit may be coupled to the processor power supply circuitry to identify conditions that are indicative of a glitch attempt. Glitch attempts may be stored in a memory and reported to the processor to induce the execution of counter-measures.

Abstract: A payment terminal has a clock management unit for providing clock signals to components of the payment terminal. The payment terminal also has a wireless communication interface for communicating wireless signals. A processing unit of the payment terminal may monitor operation of a wireless communication interface of the payment terminal and, when the payment terminal is communicating wirelessly, modify an initial clock signal provided to one or more components of the payment terminal that emit RF noise to modify a frequency at which the RF noise occurs. When the payment terminal is no longer transmitting, the processing unit may provide the initial clock signal to the RF noise source.

Abstract: An electronic device may include a printed circuit board having a physically unclonable function (PUF) source. The electronic device may also include an integrated circuit (IC) chip positioned on the printed circuit board, and the first PUF source may be embedded in or formed on the printed circuit board external to the IC chip. The IC chip has processing circuitry that is configured to determine PUF data based on the PUF source. The processing circuitry is further configured to determine a cryptographic key or authentication token based on the PUF data and to perform at least one secure operation using the cryptographic key or authentication token.

Abstract: A payment processing device can implement a monitoring system to detect for tamper attempts at a physical interface such as a chip card interface. The monitoring system can establish local tamper criteria including a baseline when no chip card is present in the chip card interface, or in some embodiments, when it is known that an authentic chip card is present in the slot. During subsequent evaluations of the chip card interface by the monitoring system, a response received by the monitoring system that deviates from the local test criteria can indicate that a tamper attempt at the chip card interface may have occurred. The payment processing device may also communicate test results to a server for further testing, or for an update of the local test criteria.

Abstract: A payment reader includes a tuning circuit that provides a tuned transmission source signal to an antenna for transmission. A sense circuit coupled to the antenna provides a measured transmitted signal to a binary phase detection circuit. The binary phase detection circuit filters and processes the signal to provide an analog phase signal that corresponds to a phase difference between the measured transmitted signal and the transmission source signal. A comparison circuit compares the analog phase signal to a reference signal, and a decision circuit adjusts the operation of the transmission circuitry based on the comparison.

Abstract: A multi-layer antenna for near-field communications can have a first layer on a top surface of flexible circuit board and a second layer on a bottom surface of the flexible circuit board. The first layer and the second layer can be connected in series by a through connection in the flexible circuit board. The first layer can incorporate a single loop in the shape of a rectangle and the second layer can incorporate a single loop in the shape of a rectangle. The second layer of the antenna can be vertically aligned with the first layer of the antenna and can have current flow in the same direction as the first layer to provide for an increased magnetic flux from the antenna.

Abstract: Processor system with a general purpose processor and a cryptographic processor dedicated to performing cryptographic operations and enforcing the security of critical security parameters. The cryptographic processor prevents exposure of critical security parameters outside the cryptographic processor itself, and instead implements a limited scripting engine, which can be used by the general purpose processor to execute operations that require the critical security parameters.

Abstract: A payment terminal can have an integrated memory scanning system that has direct access to the memory of the payment terminal. By having direct access to the memory of the payment terminal, the memory scanning system can access information about the operating system and the applications of the payment terminal to determine if the operating system or applications are performing unauthorized or forbidden actions, which may indicate that a fraudulent transaction or tamper attempt is occurring at the payment terminal. The memory scanning system can determine if an unauthorized action is occurring by comparing the information regarding the operating system or applications obtained from the memory to test criteria stored by the memory scanning system. In addition, the memory scanning system can also have a direct communications with a payment server using information from a network stack in memory that can be accessed directly by the memory scanning system.

Abstract: An expedited booting process with brownout detection for a payment reader is provided. The payment reader can execute a boot sequence from read only memory at startup. A check is made of a stored flag value to determine whether a value such as a flag indicates whether or not a prior execution of the boot sequence was successful. If the last execution of the boot sequence was successful, the boot sequence can be executed at a faster clock rate. Otherwise the boot sequence is executed at a slower clock rate. An evaluation can be made to determine whether a predetermined portion of the boot sequence has been surpassed. If the predetermined portion of the boot sequence has been surpassed, the flag value can be set to indicate a successful execution of the boot sequence and the general operating instructions for the payment reader are then executed.

Abstract: A device may include a physically unclonable function (PUF) source that has at least one fuse embedded in the device. The PUF source may be responsive to an input for transmitting a signal through the fuse and providing a PUF value based on a measurement of such signal. The device also has circuitry that is configured to modify the fuse by transmitting a signal of sufficiently high current or voltage through the fuse to change its resistance, thereby changing a response of the PUF source to the input.

Abstract: A transaction device includes a bootloader that a processing unit executes during device startup. The bootloader causes the processing unit to access values from a persistent memory that are relevant to whether a glitch has occurred on a power supply for the processing unit. Based on the values that are acquired from the persistent memory, the processing unit may implement countermeasures, such as disabling certain device operations or delaying the device booting process.

Abstract: A payment terminal has a clock management unit for providing clock signals to components of the payment terminal. The payment terminal also has a wireless communication interface for communicating wireless signals. A processing unit of the payment terminal may monitor clock signals provided by the clock management unit and determine a phase and frequency difference between a clock signal provided to a component producing RF noise and a clock signal provided to a wireless communication interface of the payment terminal. When RF noise present in the received wireless signal falls below a threshold, the processing unit may sample the received wireless signal.

Abstract: A payment terminal has a clock management unit for providing clock signals to components of the payment terminal. The payment terminal also has a wireless communication interface for communicating wireless signals. A processing unit of the payment terminal may monitor clock signals provided by the clock management unit and determine a phase and frequency difference between a clock signal provided to a component producing RF noise and a clock signal provided to a wireless communication interface of the payment terminal. When RF noise present in the received wireless signal falls below a threshold, the processing unit may sample the received wireless signal.