Patents by Inventor Ahmad Samih

Ahmad Samih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140173221
    Abstract: The present disclosure provides techniques for cache management. A data block may be received from an IO interface. After receiving the data block, the occupancy level of a cache memory may be determined. The data block may be directed to a main memory if the occupancy level exceeds a threshold. The data block may be directed to a cache memory if the occupancy level is below a threshold.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Inventors: Ahmad Samih, Ren Wang, Christian Maciocco, Sameh Gobriel, Tsung-Yuan Tai
  • Publication number: 20140173206
    Abstract: In an embodiment, a processor includes multiple tiles, each including a core and a tile cache hierarchy. This tile cache hierarchy includes a first level cache, a mid-level cache (MLC) and a last level cache (LLC), and each of these caches is private to the tile. A controller coupled to the tiles includes a cache power control logic to receive utilization information regarding the core and the tile cache hierarchy of a tile and to cause the LLC of the tile to be independently power gated, based at least in part on this information. Other embodiments are described and claimed.
    Type: Application
    Filed: March 5, 2013
    Publication date: June 19, 2014
    Inventors: Ren Wang, Ahmad Samih, Eric Delano, Pinkesh J. Shah, Zeshan A. Chishti, Christian Maciocco, Tsung-Yuan Charlie Tai
  • Publication number: 20140173207
    Abstract: In an embodiment, a processor includes multiple tiles, each including a core and a tile cache hierarchy. This tile cache hierarchy includes a first level cache, a mid-level cache (MLC) and a last level cache (LLC), and each of these caches is private to the tile. A controller coupled to the tiles includes a cache power control logic to receive utilization information regarding the core and the tile cache hierarchy of a tile and to cause the LLC of the tile to be independently power gated, based at least in part on this information. Other embodiments are described and claimed.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Inventors: Ren Wang, Ahmad Samih, Eric Delano, Pinkesh J. Shah, Zeshan A. Chishti, Christian Maciocco, Tsung-Yuan Charlie Tai
  • Publication number: 20140149766
    Abstract: A method and apparatus for selectively parking routers used for routing traffic in mesh interconnects. Various router parking (RP) algorithms are disclosed, including an aggressive RP algorithm where a minimum number of routers are kept active to ensure adequate network connectivity between active nodes and/or intercommunicating nodes, leading to a maximum reduction in static power consumption, and a conservative RP algorithm that favors network latency considerations over static power consumption while also reducing power. An adaptive RP algorithm is also disclosed that implements aspects of the aggressive and conservative RP algorithms to balance power consumption and latency considerations in response to ongoing node utilization and associated traffic. The techniques may be implemented in internal network structures, such as for single chip computers, as well as external network structures, such as computing clusters and massively parallel computer architectures.
    Type: Application
    Filed: January 10, 2012
    Publication date: May 29, 2014
    Inventors: Ahmad Samih, Ren Wang, Christian Maciocco, Tsung-Yuan C. Tai
  • Publication number: 20140092740
    Abstract: Methods and apparatus for provision of adaptive packet deflection to achieve fair, low-cost, and/or energy-efficient Quality of Service (QoS) in Network-on-Chip (NoC) devices are described. In some embodiments, it is determined whether a target port of a packet has reached a threshold utilization value and the packet is routed to an alternate port in response to a deflection probability value that is to be determined based on a utilization value of the target port and a priority level value of the packet. Other embodiments are also claimed and/or disclosed.
    Type: Application
    Filed: September 29, 2012
    Publication date: April 3, 2014
    Inventors: Ren Wang, Ahmad Samih, Christian Maciocco, Tsung-Yuan Tai
  • Publication number: 20140029617
    Abstract: Methods, apparatus and systems for improved performance and energy efficiency of software-based routers. A software router running on a host computer system employing multiple Network Interface Controllers (NICs) maintains a routing table wherein packet flows are classified as managed flows (MFs) under which packets are received at and forwarded from the same NIC and unmanaged flows UFs under which packets are received at and forwarded from different NICs. Forwarding table data is employed by a NIC to facilitate packet identification and flow classification operations under which the NIC determines whether a received packet is an MF, UF, or an unclassified flow. Under various schemes, packet forwarding for MFs is handled by the software router architecture such that either only the packet header is copied into memory in the host or the entire packet forwarding is handled by the NIC.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 30, 2014
    Inventors: Ren Wang, Jr-Shian Tsai, Maziar H. Manesh, Tsung-Yuan C. Tai, Ahmad Samih
  • Publication number: 20140007114
    Abstract: A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running on a first thread processor of the plurality, are monitored to both a first memory through a first memory controller and a second memory through a second memory controller. A second thread processor of the plurality is selected for a thread based on the monitoring of the memory accesses of the thread to both the first memory and the second memory. Installation of the thread, for which the second thread processor was selected, is initiated on the second thread processor. Other methods, apparatus, and systems are also disclosed.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Ren Wang, Ling Ma, Ahmad Samih, Zhaojuan Bian
  • Publication number: 20140006713
    Abstract: The present invention may provide a computer system including a plurality of tiles divided into multiple virtual domains. Each tile may include a router to communicate with others of said tiles, a private cache to store data, and a spill table to record pointers for data evicted from the private cache to a remote host, wherein the remote host and the respective tile are provided in the same virtual domain. The spill tables may allow for faster retrieval of previously evicted data because the home registry does not need to be referenced if requested data is listed in the spill table. Therefore, embodiments of the present invention may provide a distance-aware cache collaboration architecture without incurring extraneous overhead expenses.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Ahmad Ahmad SAMIH, Ren Wang, Christian Maciocco, Tsung-Yuan C. Tai
  • Publication number: 20130290546
    Abstract: A mechanism is described for facilitating dynamic and remote memory collaboration at computing devices according to one embodiment of the invention. A method of embodiments of the invention includes dynamically classifying a computing device of a plurality of computing devices as a memory server, where the plurality of computing devices are coupled to each other over a network. The method may further include offering, by the memory server, of memory to be used by one or more of the plurality of computing devices classified as one or more memory clients, and remotely granting, by the memory server, of the memory to the one or more memory clients.
    Type: Application
    Filed: October 7, 2011
    Publication date: October 31, 2013
    Inventors: Ahmad Samih, Ren Wang, Christian Maciocco, Tsung-Yuan C. Tai
  • Publication number: 20120198030
    Abstract: In one embodiment, the present invention includes a method for obtaining file information regarding a file to be downloaded from a remote location to a computing device, creating at least one empty file in a destination storage based on the file information and communicating block information regarding the empty file to a network interface, and receiving a data packet of the file in the network interface and directly sending a payload of the data packet from the network interface to the destination storage according to the block information, while a host processor of the computing device is in a low power state. Other embodiments are described and claimed.
    Type: Application
    Filed: December 22, 2011
    Publication date: August 2, 2012
    Inventors: Ren Wang, Christian Maciocco, Tsung-Yuan C. Tai, Ahmad Samih, Mona Vij, Arun Raghunath, John Keys, Scott Hahn, Raj Yavatkar