Abstract: An LED circuit board structure includes first color LEDs, second color LEDs, third color LEDs, a carrier board, first testing wires, first connecting wires, second testing wires and second connecting wires. Each of the first testing wire is located at the carrier board and electrically connects two first color LEDs in a pixel-front-side-pattern region in parallel. The first connecting wire electrically connects two first testing wires in adjacent two pixel-front-side-pattern regions. Each of the second testing wire is located at the carrier board and electrically connects two second color LEDs in a pixel-front-side-pattern region in parallel. The second connecting wire electrically connects two second testing wires in adjacent two pixel-front-side-pattern regions.

Abstract: A manufacturing method of a light-emitting diode package structure includes the steps as follows. A substrate is provided. At least one light-emitting diode and at least one dummy plug are arranged on the substrate in an arranging step. The light-emitting diode and the dummy plug are covered by the patternable material in a coating step. A portion of the light-emitting diode and a portion of the dummy plug are exposed in a patterning step. A conductive layer is in contact with and electrically connected to the light-emitting diode and the dummy plug in a deposition step. A protective layer is formed on the conductive layer in a protective layer forming step. The substrate is separated and a light-emitting diode package structure is formed in a releasing step. A material of the conductive layer includes an indium tin oxide material or a transparent conductive material.

Abstract: An encapsulation process method for wafer-level light-emitting diode dies is provided, in which a wafer structure having a plurality of light-emitting diode dies thereon is adhered to a temporary substrate, and by sequentially performing a laser cutting and a laser punch-through process, the light-emitting diode die turns to be conductive. Then, a transparent conductive film is sputtered thereon the die, and black matrix photoresist and quantum dot color filter are further disposed for performing a color conversion process. After that, the light-emitting diode dies are divided into package structures, and a glue removal process is used to separate the wafer structure from the temporary substrate, so that the wafer structure can be transferred to a target substrate. By employing the present invention, the conventional carrier board can be omitted, and the packaging yield of the vertical light emitting diode die packages is certainly optimized.

Abstract: A laser diode includes an original substrate having a substrate coefficient of thermal expansion, an epitaxy structure formed on the original substrate, and a composite multi-layer metal board disposed below the original substrate and at least including a first metal layer and a second metal layer. The first metal layer and the second metal layer are stacked, a material of the first metal layer is different from a material of the second metal layer, and the composite multi-layer metal board has a modified coefficient of thermal expansion. The original substrate has an initial thickness as the epitaxy structure is grown thereon, the original substrate is thinned to a combining thickness for attaching the composite multi-layer metal board, and the modified coefficient of thermal expansion of the composite multi-layer metal board is proximate to the substrate coefficient of thermal expansion.

Abstract: A via-filling method of a TGV substrate includes steps: filling a plurality of metal balls into a plurality of vias of the TGV substrate; using a heating process to melt the plurality of metal balls to form a liquid-state metal; and cooling down the liquid-state metal to form a solid-state metal inside the plurality of vias. Because the method needn't use solvents or fluxes, the solid-state metal inside the plurality of vias have better electric conductivity.

Abstract: A bonding and transferring method for die package structures is provided, including providing a die package structure which has a positioning adhesive disposed thereon, and providing a vibration base having at least one cavity corresponding to the positioning adhesive. By alignment of the positioning adhesive and the cavity, the die package structure can be positioned into the vibration base. A target substrate is further provided and bonded with the vibration base having the die package structure disposed thereon through a metal material. And a laser process is then performed to melt the metal material. At last, the vibration base and the positioning adhesive are removed so the die package structure is successfully bonded and transferred onto the target substrate. By employing the proposed process method of the present invention, rapid mass transfer result is accomplished, and the packaging yield of vertical light emitting diode die package structures is optimized.

Abstract: A vertical light emitting diode die packaging method is provided, including a plurality of following steps. At first, a plurality of drill hole is formed in a substrate and a first metal material is used to fill the drill holes. Next, disposing and fixing a plurality of vertical light emitting diode die on the substrate through a second metal material, and a transparent glue is used to cover thereon. A laser process is then employed to dissolve the transparent glue for forming ditches. And, a conductive liquid is applied to fill the ditches and an insulating glue is provided to embrace and encapsulate the vertical light emitting diode dies. By employing the packaging method of the present invention, the current external wire bonding process can be effectively replaced, thereby die size miniaturization as well as packaging yield of the vertical light emitting diode dies are believed to be optimized.

Abstract: An LED circuit board structure includes first color LEDs, second color LEDs, third color LEDs, a carrier board, first testing wires, first connecting wires, second testing wires and second connecting wires. Each of the first testing wire is located at the carrier board and electrically connects two first color LEDs in a pixel-front-side-pattern region in parallel. The first connecting wire electrically connects two first testing wires in adjacent two pixel-front-side-pattern regions. Each of the second testing wire is located at the carrier board and electrically connects two second color LEDs in a pixel-front-side-pattern region in parallel. The second connecting wire electrically connects two second testing wires in adjacent two pixel-front-side-pattern regions.

Abstract: An LED circuit board structure includes first color LEDs, second color LEDs, third color LEDs, integrated circuit chips, a carrier board, first P-type pads, first color pads, first testing wires and first connecting wires. One of the first P-type pads is disposed at a pixel-front-side-pattern region for mounting a first P-type electrode. One of the first color pads is disposed at the pixel-front-side-pattern region for mounting a first pin of the integrated circuit chip. The first color pad electrically connects to the first P-type pad. A first testing wire is disposed at the pixel-front-side-pattern region and extends from the first P-type pad or the first color pad. The first connecting wire electrically connects two first testing wires in adjacent two pixel-front-side-pattern regions in parallel.

Abstract: A magnetic LED die transferring device includes a substrate, a plurality of magnetic members and a vibrating mechanism. The substrate includes a plurality of die locating areas arranged in intervals, and each of the die locating areas includes a locating surface. Each of the magnetic members corresponds to each of the die locating areas and includes an alignment N-pole and an alignment S-pole. The vibrating mechanism is coupled to the substrate. The N-pole and the S-pole of each of the magnetic LED dice are used to be attracted by each of the alignment N-poles and each of the alignment S-poles, respectively, to allow each of the magnetic LED dice to be transferred and aligned to each of the die locating areas.

Abstract: A light-emitting diode packaging structure and a method for fabricating the same is disclosed. A semiconductor wafer is provided, which includes semiconductor substrates. Each semiconductor substrate is penetrated with a first through hole and three second through holes. An insulation layer is formed on the surface of each semiconductor substrate and the inner surfaces of the first through hole, the first sub-through hole, and the second sub-through hole. A patterned electrode layer is formed on the top surface of the semiconductor substrate. A conductive material covering the insulation layer is formed in the first through hole and the second through hole and electrically connected to the patterned electrode layer. Three light-emitting diodes are respectively formed in the first sub-through holes of the second through holes of each semiconductor substrate and respectively electrically connected to the conductive material within the second through holes.

Abstract: A method for fabricating a vertical light-emitting diode includes: providing a growth substrate, wherein an epitaxial layer is formed on the growth substrate; forming a metal combined substrate on the epitaxial layer, wherein the metal combined substrate comprises two first metal layers and a second metal layer therebetween, one of the first metal layers is close to the epitaxial layer, and another of the first metal layers is far away from the epitaxial layer; removing the growth substrate; forming a contact metal layer on the epitaxial layer; and removing the second metal layer and the first metal layer far away from the epitaxial layer and leaving the first metal layer close to the epitaxial layer. The vertical light-emitting diode, fabricated by the method, has a thinner thickness, a stronger mechanical strength, a higher light intensity, and a better heat-dissipating effect.

Abstract: The display device includes a substrate, a patterned wall, the first, second, third sub-pixels, and an optical layer. The patterned wall is disposed on the substrate and has a plurality of openings. The first sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer. The second sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer. The third sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer, wherein a first distance between a top surface of the light-emitting element and a top surface of the patterned wall is about 10 um to about 100 um. The optical layer is disposed on the patterned wall and in direct contact with at least one of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

Abstract: An alignment module and alignment method for transferring magnetic light-emitting die are provided, including a backplane having at least one cavity, a magnetic pull device and magnetic light-emitting die. The magnetic pull device is located below the cavity and disposed correspondingly to the cavity. The magnetic light-emitting die includes a magnetic metallic substrate and a peripheral electrode formed on the magnetic metallic substrate. The peripheral electrode is surrounding on the magnetic metallic substrate and formed adjacent to an inner edge of the magnetic metallic substrate. Depth of the cavity is designed as equal to a thickness of the magnetic metallic substrate such that the die is accommodated and aligning transferred to the backplane by using the cavity and magnetic pull device. By employing the proposed die alignment techniques, accurate alignment result is achieved and thereby the present invention is applied perfectly for industrial mass transfer technology.

Abstract: A light-emitting diode packaging structure and a method for fabricating the same is disclosed. A semiconductor wafer is provided, which includes semiconductor substrates. Each semiconductor substrate is penetrated with a first through hole and three second through holes. An insulation layer is formed on the surface of each semiconductor substrate and the inner surfaces of the first through hole, the first sub-through hole, and the second sub-through hole. A patterned electrode layer is formed on the top surface of the semiconductor substrate. A conductive material covering the insulation layer is formed in the first through hole and the second through hole and electrically connected to the patterned electrode layer. Three light-emitting diodes are respectively formed in the first sub-through holes of the second through holes of each semiconductor substrate and respectively electrically connected to the conductive material within the second through holes.

Abstract: An alignment module and alignment method for transferring magnetic light-emitting die are provided, including a backplane having at least one cavity, a magnetic pull device and magnetic light-emitting die. The magnetic pull device is located below the cavity and disposed correspondingly to the cavity. The magnetic light-emitting die includes a magnetic metallic substrate and a peripheral electrode formed on the magnetic metallic substrate. The peripheral electrode is surrounding on the magnetic metallic substrate and formed adjacent to an inner edge of the magnetic metallic substrate. Depth of the cavity is designed as equal to a thickness of the magnetic metallic substrate such that the die is accommodated and aligning transferred to the backplane by using the cavity and magnetic pull device. By employing the proposed die alignment techniques, accurate alignment result is achieved and thereby the present invention is applied perfectly for industrial mass transfer technology.

Abstract: The display device includes a substrate, a patterned wall, the first, second, third sub-pixels, and an optical layer. The patterned wall is disposed on the substrate and has a plurality of openings. The first sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer. The second sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer. The third sub-pixel is disposed in one of the openings and includes a light-emitting element and a wavelength conversion layer, wherein a first distance between a top surface of the light-emitting element and a top surface of the patterned wall is about 10 um to about 100 um. The optical layer is disposed on the patterned wall and in direct contact with at least one of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

Abstract: A non-volatile memory includes a back gate, a first graphene ribbon layer, a dielectric layer, a second graphene ribbon layer and a porous dielectric layer. The back gate is disposed in a substrate. The first graphene ribbon layer is disposed on the substrate. The dielectric layer covers the first graphene ribbon layer but exposes an exposed part of the first graphene ribbon layer. The second graphene ribbon layer including two end parts connected by a cantilever part is disposed above the first graphene ribbon layer, and the cantilever part is right above the exposed part of the first graphene ribbon layer. The porous dielectric layer is disposed on the dielectric layer and seals the cantilever part. The present invention also provides a method of forming said non-volatile memory.

Abstract: A manufacturing method of a metal-insulator-metal (MIM) capacitor structure includes the following steps. A bottom plate is formed. A first conductive layer is patterned to be the bottom plate, and the first conductive layer includes a metal element. An interface layer is formed on the first conductive layer by performing a nitrous oxide (N2O) treatment on a top surface of the first conductive layer. The interface layer includes oxygen and the metal element of the first conductive layer. A dielectric layer is formed on the interface layer. A top plate is formed on the dielectric layer. The metal-insulator-metal capacitor structure includes the bottom plate, the interface layer disposed on the bottom plate, the dielectric layer disposed on the interface layer, and the top plate disposed on the dielectric layer.

Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor includes the steps of: forming a capacitor bottom metal (CBM) layer on a material layer; forming a silicon layer on the CBM layer; forming a capacitor dielectric layer on the silicon layer; and forming a capacitor top metal (CTM) layer on the capacitor dielectric layer.