Patents by Inventor Aiguo Yan

Aiguo Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220021790
    Abstract: Disclosed are a camera module and a method thereof, and a terminal which relates to the field of camera technology. The camera comprises a circuit board, a sensitive chip, a bracket, and a sealing member. At least one side of the bracket is an open side, and a receiving cavity is defined between a surface of the open side facing the circuit board and a first surface of the circuit board. The sealing member is filled in the receiving cavity. The camera module improves the space utilization efficiency, reduces the width of the open side, increases the screen-to-body ratio of the terminal, and improves user's perception and user experience.
    Type: Application
    Filed: November 7, 2019
    Publication date: January 20, 2022
    Applicant: Kunshan QTech Microelectronics Co., Ltd.
    Inventors: Aiguo DENG, Yangliu XU, Yuanbin JIN, Huanhuan YAN
  • Patent number: 9722845
    Abstract: A Bluetooth Low Energy (BLE) device, having a demodulator configured to translate in-phase and quadrature components of a received BLE signal into a differential phase signal; an estimator configured to estimate a frequency offset of the differential phase signal; and a detector configured to detect information in the differential phase signal corrected by the estimated frequency offset.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: August 1, 2017
    Assignee: Intel IP Corporation
    Inventors: Lu Lu, Jinyong Lee, Xuan Steven Li, Aiguo Yan
  • Publication number: 20170187562
    Abstract: A Bluetooth Low Energy (BLE) device, having a demodulator configured to translate in-phase and quadrature components of a received BLE signal into a differential phase signal; an estimator configured to estimate a frequency offset of the differential phase signal; and a detector configured to detect information in the differential phase signal corrected by the estimated frequency offset.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Lu Lu, Jinyong Lee, Xuan Steven Li, Aiguo Yan
  • Patent number: 8929344
    Abstract: Blind channel impulse response combining for noise mitigation in channel estimation in a TD-SCDMA receiver includes applying a correlation function to pairs of channel impulse response windows associated with non-desired user equipments, grouping all those channel impulse response windows having a correlation function above a predetermined threshold as identified with the same user equipment, and combining the channel estimation results from each identified user equipment in the group to mitigate noise.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: January 6, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Yonggang Hao, Jianwei Zhang, Aiguo Yan, Songsong Sun
  • Patent number: 8711986
    Abstract: A communication system is provided that includes a composite transfer module that receives an input signal and performs one or more selective operations defined by a first transfer function on the input signal. The composite transfer module outputs a first signal. A joint detection module receives the first signal and performs joint detection on the first signal. The joint detection module utilizes channel estimation information of the first transfer function so as to allow the joint detection module to perform joint detection with an oversampling rate of 2× or higher.
    Type: Grant
    Filed: September 18, 2011
    Date of Patent: April 29, 2014
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Aiguo Yan, Yonggang Hao, Marko Kocic
  • Patent number: 8565351
    Abstract: A channel impulse response (CIR)/DC offset (DCO) joint estimation for a time division synchronous code division multiple access (TDSCDMA) system includes generating from a basic midamble and received midamble an initial estimation of the CIR as a series of CIR taps; storing the initially estimated CIR taps; calculating a DC compensated CIR from the initially estimated CIR taps; filtering out the noise from the DC compensated CIR to produce the CIR estimation; and calculating the DC offset estimation from the CIR estimation.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: October 22, 2013
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Yonggang Hao, Carsten Aagaard Pedersen, Aiguo Yan
  • Patent number: 8548005
    Abstract: A TD-SCDMA receiver is provided that includes a joint detection (JD) block receiving a first input signal from a channel estimation block for signal detection. A short channel detection (SCD) block receives the first input signal and detecting the presence/absence of an AGWN-like channel based on the first input signal from the channel estimation block. The SCD block switches the JD block between 1× and 2× oversampling rates by sending to the JD block a second input signal.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: October 1, 2013
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Yonggang Hao, Aiguo Yan, Songsong Sun, Marko Kocic
  • Publication number: 20130094476
    Abstract: Blind channel impulse response combining for noise mitigation in channel estimation in a TD-SCDMA receiver includes applying a correlation function to pairs of channel impulse response windows associated with non-desired user equipments, grouping all those channel impulse response windows having a correlation function above a predetermined threshold as identified with the same user equipment, and combining the channel estimation results from each identified user equipment in the group to mitigate noise.
    Type: Application
    Filed: December 7, 2011
    Publication date: April 18, 2013
    Inventors: Yonggang Hao, Jianwei Zhang, Aiguo Yan, Songsong Sun
  • Patent number: 8417750
    Abstract: The invention relates to a cascaded scheme in which an RRC filter, a modified RRC filter or other digital filter is implemented at a relatively low data rate, such as twice the symbol or chip rate, or 2×. Interpolation filters are used to increase the data rate to a higher data rate, such as 8×. Decimation filters are used to reduce the data rate from a higher rate, such as 8×, to a lower rate, such as 2×. The coefficients of the digital filter may be adjusted to compensate for characteristics of other components across the entire filter chain. Most of the implementation complexity of the filter chain is consolidated into the relatively low rate (such as 2×) digital filter while interpolation or decimation filters can be implemented at very low cost. The compensation capability provided by the digital filter makes design of simple decimation or interpolation filters much easier.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: April 9, 2013
    Assignee: MediaTek Inc.
    Inventors: Aiguo Yan, Ayman Shabra
  • Publication number: 20130070833
    Abstract: A communication system is provided that includes a composite transfer module that receives an input signal and performs one or more selective operations defined by a first transfer function on the input signal. The composite transfer module outputs a first signal. A joint detection module receives the first signal and performs joint detection on the first signal. The joint detection module utilizes channel estimation information of the first transfer function so as to allow the joint detection module to perform joint detection with an oversampling rate of 2× or higher.
    Type: Application
    Filed: September 18, 2011
    Publication date: March 21, 2013
    Inventors: Aiguo Yan, Yonggang Hao, Marko Kocic
  • Patent number: 8358988
    Abstract: A bit rate processor in a wireless system includes a front end processor to process physical channel data and to generate encoded transport channel data, a transport channel buffer to hold the encoded transport channel data, and a back end processor to process the encoded transport channel data from the transport channel buffer and to generate decoded transport channel bits. The front end process may include a frame buffer that receives the physical channel data, a first stage to de-map the physical channel data, an intermediate frame buffer that receives the de-mapped physical channel data, and a second stage to process the de-mapped physical channel data and to provide the encoded transport channel data. The back end processor may include a third stage, including a scaling circuit to scale the encoded transport channel data, a decoder to decode the scaled transport channel data, a CRC checker and an output buffer.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: January 22, 2013
    Assignee: MediaTek Inc.
    Inventors: Lidwine Martinot, Deepak Mathew, Krishnan Vishwanathan, Eric Aardoom, Aiguo Yan, Timothy Fisher-Jeffes
  • Patent number: 8358987
    Abstract: A bit rate processor in a wireless system includes a front end processor to process physical channel data and to generate encoded transport channel data, a transport channel buffer to hold the encoded transport channel data, and a back end processor to process the encoded transport channel data from the transport channel buffer and to generate decoded transport channel bits. The front end process may include a frame buffer that receives the physical channel data, a first stage to de-map the physical channel data, an intermediate frame buffer that receives the de-mapped physical channel data, and a second stage to process the de-mapped physical channel data and to provide the encoded transport channel data. The back end processor may include a third stage, including a scaling circuit to scale the encoded transport channel data, a decoder to decode the scaled transport channel data, a CRC checker and an output buffer.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: January 22, 2013
    Assignee: MediaTek Inc.
    Inventors: Deepak Mathew, Aiguo Yan, Krishnan Vishwanathan, Eric Aardoom, Timothy Fisher-Jeffes
  • Patent number: 8316378
    Abstract: A method includes receiving data in a first data processing module, and enabling a second data processing module when at least one signal time slot of the received data comprises data that complies with a first data transmission standard. The method also includes exchanging signals between the first data processing module and software executing in a processor, and determining that a software configuration of the second data processing module has been completed. The method also includes processing the data in the second data processing module for the at least one signal time slot, and enabling a third data processing module upon a completion of processing at least one data block in the second data processing module, and determining that a software configuration of the third data processing module has been completed, the at least one data block comprising multiple signal time slots.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: November 20, 2012
    Assignee: MediaTek Inc.
    Inventors: John Zijun Shen, Carsten Aagaard Pedersen, Deepak Mathew, Paul Donald Krivacek, Aiguo Yan, Timothy Perrin Fisher-Jeffes
  • Publication number: 20120275472
    Abstract: A channel impulse response (CIR)/DC offset (DCO) joint estimation for a time division synchronous code division multiple access (TDSCDMA) system includes generating from a basic midamble and received midamble an initial estimation of the CIR as a series of CIR taps; storing the initially estimated CIR taps; calculating a DC compensated CIR from the initially estimated CIR taps; filtering out the noise from the DC compensated CIR to produce the CIR estimation; and calculating the DC offset estimation from the CIR estimation.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Inventors: Yonggang Hao, Carsten Aagaard Pedersen, Aiguo Yan
  • Publication number: 20120269175
    Abstract: A TD-SCDMA receiver includes a joint detector that receives an input signal from a transceiver. The joint detector analyzes the input signal to determine whether one or more neighboring cells are used in conjunction with a servicing cell. Also, the joint detector assigns a first matrix that includes all coded channels including those associated with the one or neighboring cells so as to formulate a channel matrix. The joint detector uses a selective ratio that has been minimized to define elements of the first matrix so as to efficiently control the bit-width of the joint detector.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 25, 2012
    Inventors: Aiguo Yan, Yonggang Hao, Lidwine Martinot, Marko Kocic
  • Publication number: 20120269202
    Abstract: A TD-SCDMA receiver is provided that includes a joint detection (JD) block receiving a first input signal from a channel estimation block for signal detection. A short channel detection (SCD) block receives the first input signal and detecting the presence/absence of an AGWN-like channel based on the first input signal from the channel estimation block. The SCD block switches the JD block between 1× and 2× oversampling rates by sending to the JD block a second input signal.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 25, 2012
    Inventors: Yonggang Hao, Aiguo Yan, Songsong Sun, Marko Kocic
  • Publication number: 20120257548
    Abstract: A TD-SCDMA receiver includes a joint detector that receives an input signal from a transceiver. The joint detector analyzes the input signal to using an active code selection (ACS) to determine whether one or more neighboring cells are used in conjunction with a servicing cell. Also, the ACS assigns a first matrix that includes necessary active coded channels including those associated with the one or neighboring cells so as to formulate a channel matrix.
    Type: Application
    Filed: May 17, 2011
    Publication date: October 11, 2012
    Inventors: Aiguo Yan, Hengsheng Tang, Yonggang Hao, Min Lei, Marko Kocic
  • Patent number: 8265205
    Abstract: A wireless receiver uses a joint detection Viterbi (JDV) algorithm to demodulate a signal that has a desired signal component and an interference signal component. The desired signal component includes a training sequence and at least one data field. The training sequence and a corresponding portion of the interference signal component is demodulated using the JDV algorithm to evaluate possible transmitted training sequences and interference signal sequences, and channel estimations for the desired signal component and the interference signal component are generated. The at least one data field is demodulated according to the JDV algorithm using the channel estimations as initial channel estimates for the JDV algorithm.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: September 11, 2012
    Assignee: MediaTek Inc.
    Inventors: Carsten Aagaard Pedersen, Navid Fatemi-Ghomi, Aiguo Yan, Jason Taylor
  • Patent number: 8149702
    Abstract: An apparatus for processing signals in a wireless system includes a first memory module to receive input data from a set of physical channels, a first plurality of sub-modules to process the input data. Each of the first plurality of sub-modules is selected to function based upon data and transmission channel specifications. The apparatus also includes a second memory module to receive processed input data and output intermediate data. Locations of the input data in the second memory is allocated in connection with data and transmission channel specifications. The apparatus also includes a second plurality of sub-modules to process the intermediate data. Each of the second plurality of sub-modules is selected to function based upon data and transmission channel specifications. The apparatus also includes a third memory module to receive and output bit rate processing output.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: April 3, 2012
    Assignee: MediaTek Inc.
    Inventors: Deepak Mathew, Eric Aardoom, Timothy Perrin Fisher-Jeffes, David Stephen Ivory, Carsten Aagaard Pedersen, Aiguo Yan
  • Patent number: 8054922
    Abstract: A system includes a receiver for receiving a modulated signal. The receiver includes a gain estimator for converting complex data representative of constellation points of the modulated signal into scalar data representation. The gain estimator is configured to fold a first portion of the scalar data representation onto a second portion of the scalar data representation. The gain estimator is further configured to estimate a constellation gain value from the folded first portion and the second portion of the scalar data representation.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: November 8, 2011
    Assignee: MediaTek Inc.
    Inventors: Carsten Aagaard Pedersen, John Zijun Shen, Aiguo Yan, Deepak Mathew, Marko Kocic, Timothy Perrin Fisher-Jeffes, Thomas Keller