Patents by Inventor Aihua (Steven) Chen

Aihua (Steven) Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Application of immobilized enzymes for nanopore library construction
    Patent number: 11377654
    Abstract: The present disclosure relates, according to some embodiments, to methods for preparing a library for sequencing. For example, a method may comprise (a) in a coupled reaction, (i) contacting a population of nucleic acid fragments with a tailing enzyme to produce tailed fragments, and (ii) ligating to the tailed fragments a sequencing adapter with a ligase to produce adapter-tagged fragments; and/or separating adapter-tagged fragments from the tailing enzyme and the ligase to produce separated adapter-tagged fragments and, optionally, separated tailing enzyme and/or separated ligase. In some embodiments, a tailing enzyme and/or a ligase used in library preparation may be immobilized enzymes.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: July 5, 2022
    Assignee: New England Biolabs, Inc.
    Inventors: Ming-Qun Xu, Yi Fang, Aihua Zhang, Luo Sun
  • CATALYST FOR CONVERTING LIGHT OLEFIN TO AROMATICS, METHOD OF MAKING AND METHOD OF USING THE SAME
    Publication number: 20220203343
    Abstract: A catalyst for converting hydrocarbon, a method of making the same, and a method of using the same are provided. Such a catalyst includes a zeotype microporous material, a binder material, and a metal phosphide, which can be in a range of from 0.01% to 10% by weight of a total weight of the catalyst. For example, such a catalyst can be used to convert light alkene or alkane into aromatic hydrocarbon such as benzene, toluene, xylenes, and a combination thereof. The alkene may be ethylene, propylene, butylene, or a combination thereof. The alkene may be supplied directly or from a stream converted from light alkane such as methane, ethane, propane, butane, or a combination thereof.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Applicants: China Energy Investment Corporation Limited, National Institute of Clean-and-Low-Carbon Energy
    Inventors: Lisa Nguyen, Hui Wang, Junjun Shan, Louis Guillen, Hua Liu, Aihua Zhang, Joshua Miles
  • Volume Adjustment Method and Apparatus, Terminal Device, and Storage Medium
    Publication number: 20220210260
    Abstract: A volume adjustment method is provided. The method is applied to a terminal device. In the method, a screen of the terminal device in a first physical form receives first input information of a volume adjustment region; a volume of the terminal device is adjusted based on the first input information; the screen changes from the first physical form to a second physical form, where the first physical form is different from the second physical form; and the volume adjustment region adapts to the second physical form to automatically change in location; second input information of the volume adjustment region is received in the second physical form; and the volume of the terminal device is adjusted based on the second input information.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 30, 2022
    Inventors: Hao Chen, Aihua Zheng, Xiaoxiao Chen, Jianfeng Wang, Jie Xu
  • Display Method for Side Area of Screen and Electronic Device
    Publication number: 20220206735
    Abstract: A display method for a side area of a screen and an electronic device, the device including a first display, wherein the first display comprises at least a main display area and at least one side display area, wherein the main display area and the at least one side display area are located on different planes, and wherein the main display area and the at least one side display area are configured to display an output of a first application, a processor, and a non-transitory computer readable medium storing a program for execution by the processor, the program including instructions to cause, in response to a first task of the first application being triggered, the at least one side display area to display at least one dynamic interface associated with the first task.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 30, 2022
    Inventors: Xiaohu Zhao, Aihua Zheng, Yuanchang Shi, Yuchi Ma, Bifeng Tong, Rigele Te
  • LIGHT-EMITTING DIODE PACKAGING MODULE
    Publication number: 20220199590
    Abstract: A light-emitting diode (LED) packaging module includes a plurality of LED chips spaced apart from one another, an encapsulating layer that fills in a space among the LED chips, a light-transmitting layer disposed on the encapsulating layer, a wiring assembly disposed on and electrically connected to the LED chips, and an insulation component that covers the encapsulating layer and the wiring assembly. Each of the LED chips includes an electrode assembly including first and second electrodes. The light-transmitting layer includes a light-transmitting layer that has a light transmittance greater than that of the encapsulating layer.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Inventors: SHUNING XIN, CHEN-KE HSU, AIHUA CAO, JUNPENG SHI, WENG-TACK WONG, YANQIU LIAO, ZHEN-DUAN LIN, CHANGCHIN YU, CHI-WEI LIAO, ZHENG WU, CHIA-EN LEE
  • LIGHT-EMITTING DIODE PACKAGING MODULE
    Publication number: 20220199592
    Abstract: A light-emitting diode (LED) packaging module includes light-emitting units arranged in an array having m row(s) and n column(s), an encapsulating layer, and a wiring assembly, where m and n each independently represents a positive integer. Each of the light-emitting units includes LED chips each including a chip first surface, a chip second surface, a chip side surface, and an electrode assembly disposed on the chip second surface. The encapsulating layer covers the chip side surface and fills a space among the LED chips. The wiring assembly is disposed on the chip second surface and is electrically connected to the electrode assembly.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Inventors: SHUNING XIN, ZHEN-DUAN LIN, YANQIU LIAO, JUNPENG SHI, AIHUA CAO, CHANGCHIN YU, CHEN-KE HSU, CHI-WEI LIAO, CHIA-EN LEE, ZHENG WU
  • HIGH CONCENTRATION FORMULATIONS OF ANTI-CSF1 AND ANTI-CSF1R ANTIBODIES
    Publication number: 20220183979
    Abstract: Provided are high concentration stable formulations of anti-CSF1R/CSF1 antibodies. An example formulation includes 105 to 250 mg/mL of the antibody, 100 mM to 200 mM of arginine glutamate or arginine HCl, 10 mM to 50 mM histidine, and 0.015 to 0.035 w/v % of polysorbate 80, at a pH of 5.4 to 5.6. Also provided are methods of using the formulations for treating diseases.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 16, 2022
    Inventors: Laman Alani, Chung-Chiang Hsu, Aihua Zhu, Kirk William Johnson, Michael Huang
  • DISPLAY METHOD AND ELECTRONIC DEVICE
    Publication number: 20220179455
    Abstract: A display method applied to an electronic device having a foldable screen includes: in response to the foldable screen being in a folded state, the electronic device controls the foldable screen to display a first interface of a first application, where the first interface is a cloud desktop interface of a first operating system; and in response to the foldable screen changing from the folded state to an unfolded state, the electronic device controls the foldable screen to simultaneously display the first interface and a second interface of a second operating system loaded by the electronic device.
    Type: Application
    Filed: February 28, 2022
    Publication date: June 9, 2022
    Inventors: Dengkui ZHU, Hao CHEN, Aihua ZHENG
  • Display panel and method of manufacturing the same
    Patent number: 11353761
    Abstract: A display panel and a method of manufacturing the same are provided. The display pane includes an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer disposed between the array substrate and the color filter substrate. The array substrate includes a transparent electrode layer. The transparent electrode layer includes a pixel electrode and a data line black matrix less (DBS) electrode spaced with each other, a height of the DBS electrode is 0 to 1 micrometer lower than a height of the pixel electrode.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: June 7, 2022
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD
    Inventor: Aihua Tang
  • On-wafer S-parameter calibration method
    Patent number: 11340286
    Abstract: The present application is applicable to the technical field of terahertz on-wafer measurement, and provides a new on-wafer S-parameter calibration method and device. The method includes: performing two-port calibration on a waveguide end face when a probe is not connected to a test system; performing one-port calibration on each of two probe end faces when the probe is connected to the test system; and fabricating a crosstalk calibration standard equal to a device under test in length on a substrate of the device under test, and correct a crosstalk error of the test system according to the crosstalk calibration standard. The present application can realize accurate characterization and correction of crosstalk error in a high-frequency on-wafer S-parameter calibration process, and improve the accuracy of error correction in high-frequency on-wafer S-parameter measurement.
    Type: Grant
    Filed: December 29, 2018
    Date of Patent: May 24, 2022
    Assignee: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS
    Inventors: Aihua Wu, Chong Li, Chen Liu, Yibang Wang, Xingchang Fu, Faguo Liang, Xiuwei Tian, Yanan Liu, Jian Cao
  • LIGHT-EMITTING DEVICE AND DISPLAY SCREEN INCLUDING THE SAME
    Publication number: 20220157793
    Abstract: A light-emitting device includes a number (N) of light-emitting units, a number (a) of first metal pads and a number (b) of second metal pads. Each of the light-emitting units includes a number (n) of light-emitting chips each having two distinct terminals, where N and n are integers and N>1, n>?3. The numbers (a) and (b) are integers and a>1, b>1, and the terminals of each of the light-emitting chips are electrically connected to a unique combination of one of the number (a) of first metal pads and a number (b) of second metal pads, respectively. The numbers (N), (n), (a) and (b) satisfy the equation: a*b=n*N.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 19, 2022
    Inventors: Yanqiu LIAO, Junpeng SHI, Shuning XIN, Chen-ke HSU, Zhen-duan LIN, Changchin YU, Aihua CAO, CHI-WEI LIAO, Zheng WU, Chia-en LEE
  • Authorization method
    Patent number: 11336631
    Abstract: An authorization method by an application stored in a memory includes obtaining, by the application, a client identifier of a client that is generated by a user center; performing, based on the client identifier, permission verification on an authorization credential, in response to authorization information being received by the application, the authorization information includes the authorization credential, the authorization credential is sent by the user center to the client; and allowing access of the client to the application in response to the permission verification on the authorization credential succeeding.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 17, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Shengquan Zhang, Kaiquan Chen, Aihua Li
  • LIGHT-EMITTING DIODE PACKAGING MODULE
    Publication number: 20220139890
    Abstract: A light-emitting diode (LED) packaging module includes LED chips, a wiring layer, and an encapsulant component. Each of the LED chips includes a chip first surface, a chip second surface, a chip side surface, and an electrode unit. The wiring layer is disposed on the chip second surfaces of the LED chips, and contacts and is electrically connected to the electrode units. The encapsulant component includes a first encapsulating layer that covers the chip side surface, and a second encapsulating layer that covers the wiring layer. The LED chip has a thickness TA, the first encapsulating layer has a thickness TB, in which TB/TA?1.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Inventors: Zhen-duan LIN, Yanqiu LIAO, Shuning XIN, Weng-Tack WONG, Junpeng SHI, Aihua CAO, Changchin YU, Chi-Wei LIAO, Chen-ke HSU, Zheng WU, Chia-en LEE
  • LARGE-SCALE MODEL TESTING SYSTEM OF FLOATING OFFSHORE WIND POWER GENERATION DEVICE AND METHOD FOR MANUFACTURING TESTING SYSTEM
    Publication number: 20220128036
    Abstract: The present invention discloses a large-scale model testing system of a floating offshore wind power generation device, and a method for manufacturing the large-scale model testing system. The large-scale model testing system comprises a floating wind power generation device model, model response measurement systems and environmental parameter measurement systems. The floating wind power generation device model comprises a floating foundation and a tower, wherein a wind turbine is connected to the top of the tower. A plurality of anchoring devices is connected to the side surface of the floating foundation. Each model response measurement system comprises an IMU unit, a wind turbine monitoring unit and an anchoring tension measurement unit. Each environmental parameter measurement system comprises a buoy-type wave height meter, a wind speed and direction meter and a flow velocity and direction meter.
    Type: Application
    Filed: May 4, 2021
    Publication date: April 28, 2022
    Inventors: Chaohe CHEN, Jialong JIAO, Aihua LIU, Yifeng LIN, Qiren WU, Yunzhi LIU, Xinqun CHEN, Taiping LIU, Junfeng LIU, Jianping LIU, Zhongliang WANG, Wei WANG, Yuan XU, Yangyang XUE, Chengdi LIN, Binqi LI, Renshu XIONG, Xinxin XU, Daojun NI, Yajing LI, Zhaoqing LIU, Lili ZHOU, Pengfei CHEN, Tianhui FAN
  • Method and device for processing packet by using unified SR label stack
    Patent number: 11316784
    Abstract: A method and a device for processing a packet by using a unified SR label stack, relating to the field of PTN. The method includes: allocating, according to a type of a forwarding plane, a compatibility indicator indicating that a unified U-SRH is carried, for a service packet entering the forwarding plane; adding an SR label stack, the U-SRH and the compatibility indicator to the service packet to obtain an extended packet; and processing and forwarding the extended packet in the forwarding plane according to the SR label stack, the U-SRH and the compatibility indicator. According to embodiments of the present disclosure, the unified SR label stack is used to simplify an application of SR technology in different forwarding planes, and uniformity of SR encapsulation format is enhanced.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: April 26, 2022
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO., LTD.
    Inventors: Aihua Liu, Shuangping Zhan, Fangwei Hu
  • Two-Port On-Wafer Calibration Piece Circuit Model and Method for Determining Parameters
    Publication number: 20220107361
    Abstract: The present application provides two-port on-wafer calibration piece circuit models and a method for determining parameters. The method includes: measuring a single-port on-wafer calibration piece circuit model corresponding to a first frequency band to obtain a first S parameter; calculating, according to the first S parameter, an intrinsic capacitance value of a two-port on-wafer calibration piece circuit model corresponding to the single-port on-wafer calibration piece circuit model; measuring the two-port on-wafer calibration piece circuit model corresponding to the terahertz frequency band to obtain a second S parameter; and calculating a parasitic capacitance value and a parasitic resistance value of the two-port on-wafer calibration piece circuit model according to the second S parameter and the intrinsic capacitance value.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 7, 2022
    Inventors: Yibang Wang, Aihua Wu, Faguo Liang, Chen Liu, Ye Huo, Peng Luan, Jing Sun, Yanli Li
  • Side-bonding structure of display panel and manufacturing method thereof
    Patent number: 11296130
    Abstract: The present application provides a display panel and a manufacturing method thereof. The display panel includes a first substrate, a plurality of bonding pads, an insulating adhesive, a sealant, a blocking layer, a second substrate, and a chip on film (COF). The display panel of the present application effectively reduces an area of a non-display region of a display panel in the prior art by side-bonding the COF and realizes an ultra-narrow bezel display with a width of the non-display region being less than 1 mm. Meanwhile, through a configuration of the blocking layer, the conductive adhesive can be prevented from overflowing and causing short circuits between each of the plurality of bonding pads.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 5, 2022
    Inventor: Aihua Tang
  • Method for Determining Parameters in On-Wafer Calibration Piece Model
    Publication number: 20220099736
    Abstract: A method includes: constructing an on-wafer calibration piece model set that includes one or more on-wafer calibration piece models, where each of the one or more on-wafer calibration piece models has a corresponding on-wafer calibration piece; selecting an on-wafer calibration piece model from the on-wafer calibration piece model set; measuring the on-wafer calibration piece utilizing an on-wafer S parameter measurement system that is calibrated using a multi-thread TRL calibration method in a Terahertz frequency band, to obtain an S parameter of the on-wafer calibration piece; and calculating a plurality of different parameters that represent crosstalk of calibration pieces in the on-wafer calibration piece model, according to an admittance calculated according to the S parameter and an admittance formula corresponding to the on-wafer calibration piece model.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 31, 2022
    Inventors: Aihua Wu, Yibang Wang, Faguo Liang, Chen Liu, Ye Huo, Peng Luan, Jing Sun, Yanli Li
  • Application of Immobilized Enzymes for Nanopore Library Construction
    Publication number: 20220090056
    Abstract: The present disclosure relates, according to some embodiments, to methods for preparing a library for sequencing. For example, a method may comprise (a) in a coupled reaction, (i) contacting a population of nucleic acid fragments with a tailing enzyme to produce tailed fragments, and (ii) ligating to the tailed fragments a sequencing adapter with a ligase to produce adapter-tagged fragments; and/or separating adapter-tagged fragments from the tailing enzyme and the ligase to produce separated adapter-tagged fragments and, optionally, separated tailing enzyme and/or separated ligase. In some embodiments, a tailing enzyme and/or a ligase used in library preparation may be immobilized enzymes.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 24, 2022
    Applicant: New England Biolabs, Inc.
    Inventors: Ming-Qun Xu, Yi Fang, Aihua Zhang, Luo Sun
  • Apparatus for invitro control of degradation rate of artificial bone, degradation method, and artificial bone
    Patent number: 11278429
    Abstract: An apparatus for controlling a degradation rate of an artificial bone in vitro, a degradation method, and an artificial bone are disclosed. The apparatus includes: a variable resistor; and a wearable component, comprising: a metal wire electrically connected in series with the variable resistor and configured to generate an alternating magnetic field; and an insulating textile layer by which the outside of the metal wire is covered.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: March 22, 2022
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Li Cheng, Jianming Huang, Xiaobo Jia, Wanping Pan, Qiusheng Lin, Ying Wang, Yabin Lin, Weiqiang Li, Aihua Zhu, Xuezhen Su, Hailong Yu, Yifeng Su, Xiaoying Lu