Patents by Inventor Ajay Dholakia
Ajay Dholakia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8028183Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for determining a safe lower bound for a commonly powered data processing system. A power management module operates the data processing system using at least one nominal operating parameter during an exploration periodicity, with the at least one nominal operating parameter being clock speed. The power management module determines whether a calibration period is occurring. The power management module calibrates the data processing system up to a measurement interval duration expiration. The power management module may repeat operating the data processing system using the at least one nominal operating parameter.Type: GrantFiled: September 18, 2008Date of Patent: September 27, 2011Assignee: International Business Machines CorporationInventors: Andreas Bieswanger, Thomas M. Brey, Ajay Dholakia, Andrew Geissler, Hye-Young McCreary, Freeman L. Rawson, III, Malcolm S. Ware
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Patent number: 7979082Abstract: A method and apparatus for identifying an unwanted short message service (SMS) message from SMS messages received by a cellular mobile communication system, which comprises at least a history database (HB) for storing a set (H) of the messages received by the cellular mobile communication system. The method includes the steps of: measuring a difference in an information content between a SMS message (m) received by the cellular mobile communication system and the set (H) of messages stored in the history database (HB), and marking the SMS message (m) as being an unwanted SMS message if the difference that is measured is less than or equal to a predefined threshold value.Type: GrantFiled: October 31, 2007Date of Patent: July 12, 2011Assignee: International Business Machines CorporationInventors: Ajay Dholakia, John G. Rooney
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Publication number: 20110035611Abstract: One embodiment provides a method of managing power in a computer system. A device of the computer system is operated at a selected power-state. The power consumption of the computer system is monitored. If the power consumption of the computer system is approaching or has exceeded a power cap selected for the computer system, then a request to reduce the power-state for the device is generated in response. The operating system is used to service the request to reduce the power-state according to the priority of the request. The reduced power state is forced out-of-band following the request to reduce the power-state if the request is not immediately serviceable by the operating system. Different approaches can be taken to force the reduced power state, using, for example, system management mode or a platform environment control interface.Type: ApplicationFiled: August 7, 2009Publication date: February 10, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Ajay Dholakia, Scott N. Dunham, Sumeet Kochar
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Patent number: 7823011Abstract: Exemplary embodiments of the present invention comprise a method for the use of an intra-disk redundancy storage protection operation for the scrubbing of a disk. The method comprises initiating a disk scrubbing operation upon each disk of a plurality of disks that are comprised within a storage disk array, issuing a disk scrubbing command for a predetermined segment of the disks that are comprised within the storage disk array at a predetermined time interval, and identifying an unrecoverable segment on a disk. The method further comprises determining if unrecoverable sectors comprised within the unrecoverable segment can be reconstructed, and reconstructing the unrecoverable sectors of the unrecoverable segment and relocating the segment to a spare storage location on the disk in the event that the segment cannot be reconstructed within its original storage location.Type: GrantFiled: August 22, 2007Date of Patent: October 26, 2010Assignee: International Business Machines CorporationInventors: Ajay Dholakia, Ilias Iliadis, Robert Haas, Xiaoyu-Yu Hu, Evangelos S. Eleftheriou, Roman A. Pletka
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Patent number: 7797611Abstract: A method for reducing data loss includes a first computing step for computing an intermediate result for each redundancy information entity of a redundancy set by processing respectively associated data information entities of a given data set on at least two main diagonals of a parity check matrix representing an error correction coding scheme. The method further includes a second computing step for computing the information content of the respective redundancy information entity dependent on the respective intermediate result.Type: GrantFiled: November 9, 2006Date of Patent: September 14, 2010Assignee: International Business Machines CorporationInventors: Ajay Dholakia, Evangelos Elftheriou, Xiaoyu Hu, Ilias Iliadis
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Patent number: 7750675Abstract: A method and computer program product for running state machines by the steps of running at least a first and a second state machine in parallel, observing at least the first state machine for at least one first synchronization rule, and changing the state of the second state machine when the first synchronization rule applies.Type: GrantFiled: December 19, 2006Date of Patent: July 6, 2010Assignee: International Business Machines CorporationInventors: Ajay Dholakia, Jan Van Lunteren
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Patent number: 7694205Abstract: A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.Type: GrantFiled: February 28, 2005Date of Patent: April 6, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Roy D. Cideciyan, Ajay Dholakia, Evangelos S. Eleftheriou, Richard L. Galbraith, Weldon M. Hanson, Thomas Mittelholzer, Travis R. Oenning
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Publication number: 20100070787Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for determining a safe lower bound for a commonly powered data processing system. A power management module operates the data processing system using at least one nominal operating parameter during an exploration periodicity, with the at least one nominal operating parameter being clock speed. The power management module determines whether a calibration period is occurring. The power management module calibrates the data processing system up to a measurement interval duration expiration. The power management module may repeat operating the data processing system using the at least one nominal operating parameter.Type: ApplicationFiled: September 18, 2008Publication date: March 18, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andreas Bieswanger, Thomas M. Brey, Ajay Dholakia, Andrew Geissler, Hye-Young McCreary, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20090307319Abstract: Computer-implemented methods, apparatus, and products for administering IM chat sessions including: identifying, by an IM module in dependence upon a merger policy, a plurality of IM participants to merge into a group IM chat session, the IM module providing IM services to one of the participants; and merging, by the IM module, the identified participants into the group IM chat session.Type: ApplicationFiled: June 9, 2008Publication date: December 10, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ajay Dholakia, William G. Pagan
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Patent number: 7574646Abstract: A method for decoding data in a data storage system includes generating an output bit stream; generating a first error corrected bit stream in dependence on the output bit stream; generating a second error corrected bit stream in dependence on the first error corrected bit stream; generating a checksum in dependence of the second error corrected bit stream; and, in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave: supplying data indicative of locations of correct bits in the second error corrected bit stream; and, regenerating the first error corrected bit stream in dependence on the pinning data.Type: GrantFiled: November 25, 2005Date of Patent: August 11, 2009Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Ajay Dholakia, Evangelos S. Eleftheriou, Thomas Mittelholzer
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Publication number: 20090138219Abstract: Methods, apparatus, and products as disclosed for estimating power consumption of computing components configured in a computing system that include: selecting, by a power estimation module, a plurality of calibration datasets from a calibration dataset repository, each calibration dataset specifying calibration power consumption by one or more computing components in the computing system for a calibration workload at a plurality of calibration operating points; measuring, by the power estimation module, a current power consumption by one or more measured computing components in the computing system for a current workload at a current operating point; determining, by the power estimation module, an estimated power consumption for the measured computing components at a proposed operating point in dependence upon the selected calibration datasets and the current power consumption for the current workload at the current operating point; and administering the computing system in dependence upon the estimated poweType: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tyler K. Bletsch, Ajay Dholakia, Wesley M. Felter, Charles R. Lefurgy
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Publication number: 20090089645Abstract: Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave.Type: ApplicationFiled: March 28, 2008Publication date: April 2, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Roy D. Cideciyan, Ajay Dholakia, Evangelos S. Eleftheriou, Thomas Mittelholzer
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Publication number: 20090055681Abstract: Exemplary embodiments of the present invention comprise a method for the use of an intra-disk redundancy storage protection operation for the scrubbing of a disk. The method comprises initiating a disk scrubbing operation upon each disk of a plurality of disks that are comprised within a storage disk array, issuing a disk scrubbing command for a predetermined segment of the disks that are comprised within the storage disk array at a predetermined time interval, and identifying an unrecoverable segment on a disk. The method further comprises determining if unrecoverable sectors comprised within the unrecoverable segment can be reconstructed, and reconstructing the unrecoverable sectors of the unrecoverable segment and relocating the segment to a spare storage location on the disk in the event that the segment cannot be reconstructed within its original storage location.Type: ApplicationFiled: August 22, 2007Publication date: February 26, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ajay Dholakia, Ilias Iliadis, Robert Haas, Xiaoyu-Yu Hu, Evangelos S. Eleftheriou, Roman A. Pletka
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Publication number: 20080304379Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method uses the concept of sub-arrays to provide variable-rate read/write operation. Input data blocks are received for writing to the A-field array, each input data block being writable in A/k0 storage fields where k0 is an integer>=2. For successive groups of k0 blocks, the k0 blocks are written to respective sub-arrays, each of A/k0 storage fields, of the storage field array by selectively writing at one of a series of rates, ranging from 1 block at a time to k0 blocks at a time, in dependence on a desired data write-rate. The blocks can also be read from the sub-arrays by selectively reading at one of a series of rates, ranging from 1 sub-array at a time to k0 sub-arrays at a time, in dependence on a desired data read-rate.Type: ApplicationFiled: July 16, 2007Publication date: December 11, 2008Applicant: International Business Machines CorporationInventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
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Publication number: 20080244353Abstract: The present invention relates to a method for reducing data loss comprising a first computing step for computing an intermediate result for each redundancy information entity of a redundancy set by processing respectively associated data information entities of a given data set on at least two main diagonals of a parity check matrix representing an error correction coding scheme. The method further comprises a second computing step for computing the information content of the respective redundancy information entity dependent on the respective intermediate result.Type: ApplicationFiled: May 30, 2008Publication date: October 2, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ajay Dholakia, Evangelos Eleftheriou, Xiao-Yu Hu, Ilias Iliadis
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Patent number: 7395482Abstract: A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called precoding to the modulation encoded bit stream. However, this precoding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before precoding is applied by the precoder. The decoder subsystem operates in the inverse manner.Type: GrantFiled: December 18, 2003Date of Patent: July 1, 2008Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Ajay Dholakia, Evangelos S. Eleftheriou, Richard L. Galbraith, Weldon M. Hanson, Thomas Mittelholzer, Travis R. Oenning
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Patent number: 7389468Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r.C=k1.A where r is the number of codewords and k1 is an integer?1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.Type: GrantFiled: September 20, 2004Date of Patent: June 17, 2008Assignee: International Business Machines CorporationInventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
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Publication number: 20080102799Abstract: A method and apparatus for identifying an unwanted short message service (SMS) message from SMS messages received by a cellular mobile communication system, which comprises at least a history database (HB) for storing a set (H) of the messages received by the cellular mobile communication system. The method includes the steps of: measuring a difference in an information content between a SMS message (m) received by the cellular mobile communication system and the set (H) of messages stored in the history database (HB), and marking the SMS message (m) as being an unwanted SMS message if the difference that is measured is less than or equal to a predefined threshold value.Type: ApplicationFiled: October 31, 2007Publication date: May 1, 2008Applicant: International Business Machines CorporationInventors: Ajay Dholakia, John G. Rooney
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Publication number: 20080055125Abstract: A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called preceding to the modulation encoded bit stream. However, this preceding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before preceding is applied by the precoder. The decoder subsystem operates in the inverse manner.Type: ApplicationFiled: August 3, 2007Publication date: March 6, 2008Inventors: Roy CIDECIYAN, Ajay DHOLAKIA, Evangelos ELEFTHERIOU, Richard GALBRAITH, Weldon HANSON, Thomas MITTELHOLZER, Travis OENNING
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Publication number: 20080052476Abstract: A probe-based data storage device includes a storage surface having an array of A storage fields; a probe array comprising A probes for writing data to respective storage fields; and an apparatus for controlling writing of blocks of user data in the array of storage fields.Type: ApplicationFiled: October 27, 2007Publication date: February 28, 2008Applicant: International Business Machines CorporationInventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos Eleftheriou, Charalampos Pozidis