Patents by Inventor Ajay Sharma
Ajay Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250192756Abstract: A validation circuit is placed in vicinity of a critical path for testing the critical path. The validation circuit receives test data from the control circuit for testing the critical path. The test data is indicative of a delay value that is associated with the critical path. The validation circuit generates multiple setup signals and an enable signal to facilitate the testing of the critical path based on the test data. The validation circuit generates a first test signal based on the enable signal, and a second test signal based on the first test signal and the setup signals. The second test signal is a delayed version of the first test signal. The validation circuit compares the first test signal and the second test signal. A mismatch between the first test signal and the second test signal indicates deviation from the delay value.Type: ApplicationFiled: January 29, 2024Publication date: June 12, 2025Inventors: Ashish Goel, Ajay Sharma, Ruchi Bora, Umesh Pratap Singh
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Publication number: 20250103976Abstract: A system for optimizing labor resources at a facility. The system includes a memory configured to store a first optimization model and a second optimization model. Where the first optimization model, when executed by a control circuit, determines optimal shift patterns for full-time employee schedules and fixed part-time employee schedules over a period of time. Where the second optimization model, when executed by the control circuit, determines headcounts and variable part-time shifts. The system further includes an electronic device configured to execute an application stored in a local memory of the electronic device, the application when executed causes the control circuit to output one or more staffing recommendation levels displayable on the electronic device.Type: ApplicationFiled: September 20, 2024Publication date: March 27, 2025Inventors: Kartheek Ponnuru, Jingrui Li, Prachi A. Patki, Sophia Burathoki, Harshavardhan R. Nannur, Ajay Sharma, Ashish Raj, Mohith Varma
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Patent number: 12164401Abstract: A memory built in self test (MBIST) controller of an MBIST circuit outputs first data. One or more errors is injected in the first data to produce second data. The second data is stored in the memory block. The memory block outputs the second data stored in the memory block. The MBIST controller receives the second data and detects an error in the second data based on a comparison with the first data, the error indicative of a failure of the MBIST. The MBIST controller provides an indication of failure of the MBIST to a processing core external to the MBIST circuit which performs diagnostic action in response to receiving the indication of failure of the MBIST. The processing core validates implementation of the diagnostic action.Type: GrantFiled: May 17, 2023Date of Patent: December 10, 2024Assignee: NXP B.V.Inventors: Umesh Pratap Singh, Ajay Sharma, Ruchi Bora, Ashish Goel
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Publication number: 20240403490Abstract: A method of applying secrecy settings on a user device is provided. The method includes monitoring, by the user device, user activity data based on usage of one or more applications of the user device, determining, by the user device, whether a user is exhibiting a secretive behavior based on the user activity data and historical behavior of the user, extracting, by the user device, contextual information from other applications, determining, by the user device, whether the contextual information is related to the user activity data, processing, by the user device based on the secretive behavior, the contextual information to provide at least one data stream and at least one attribute associated with the contextual information, determining, by the user device, a predefined secrecy type based on an analysis of the at least one data stream and the at least one attribute, and applying, by the user device, secrecy settings on the user device based on the predefined secrecy type.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Inventors: Ajay SHARMA, Arihant JAIN, Prakhar SHRIVASTAV, Rahul YADAV, Vipul GUPTA
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Patent number: 12137517Abstract: A wave launcher may include a printed circuit board (PCB) that includes a pin that receives a radio frequency (RF) signal. The wave launcher may include a cylinder configured to be electrically coupled to the pin and define an opening. The cylinder may receive the RF signal from the pin, form a transition from coplanar to Goubau line structure with a plate, and generate the surface wave. The wave launcher may include an insulator configured to be physically positioned within the opening and between the cylinder and a power line. The insulator may mechanically isolate the cylinder from the power line and permit the cylinder to launch the surface wave on the power line. The wave launcher may include the plate electrically coupled to a pad and may provide a reference for the pin and the cylinder. The pin and the cylinder may be physically positioned proximate the plate.Type: GrantFiled: June 22, 2021Date of Patent: November 5, 2024Assignee: Intel CorporationInventors: Vishram Shriram Pandit, Neel Harkishin Bhatia, Rajiv Panigrahi, Ramaswamy Parthasarathy, Satish Ramachandra, Ajay Sharma, Manish Sharma, Vaibhavdeep Singh, Ravichandra Tungani Chikkabasavaiah, Jayprakash Thakur
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Publication number: 20240320112Abstract: A memory built in self test (MBIST) controller of an MBIST circuit outputs first data. One or more errors is injected in the first data to produce second data. The second data is stored in the memory block. The memory block outputs the second data stored in the memory block. The MBIST controller receives the second data and detects an error in the second data based on a comparison with the first data, the error indicative of a failure of the MBIST. The MBIST controller provides an indication of failure of the MBIST to a processing core external to the MBIST circuit which performs diagnostic action in response to receiving the indication of failure of the MBIST. The processing core validates implementation of the diagnostic action.Type: ApplicationFiled: May 17, 2023Publication date: September 26, 2024Inventors: Umesh Pratap Singh, Ajay Sharma, Ruchi Bora, Ashish Goel
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Patent number: 11943050Abstract: This disclosure introduces an advancement to the error indication message to provide detailed information about errors in configurations that are arriving from the Layer 2 to the Layer 1. A method is disclosed, comprising: performing physical layer control (PHY) of a wireless signal at a Layer 1 (L1) software module; performing medium access control (MAC) of the wireless signal at a Layer 2 (L2) software module; providing an application programming interface between the L1 software module and the L2 software module for receiving L1 configuration messages and providing error codes to the L2 software module; receiving a L1 configuration message at a Layer 1 software module; and providing an enhanced error code progressively from a L1 software module to the Layer 2 (L2) software module.Type: GrantFiled: July 26, 2022Date of Patent: March 26, 2024Assignee: Parallel Wireless, Inc.Inventors: Mudassar Khan, Ajay Sharma, Somasekhar Pemmasani
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Patent number: 11825340Abstract: A receiver performing a half cyclic prefix (CP) shift on received subframes is disclosed, comprising: an analog to digital conversion (ADC) module; a cyclic prefix (CP) removal module coupled to the ADC module configured to retain a portion of cyclic prefix samples; a fast Fourier transform (FFT) module configured to receive samples from the cyclic prefix removal module, and to perform a FFT procedure on the received samples using a FFT window, the FFT window being shifted ahead based on the retained portion of cyclic prefix samples, to output an orthogonal frequency division multiplexed (OFDM) symbol; and a rotation compensation module coupled to the FFT module, the rotation compensation module configured to perform phase de-rotation of the OFDM symbol.Type: GrantFiled: December 1, 2020Date of Patent: November 21, 2023Assignee: Parallel Wireless, Inc.Inventors: Ajay Sharma, Somasekhar Pemmasani
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Publication number: 20230172551Abstract: The present disclosure is related to a method and system for providing personalised haemodialysis for subject. The method includes obtaining concentration of electrolytes and of metabolic content in blood sample flowing into and out of dialyser through first blood bypass tube and second blood bypass tube, respectively. The first and the second blood bypass tube are arranged in first sensor and second sensor. Similarly, concentration of electrolytes and metabolic content in dialysate fluid flowing into and out of dialyser through first and second dialysate tube, respectively. The first dialysate tube and second dialysate tube are arranged to pass through third sensor and fourth sensor. Further, variations are identified in concentration obtained for electrolytes and metabolic content in blood sample with respect to concentration obtained for electrolytes and metabolic content in dialysate fluid, respectively. Thereafter, removal of electrolytes and metabolic content is performed from blood sample.Type: ApplicationFiled: April 9, 2021Publication date: June 8, 2023Inventors: Mahabaleswara Rama BHATT, Ajay SHARMA, Shyam Vasudeva RAO, Vincent LLYOD
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Patent number: 11528175Abstract: A method for measuring channel quality in a wireless transceiver is disclosed, comprising: receiving, at a wireless transceiver, an analog signal from a user equipment (UE); converting the analog signal to a plurality of digital samples at an analog to digital converter (ADC); performing a fast Fourier transform (FFT) on the plurality of digital samples to generate frequency domain samples; identifying an uplink demodulation reference signal (DMRS) symbol; performing channel estimation on the DMRS symbol to identify an estimate of channels; creating a noise covariance matrix from the estimate of channels; and deriving an interference measure from the noise covariance matrix.Type: GrantFiled: February 23, 2021Date of Patent: December 13, 2022Assignee: Parallel Wireless, Inc.Inventors: Ajay Sharma, Somasekhar Pemmasani
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Publication number: 20220368458Abstract: This disclosure introduces an advancement to the error indication message to provide detailed information about errors in configurations that are arriving from the Layer 2 to the Layer 1. A method is disclosed, comprising: performing physical layer control (PHY) of a wireless signal at a Layer 1 (L1) software module; performing medium access control (MAC) of the wireless signal at a Layer 2 (L2) software module; providing an application programming interface between the L1 software module and the L2 software module for receiving L1 configuration messages and providing error codes to the L2 software module; receiving a L1 configuration message at a Layer 1 software module; and providing an enhanced error code progressively from a L1 software module to the Layer 2 (L2) software module.Type: ApplicationFiled: July 26, 2022Publication date: November 17, 2022Inventors: Mudassar Khan, Ajay Sharma, Somasekhar Pemmasani
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Patent number: 11450936Abstract: A communication system communicates data elements on a conducting wire. In an embodiment, a sequence of data elements to be transmitted is electrically represented on a pair of terminals, and a transmission element located at a first portion of the conducting wire transmits the sequence in the form of a wave on a surface of the conducting wire. The transmission element includes a first conductor wrapped around the first portion of the conducting wire, a first insulator located between the first conductor and the first portion of the conducting wire, and a conductive structure disposed around the first conductor. The conductive structure has a narrow cross section at one end and extends outwardly to a broader cross section at the other end. A first terminal of the pair of terminals is electrically connected to the first conductor and the second terminal is electrically connected to the conductive structure.Type: GrantFiled: September 24, 2020Date of Patent: September 20, 2022Assignee: Intel CorporationInventors: Ramaswamy Parthasarathy, Punit Ashok Rathod, Jayprakash Thakur, Arvind Sundaram, Ajay Sharma, Nikita Bipin Ambasana, Satish Ramachandra, Vishram Shriram Pandit
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Patent number: 11398880Abstract: This disclosure introduces an advancement to the error indication message to provide detailed information about errors in configurations that are arriving from the Layer 2 to the Layer 1. A method is disclosed, comprising: performing physical layer control (PHY) of a wireless signal at a Layer 1 (L1) software module; performing medium access control (MAC) of the wireless signal at a Layer 2 (L2) software module; providing an application programming interface between the L1 software module and the L2 software module for receiving L1 configuration messages and providing error codes to the L2 software module; receiving a L1 configuration message at a Layer 1 software module; and providing an enhanced error code progressively from a L1 software module to the Layer 2 (L2) software module.Type: GrantFiled: September 1, 2020Date of Patent: July 26, 2022Assignee: Parallel Wireless, Inc.Inventors: Mudassar Khan, Ajay Sharma, Somasekhar Pemmasani
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Publication number: 20220172111Abstract: Systems and methods to obtain a text-based representation of a machine learning (ML) graph identifying one or more transforms usable to prepare data for ML training. The systems and methods can determine computer-executable instructions based on the text-based representation of the ML graph, where the computer-executable instructions can include instructions associated with the one or more transforms to prepare data for ML training. Additionally, the systems and methods can process the computer-executable instructions to generate ML training data based on at least the one or more transforms.Type: ApplicationFiled: June 25, 2021Publication date: June 2, 2022Inventors: Yuqing Gao, Laurence Louis Eric Rouesnel, Ajai Sharma
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Patent number: 11340880Abstract: A method for an application management service is provided. In the method, a request for a list of available applications is received and a list of available applications is generated based on a whitelist. The list of available applications is transmitted and a selection of an available application is received. A package file corresponding to the selected application is generated and the package file and an installation file corresponding to the selected application are transmitted.Type: GrantFiled: May 17, 2018Date of Patent: May 24, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Myung Han Yoo, Shivaun Albright, Shane R. Konsella, Jorge Miguel Del Hierro, Ajay Sharma, Andrey Stepanov
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Publication number: 20220132654Abstract: A wave launcher may include a printed circuit board (PCB) that includes a pin that receives a radio frequency (RF) signal. The wave launcher may include a cylinder configured to be electrically coupled to the pin and define an opening. The cylinder may receive the RF signal from the pin, form a transition from coplanar to Goubau line structure with a plate, and generate the surface wave. The wave launcher may include an insulator configured to be physically positioned within the opening and between the cylinder and a power line. The insulator may mechanically isolate the cylinder from the power line and permit the cylinder to launch the surface wave on the power line. The wave launcher may include the plate electrically coupled to a pad and may provide a reference for the pin and the cylinder. The pin and the cylinder may be physically positioned proximate the plate.Type: ApplicationFiled: June 22, 2021Publication date: April 28, 2022Inventors: Vishram Shriram PANDIT, Neel Harkishin BHATIA, Rajiv PANIGRAHI, Ramaswamy PARTHASARATHY, Satish RAMACHANDRA, Ajay SHARMA, Manish SHARMA, Vaibhavdeep SINGH, Ravichandra TUNGANI CHIKKABASAVAIAH, Jayprakash THAKUR
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Patent number: 11281760Abstract: A method of authenticating a user includes obtaining a user authentication request for access to at least one application executed on an electronic device, identifying an actor and a task for authentication based on one or more context parameters associated with at least one of the electronic device or a user, providing a live challenge generated based on the identification, and identifying whether to access the at least one application based on whether the provided live challenge has been successfully performed.Type: GrantFiled: July 18, 2019Date of Patent: March 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Arihant Jain, Ajay Sharma, Rahul Yadav, Kaushalendra Mishra
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Publication number: 20210382729Abstract: An electronic apparatus and a method of operating an electronic apparatus are provided. The method includes receiving an application including at least one of a user interface (UI) element, a data element, or a logical element, receiving a modifiability file indicating one or more of the at least one of the user interface (UI) element, the data element, or the logical element of the application that can be modified and an extent of the modifiability, installing the application including the modifiability file on the electronic apparatus, receiving a user selection to modify one or more of the UI element, the data element, or the logical element, creating a modification file based on the user modification, and storing the modification file for user selection and execution.Type: ApplicationFiled: November 6, 2018Publication date: December 9, 2021Inventors: Ajay SHARMA, Hyoeun KIM, Wuseok JANG, Semen ABYKOV, Juho EUM, Yunjong LEE, Hye Heon JUNG, Eun-Kyung YUN
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Patent number: 11182160Abstract: A method and circuit for a data processing system provide a hardware accelerator repeat control instruction (402A) which is executed with a hardware accelerator instruction (402B) to extract and latch repeat parameters from the hardware accelerator repeat control instruction, such as a repeat count value (RPT_CNT), a source address offset value (ADDR_INCR0), and a destination address offset value (ADDR_INCR1), and to generate a command to the hardware accelerator (205) to execute the hardware accelerator instruction a specified plurality of times based on instruction parameters from the hardware accelerator instruction by using the repeat count value to track how many times the hardware accelerator instruction is executed and by automatically generating, at each execution of the hardware accelerator instruction, additional source and destination addresses for the hardware accelerator from the repeat parameters until the hardware accelerator instruction has been executed the specified plurality of times by theType: GrantFiled: November 24, 2020Date of Patent: November 23, 2021Assignee: NXP USA, Inc.Inventors: Maik Brett, Christian Tuschen, Sidhartha Taneja, Tejbal Prasad, Saurabh Arora, Anurag Jain, Pranshu Agrawal, Mukul Aggarwal, Ajay Sharma
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Publication number: 20210326146Abstract: An application installation file for multiple operating systems (OSs), a method of installing an application for multiple OSs, and an electronic apparatus for installing an application installation file for multiple OSs are provided. The application installation file includes a first container including application meta data corresponding to the plurality of heterogeneous operating systems, a second container including application installation files corresponding to the plurality of heterogeneous operating systems, a third container including asset information for each of the application installation files, and a fourth container including certification information for the file structure.Type: ApplicationFiled: October 25, 2018Publication date: October 21, 2021Inventors: Ajay SHARMA, Hyoeun KIM, Semen ABYKOV, Wuseok JANG, Yunjong LEE, Juho EUM