Patents by Inventor Ajith Kumar

Ajith Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11148689
    Abstract: The systems and methods described herein include monitoring systems and methods that monitor speeds of a motor of a vehicle represented as a pulse signal indicative of a rotational position of the motor. The systems and methods include receive a pulse signal from a speed sensor coupled to a traction motor. The pulse signal is indicative of a rotational position of the traction motor. The systems and methods include analyze the pulse signal to identify per-revolution signal reoccurrences that meet designated criteria, and determine a defect based on the per-revolution signal reoccurrences that are identified. The defect is one or more of a wheel defect, a bearing defect, or a gear defect.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 19, 2021
    Assignee: TRANSPORTATION IP HOLDINGS, LLC
    Inventors: Bret Dwayne Worden, Ajith Kumar
  • Patent number: 10560621
    Abstract: An apparatus for controlling a remote camera is described. The apparatus includes a housing and a processor positioned within the housing. A transceiver coupled to the processor communicates with a remote server. The remote server is coupled to the remote camera. A motion tracking component is mechanically coupled to the housing and electrically coupled to the processor. The motion tracking component generates a motion signal. The remote server controls a parameter of the remote camera in response to the motion signal. A display is coupled to the processor for displaying the output signal from the remote camera. The output signal is associated with the parameter of the remote camera.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: February 11, 2020
    Assignee: Symbol Technologies, LLC
    Inventors: Mahesh Vittal Rao, Sateesh Veerabhadrappa Angadi, Saravana Babu, Ajith Kumar, Vikram B. Mangeshwar
  • Publication number: 20180297619
    Abstract: The systems and methods described herein include monitoring systems and methods that monitor speeds of a motor of a vehicle represented as a pulse signal indicative of a rotational position of the motor. The systems and methods include receive a pulse signal from a speed sensor coupled to a traction motor. The pulse signal is indicative of a rotational position of the traction motor. The systems and methods include analyze the pulse signal to identify per-revolution signal reoccurrences that meet designated criteria, and determine a defect based on the per-revolution signal reoccurrences that are identified. The defect is one or more of a wheel defect, a bearing defect, or a gear defect.
    Type: Application
    Filed: March 9, 2018
    Publication date: October 18, 2018
    Inventors: Bret Dwayne Worden, Ajith Kumar
  • Patent number: 10073626
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 11, 2018
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 10067823
    Abstract: Systems and methods for managing the endurance of a solid state drive by assigning error corrective codes (ECC) to a plurality of solid state drive blocks are provided. The disclosed systems and methods can provide a plurality of error corrective codes, each code having a corresponding correction capability and assign to each solid state drive block an error corrective code, according to a reliability of the solid state drive block. Moreover, the disclosed systems and methods can group the solid state drive blocks into groups according to their assigned error corrective codes and apply, for each group of solid state drive block, a level of ECC correction according to the assigned error corrective code of each group.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: September 4, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ashish Singhai, Ashwin Narasimha, Ajith Kumar
  • Patent number: 9983797
    Abstract: In one embodiment of the invention, a server is disclosed including a main printed circuit board; a plurality of processors mounted to the main printed circuit board; and a memory system accessible to the plurality of processors. The memory system includes a plurality of expansion sockets mounted to the printed circuit board, and a plurality of server memory cards removeably plugged into the plurality of expansion sockets. Each server memory card includes a master controller, a plurality of slave controllers, and a plurality of replaceable daughter-memory-cards with read-writeable non-volatile memory.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: May 29, 2018
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9842660
    Abstract: A method for managing a non-volatile random-access memory (NVRAM)-based storage subsystem, the method including: monitoring, by a slave controller on a NVRAM device of the NVRAM-based storage subsystem, an I/O operation on the NVRAM device; identifying, by the slave controller and based on the monitoring, at least one occurrence of error data; comparing, by the slave controller, a numeric aspect of the at least one occurrence of error data with a threshold setting; reporting, by the slave controller on the NVRAM device and to a master controller of the NVRAM-based storage subsystem, the at least one occurrence of error data in response to the numeric aspect crossing the threshold setting; and ascertaining, by the master controller of the NVRAM-based storage system, a physical location of a defect region on the NVRAM device where the error data has occurred by analyzing the reported at least one occurrence of error data.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 12, 2017
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Ashwin Narasimha, Muthugopalkrishnan Adiseshan, Viswesh Sankaran, Ajith Kumar
  • Patent number: 9733840
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: August 15, 2017
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9606022
    Abstract: Diagnosing equipment coupled to a generator. A condition of the equipment is diagnosed based on information provided by signals from a generator operationally connected to the equipment or other signals associated with an engine. Different types of degradation are distinguished based on discerning characteristics within the information. Thus, a degraded equipment component can be identified in a manner that reduces service induced delay.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: March 28, 2017
    Assignee: General Electric Company
    Inventors: Ajith Kumar, Somakumar Ramachandrapanicker, Paul Flynn, Arijit Banerjee, Rupam Mukherjee
  • Patent number: 9588698
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: March 7, 2017
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9582417
    Abstract: A memory apparatus and methods are provided for preventing read errors on weak pages in a non-volatile memory system. In one example, a method includes identifying a weak page in a non-volatile memory device along a word line, wherein the weak page is partially written with at least some data; buffering data associated with the weak page to a weak page buffer that is coupled in communication with the non-volatile memory device; determining that an amount of data in the weak page buffer has reached a predetermined data level; and writing the data from the weak page buffer into the weak page along the word line in the non-volatile memory device.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: February 28, 2017
    Assignee: Virident Systems, LLC
    Inventors: Ashwin Narasimha, Vibhor Patel, Sandeep Sharma, Ajith Kumar
  • Publication number: 20170038981
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Application
    Filed: October 24, 2016
    Publication date: February 9, 2017
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9477595
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: October 25, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9436826
    Abstract: The subject disclosure is directed towards detecting malware or possible malware in an input file by allowing the input file to be opened, and by monitoring for one or more behaviors corresponding to the open file that likely indicate malware. Only certain executable files and/or file types opened thereby may be monitored, with various collected event data used for antimalware purposes when improper behavior is observed. Example behaviors include writing of a file to storage, generation of network traffic, injection of a process, running of script, and/or writing system registry data. Telemetry data and/or a sample of the file may be sent to an antimalware service, and malware remediation may be performed. Data (e.g., the collected events) may be distributed to other nodes for use in antimalware detection, e.g., to block execution of a similar file.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: September 6, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vishal Kapoor, Jonathan Mark Keller, Ajith Kumar, Adrian M. Marinescu, Marc E. Seinfeld, Anil Francis Thomas, Michael Sean Jarrett, Joseph J. Johnson, Joseph L. Faulhaber
  • Publication number: 20160162352
    Abstract: Systems and methods for managing the endurance of a solid state drive by assigning error corrective codes (ECC) to a plurality of solid state drive blocks are provided. The disclosed systems and methods can provide a plurality of error corrective codes, each code having a corresponding correction capability and assign to each solid state drive block an error corrective code, according to a reliability of the solid state drive block. Moreover, the disclosed systems and methods can group the solid state drive blocks into groups according to their assigned error corrective codes and apply, for each group of solid state drive block, a level of ECC correction according to the assigned error corrective code of each group.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 9, 2016
    Inventors: Ashish SINGHAI, Ashwin NARASIMHA, Ajith KUMAR
  • Patent number: 9323663
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: April 26, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Publication number: 20160110105
    Abstract: In one embodiment of the invention, a server is disclosed including a main printed circuit board; a plurality of processors mounted to the main printed circuit board; and a memory system accessible to the plurality of processors. The memory system includes a plurality of expansion sockets mounted to the printed circuit board, and a plurality of server memory cards removeably plugged into the plurality of expansion sockets. Each server memory card includes a master controller, a plurality of slave controllers, and a plurality of replaceable daughter-memory-cards with read-writeable non-volatile memory.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 21, 2016
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9266542
    Abstract: A method for determining the configuration of a diesel powered system having at least one diesel-fueled power generating unit, the method including a step for determining a minimum power required from the diesel powered system in order to accomplish a specified mission, and a step for determining an operating condition of the diesel-fueled power generating unit such that the minimum power requirement is satisfied while yielding at least one of lower fuel consumption and lower emissions for the diesel powered system.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: February 23, 2016
    Assignee: General Electric Company
    Inventors: Wolfgang Daum, Glenn Robert Shaffer, Steven James Gray, David Ducharme, Ed Hall, Eric Dillen, Roy Primus, Ajith Kumar
  • Publication number: 20160004635
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9213637
    Abstract: In one embodiment of the invention, a memory system includes non-volatile-memory-devices (NVMDs) coupled to memory channels to share busses and a memory controller coupled to the memory channels in communication between the plurality of NVMDs. Each NVMD independently executes a read, write, or erase operation at a time. The memory controller includes channel schedulers to schedule control and data transfers associated with the read, write, and erase operations on the memory channels; and high priority and low priority queues coupled to the channel schedulers. The channel schedulers prioritize operations waiting in the high priority queues over operations waiting in the low priority queues. The channel schedulers further prioritize read operations waiting in either the high priority queue or the low priority queue over write and erase operations waiting in each respective queue.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: December 15, 2015
    Assignee: Virident Systems, Inc.
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar