Patents by Inventor Akane Murakami

Akane Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8294152
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: October 23, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20110133201
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Minoru MIYAZAKI, Akane MURAKAMI, Baochun CUI, Mutsuo YAMAMOTO
  • Patent number: 7897972
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: March 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20090236607
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: June 2, 2009
    Publication date: September 24, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Minoru MIYAZAKI, Akane MURAKAMI, Baochun CUI, Mutsuo YAMAMOTO
  • Patent number: 7547916
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 16, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20070012923
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 18, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 7105898
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: September 12, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 7061016
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: June 13, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 7045399
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: May 16, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20050145847
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: December 28, 2004
    Publication date: July 7, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 6784453
    Abstract: In the production of thin film transistor (TFT), a gate insulating film is formed to cover an active layer, a titanium nitride film is formed on the gate insulating film, and an aluminum film used as the gate electrode is formed on the titanium nitride film. The resulted configuration prevents the etching of the aluminum film from the insulating film side even if the etchant of aluminum enters the recessed portion at the edge of the active layer during the patterning of the gate electrode. Also in the anodizing process, when an oxide film is formed on the surface of the aluminum film, the oxidation of aluminum from the gate insulating film side is prevented even when the electrolyte solution enters the recessed portion at the edge of the active layer.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: August 31, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Satoshi Teramoto
  • Publication number: 20040051102
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: August 15, 2003
    Publication date: March 18, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20040023445
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: July 17, 2003
    Publication date: February 5, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 6608353
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: August 19, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20030132482
    Abstract: In the production of thin film transistor (TFT), a gate insulating film is formed to cover an active layer, a titanium nitride film is formed on the gate insulating film, and an aluminum film used as the gate electrode is formed on the titanium nitride film. The resulted configuration prevents the etching of the aluminum film from the insulating film side even if the etchant of aluminum enters the recessed portion at the edge of the active layer during the patterning of the gate electrode. Also in the anodizing process, when an oxide film is formed on the surface of the aluminum film, the oxidation of aluminum from the gate insulating film side is prevented even when the electrolyte solution enters the recessed portion at the edge of the active layer.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 17, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Satoshi Teramoto
  • Patent number: 6569719
    Abstract: In the production of thin film transistor (TFT), a gate insulating film is formed to cover an active layer, a titanium nitride film is formed on the gate insulating film, and an aluminum film used as the gate electrode is formed on the titanium nitride film. The resulted configuration prevents the etching of the aluminum film from the insulating film side even if the etchant of aluminum enters the recessed portion at the edge of the active layer during the patterning of the gate electrode. Also in the anodizing process, when an oxide film is formed on the surface of the aluminum film, the oxidation of aluminum from the gate insulating film side is prevented even when the electrolyte solution enters the recessed portion at the edge of the active layer.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: May 27, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Satoshi Teramoto
  • Publication number: 20020179969
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Application
    Filed: July 12, 2002
    Publication date: December 5, 2002
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Patent number: 6448612
    Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: September 10, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Baochun Cui, Mutsuo Yamamoto
  • Publication number: 20010044196
    Abstract: In the production of thin film transistor (TFT), a gate insulating film is formed to cover an active layer, a titanium nitride film is formed on the gate insulating film, and an aluminum film used as the gate electrode is formed on the titanium nitride film. The resulted configuration prevents the etching of the aluminum film from the insulating film side even if the etchant of aluminum enters the recessed portion at the edge of the active layer during the patterning of the gate electrode. Also in the anodizing process, when an oxide film is formed on the surface of the aluminum film, the oxidation of aluminum from the gate insulating film side is prevented even when the electrolyte solution enters the recessed portion at the edge of the active layer.
    Type: Application
    Filed: February 14, 2001
    Publication date: November 22, 2001
    Inventors: Minoru Miyazaki, Akane Murakami, Satoshi Teramoto
  • Patent number: 6201281
    Abstract: In the production of thin film transistor (TFT), a gate insulating film is formed to cover an active layer, a titanium nitride film is formed on the gate insulating film, and an aluminum film used as the gate electrode is formed on the titanium nitride film. The resulted configuration prevents the etching of the aluminum film from the insulating film side even if the etchant of aluminum enters the recessed portion at the edge of the active layer during the patterning of the gate electrode. Also in the anodizing process, when an oxide film is formed on the surface of the aluminum film, the oxidation of aluminum from the gate insulating film side is prevented even when the electrolyte solution enters the recessed portion at the edge of the active layer.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: March 13, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Miyazaki, Akane Murakami, Satoshi Teramoto