Patents by Inventor Akiharu Miyanaga

Akiharu Miyanaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110084272
    Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20110084268
    Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Yasuo Nakamura, Junpei Sugao, Hideki Uochi
  • Publication number: 20110079778
    Abstract: An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 7, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Junichiro SAKATA
  • Publication number: 20110068335
    Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 24, 2011
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20110068336
    Abstract: An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.
    Type: Application
    Filed: September 23, 2010
    Publication date: March 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Akiharu MIYANAGA, Masayuki SAKAKURA, Junichi KOEZUKA, Tetsunori MARUYAMA, Yuki IMOTO
  • Publication number: 20110070693
    Abstract: An object is to provide an oxide semiconductor having stable electric characteristics and a semiconductor device including the oxide semiconductor. A manufacturing method of a semiconductor film by a sputtering method includes the steps of holding a substrate in a treatment chamber which is kept in a reduced-pressure state; heating the substrate at lower than 400° C.; introducing a sputtering gas from which hydrogen and moisture are removed in the state where remaining moisture in the treatment chamber is removed; and forming an oxide semiconductor film over the substrate with use of a metal oxide which is provided in the treatment chamber as a target. When the oxide semiconductor film is formed, remaining moisture in a reaction atmosphere is removed; thus, the concentration of hydrogen and the concentration of hydride in the oxide semiconductor film can be reduced. Thus, the oxide semiconductor film can be stabilized.
    Type: Application
    Filed: September 23, 2010
    Publication date: March 24, 2011
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Akiharu MIYANAGA, Masayuki SAKAKURA, Junichi KOEZUKA, Tetsunori MARUYAMA, Yuki IMOTO
  • Publication number: 20110062436
    Abstract: To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20110031105
    Abstract: It is an object to provide a manufacturing method for a large amount of positive electrode active material with few variations, having a highly uniform surface condition, micro-size, and high performance. An aqueous solution of a compound, which becomes the source material for the positive electrode active material, is put in an airtight container and irradiated with microwaves, thus heating while water in the airtight container is evaporated and a high pressure is formed in the air tight container. A large amount of micro-sized positive electrode active material having a highly uniform surface condition can be formed. A compound, which becomes the source material for the positive electrode active material, is put in an airtight container and irradiated with microwaves, thus heating while water in the airtight container is evaporated and a high pressure is formed in the air tight container.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Akiharu MIYANAGA
  • Publication number: 20110014745
    Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including a transistor with stable electric characteristics. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the gate insulating film; irradiating the oxide semiconductor film with an electromagnetic wave such as a microwave or a high frequency; forming a source electrode and a drain electrode over the oxide semiconductor film irradiated with the electromagnetic wave; and forming an oxide insulating film, which is in contact with part of the oxide semiconductor film, over the gate insulating film, the oxide semiconductor film, the source electrode, and the drain electrode.
    Type: Application
    Filed: July 13, 2010
    Publication date: January 20, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Akiharu MIYANAGA
  • Publication number: 20110008233
    Abstract: A highly effective positive electrode is obtained by using a material such as Na which is an inexpensive abundant resource. A positive electrode active material of sodium transition metal phosphate of olivine structure in which the sodium transition metal phosphate of olivine structure includes, a phosphorus atom that is located at the center of a tetrahedron having an oxygen atom in each vertex, a transition metal atom that is located at the center of a first octahedron having an oxygen atom in each vertex; and a sodium atom that is located at the center of a second octahedron having an oxygen atom in each vertex, and adjacent sodium atoms are arranged one-dimensionally in a <010> direction.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 13, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akiharu MIYANAGA, Junichi KOEZUKA, Masahiro TAKAHASHI
  • Publication number: 20100329541
    Abstract: A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Teppei Oguni, Tatsuji Nishijima, Akiharu Miyanaga
  • Publication number: 20100317161
    Abstract: To provide a method for manufacturing an SOI substrate having a single crystal semiconductor layer having a small and uniform thickness over an insulating film. Further, time of adding hydrogen ions is reduced and time of manufacture per SOI substrate is reduced. A bond layer is formed over a surface of a first semiconductor wafer and a separation layer is formed below the bond layer by irradiating the first semiconductor wafer with H3+ ions by an ion doping apparatus. H3+ ions accelerated by high voltage are separated to be three H+ ions at a semiconductor wafer surface, and the H+ ions cannot enter deeply. Therefore, H+ ions are added into a shallower region in the semiconductor wafer at a higher concentration than the case of using a conventional ion implantation method.
    Type: Application
    Filed: August 24, 2010
    Publication date: December 16, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Ko INADA, Yuji IWAKI
  • Publication number: 20100295046
    Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.
    Type: Application
    Filed: August 4, 2010
    Publication date: November 25, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Toru MITSUKI, Akiharu MIYANAGA, Yasushi OGATA
  • Patent number: 7837792
    Abstract: In a method for manufacturing a crystalline silicon film by utilizing a metal element that accelerates the crystallization of silicon, an adverse influence of this metal element can be suppressed. A semiconductor device manufacturing method is comprised of the steps of: forming an amorphous silicon film on a substrate having an insulating surface; patterning the amorphous silicon film to form a predetermined pattern; holding a metal element that accelerates the crystallization of silicon in such a manner that the metal element is brought into contact with the amorphous silicon film; performing a heating process to crystalize the amorphous silicon film, thereby being converted into a crystalline silicon film; and etching a peripheral portion of the pattern of the crystalline silicon film.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: November 23, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Akiharu Miyanaga, Satoshi Teramoto, Shunpei Yamazaki
  • Patent number: 7829434
    Abstract: To provide a method for manufacturing an SOI substrate having a single crystal semiconductor layer having a small and uniform thickness over an insulating film. Further, time of adding hydrogen ions is reduced and time of manufacture per SOI substrate is reduced. A bond layer is formed over a surface of a first semiconductor wafer and a separation layer is formed below the bond layer by irradiating the first semiconductor wafer with H3+ ions by an ion doping apparatus. H3+ ions accelerated by high voltage are separated to be three H+ ions at a semiconductor wafer surface, and the H+ ions cannot enter deeply. Therefore, H+ ions are added into a shallower region in the semiconductor wafer at a higher concentration than the case of using a conventional ion implantation method.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: November 9, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd,
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Ko Inada, Yuji Iwaki
  • Patent number: 7812351
    Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: October 12, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Jun Koyama, Takeshi Fukunaga
  • Publication number: 20100255645
    Abstract: An island-shaped single crystal semiconductor layer whose top surface has a plane within ±10° from a {211} plane is formed on an insulating surface; a non-single-crystal semiconductor layer is formed in contact with the top surface and a side surface of the single crystal semiconductor layer and on the insulating surface; the non-single-crystal semiconductor layer is irradiated with laser light to melt the non-single-crystal semiconductor layer, and to crystallize the non-single-crystal semiconductor layer formed on the insulating surface with use of the single crystal semiconductor layer as a seed crystal, so that a crystalline semiconductor layer is formed. A semiconductor device having an n-channel transistor and a p-channel transistor formed with use of the crystalline semiconductor layer is provided.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 7, 2010
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Takuya HIROHASHI
  • Publication number: 20100244031
    Abstract: The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kengo AKIMOTO, Hiromichi GODO, Akiharu MIYANAGA
  • Patent number: 7772592
    Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: August 10, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toru Mitsuki, Akiharu Miyanaga, Yasushi Ogata
  • Patent number: 7767559
    Abstract: A process for fabricating a semiconductor device comprising the steps of: introducing into an amorphous silicon film, a metallic element which accelerates the crystallization of the amorphous silicon film; applying heat treatment to the amorphous silicon film to obtain a crystalline silicon film; irradiating a laser beam or an intense light to the crystalline silicon film; and heat treating the crystalline silicon film irradiated with a laser beam or an intense light.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: August 3, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Takeshi Fukunaga, Akiharu Miyanaga