Patents by Inventor Akihiro Fukuzawa

Akihiro Fukuzawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7845227
    Abstract: A detection device includes a detection circuit. The detection circuit includes an amplifier circuit, a synchronous detection circuit, and a filter section. The amplifier circuit includes a first-type operational amplifier, and the filter section includes a second-type operational amplifier. When a channel width and a channel length of a differential-stage transistor of a differential section of the first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: December 7, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Akihiro Fukuzawa
  • Publication number: 20100271130
    Abstract: An amplifier circuit includes an amplifier section that includes a P-type differential section, an N-type differential section, and an output section, an offset adjustment section that adjusts an offset of the amplifier section, a first offset adjustment register that stores a first offset adjustment value for the P-type differential section, a second offset adjustment register that stores a second offset adjustment value for the N-type differential section, and a control section that sets the first offset adjustment value in the offset adjustment section in a first operation mode in which the P-type differential section operates, and sets the second offset adjustment value in the offset adjustment section in a second operation mode in which the N-type differential section operates.
    Type: Application
    Filed: March 29, 2010
    Publication date: October 28, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akihiro FUKUZAWA
  • Patent number: 7812681
    Abstract: An oscillation driver circuit includes a gain control amplifier which causes a vibrator to produce driving vibrations by controlling an oscillation amplitude in an oscillation loop, and a comparator which generates a synchronous detection reference signal based on a signal in the oscillation loop. The comparator has an output current limiting function. The oscillation driver circuit causes the vibrator to produce vibrations using an output from the comparator in a state in which the gain in an oscillation loop formed by the vibrator and the comparator is set to be larger than unity, and then causes the vibrator to produce the driving vibrations by controlling an oscillation amplitude in an oscillation loop formed by the vibrator and the gain control amplifier.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: October 12, 2010
    Assignee: Seiko) Epson Corporation
    Inventors: Masahiro Kanai, Eitaro Otsuka, Naoki Yoshida, Akihiro Fukuzawa
  • Patent number: 7808412
    Abstract: An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: October 5, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akihiro Fukuzawa, Satoru Ito, Nobuyuki Imai
  • Patent number: 7808414
    Abstract: An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: October 5, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akihiro Fukuzawa, Nobuyuki Imai, Satoru Ito
  • Patent number: 7804432
    Abstract: An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: September 28, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akihiro Fukuzawa, Nobuyuki Imai, Satoru Ito
  • Patent number: 7786918
    Abstract: An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: August 31, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Akihiro Fukuzawa, Nobuyuki Imai, Satoru Ito
  • Patent number: 7782042
    Abstract: A reference voltage supply circuit includes a first supply circuit that includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to a first analog reference voltage line, and a second supply circuit that includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to a second analog reference voltage line. When a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: August 24, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Akihiro Fukuzawa
  • Publication number: 20090212860
    Abstract: An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers that are cascaded and receives an input signal, an A/D converter that performs an A/D conversion process on a signal amplified by the amplifier circuit, first to Nth D/A converters that are provided corresponding to the first to Nth amplifiers and used to perform an offset adjustment of the first to Nth amplifiers, and a control circuit that sets an offset adjustment of the first to Nth amplifiers using the first to Nth D/A converters and a gain adjustment of the first to Nth amplifiers.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 27, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akihiro FUKUZAWA, Satoru ITO, Nobuyuki IMAI
  • Publication number: 20090212983
    Abstract: An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 27, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akihiro FUKUZAWA, Nobuyuki IMAI, Satoru ITO
  • Publication number: 20090160693
    Abstract: An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 25, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akihiro FUKUZAWA, Nobuyuki IMAI, Satoru ITO
  • Publication number: 20090160692
    Abstract: An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 25, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akihiro Fukuzawa, Nobuyuki Imai, Satoru Ito
  • Publication number: 20090133496
    Abstract: An oscillation driver circuit includes a current-voltage converter which converts a current value of an oscillation signal in an oscillation loop into a voltage value, and a comparator which outputs a signal corresponding to the result of comparison between the output signal from the current-voltage converter and a given reference signal. The comparator has an output current limiting function. The oscillation driver circuit causes the vibrator to produce driving vibrations based on the output from the comparator.
    Type: Application
    Filed: September 7, 2007
    Publication date: May 28, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masahiro Kanai, Eitaro Otsuka, Naoki Yoshida, Akihiro Fukuzawa
  • Publication number: 20080111627
    Abstract: An analog circuit includes a first circuit including a first-type operational amplifier of which a frequency of an amplification target signal is a first frequency, and a second circuit including a second-type operational amplifier of which a frequency of an amplification target signal is a second frequency lower than the first frequency. When a channel width and a channel length of a differential-stage transistor of a differential section of the first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 15, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akihiro Fukuzawa
  • Publication number: 20080111625
    Abstract: A detection device includes a detection circuit. The detection circuit includes an amplifier circuit, a synchronous detection circuit, and a filter section. The amplifier circuit includes a first-type operational amplifier, and the filter section includes a second-type operational amplifier. When a channel width and a channel length of a differential-stage transistor of a differential section of the first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 15, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akihiro Fukuzawa
  • Publication number: 20080111525
    Abstract: A reference voltage supply circuit includes a first supply circuit that includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to a first analog reference voltage line, and a second supply circuit that includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to a second analog reference voltage line. When a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 15, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akihiro Fukuzawa
  • Publication number: 20080111585
    Abstract: A detection device includes a detection circuit and a reference voltage supply circuit. The detection circuit includes an amplifier circuit, a synchronous detection circuit, and a filter section. The reference voltage supply circuit includes a first supply circuit which includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to the amplifier circuit, and a second supply circuit which includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to the filter section.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 15, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akihiro Fukuzawa
  • Publication number: 20080087084
    Abstract: An oscillation driver circuit includes a gain control amplifier which causes a vibrator to produce driving vibrations by controlling an oscillation amplitude in an oscillation loop, and a comparator which generates a synchronous detection reference signal based on a signal in the oscillation loop. The comparator has an output current limiting function. The oscillation driver circuit causes the vibrator to produce vibrations using an output from the comparator in a state in which the gain in an oscillation loop formed by the vibrator and the comparator is set to be larger than unity, and then causes the vibrator to produce the driving vibrations by controlling an oscillation amplitude in an oscillation loop formed by the vibrator and the gain control amplifier.
    Type: Application
    Filed: October 12, 2007
    Publication date: April 17, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masahiro Kanai, Eitaro Otsuka, Naoki Yoshida, Akihiro Fukuzawa
  • Patent number: 6208281
    Abstract: A resistance ladder (10) is formed by connecting together a plurality of resistance groups (12, 14, and 15), each having at least first to third resistors extending in a longitudinal axial direction (20, 30, and 40). In each resistance group (12, 14, and 15), the second and third resistors (30 and 40) are disposed parallel to a longitudinal axial direction X on either side of the first resistor (20). Driver circuits (16, 17 and 18) are connected to the third resistors (40) of the corresponding resistance groups, and are disposed at one end of the longitudinal axial direction X thereof. The first to third resistors (20, 30 and 40) are connected together by a first wiring layer (60) formed on top of an insulation layer (50). Neighboring resistance groups (12, 14, and 15) are connected together by a second wiring layer (70) formed of the same layer as the first wiring layer (60).
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: March 27, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Keiji Jinbo, Akihiro Fukuzawa
  • Patent number: 5561438
    Abstract: A ferrite antenna is disclosed. The antenna includes a board on which a ferrite component is mounted. The board includes a plurality of slots and a conductive pattern extending between two of the slots. First and second metal bands are wound around the ferrite component and inserted into the slots. The metal bands are coupled together by the conductive pattern to form a coil. Thus, the interval between adjacent bands can be more accurately set and the antenna can be more easily fabricated. In another embodiment, a metal band partially encloses the ferrite component and covers an open area between the ferrite component and one end of the metal band. The sensitivity of the antenna is thus increased beyond the upper limit of a regular ferrite antenna. In still another embodiment, conductive patterns are formed on the periphery of the board and coupled to the metal bands to improve the directional sensitivity of the antenna.
    Type: Grant
    Filed: November 18, 1994
    Date of Patent: October 1, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Nakazawa, Akihiro Fukuzawa