Abstract: A heat exchanger tube vibration suppression device and a steam generator are provided. The heat exchanger tube vibration suppression device includes: a plurality of sleeves disposed in a heat exchanger tube with a predetermined gap in relation to an inner surface of the heat exchanger tube so as to extend in a longitudinal direction of the heat exchanger tube; and a connecting member that connects the plurality of sleeves so as to be movable between a contracted position at which adjacent sleeves overlap at least partially and an extended position at which the amount of overlap of the adjacent sleeves is minimized. In this way, it is possible to suppress the vibration of the heat exchanger tube appropriately.

Abstract: A semiconductor device includes a stacked via structure including a plurality of first vias formed over a substrate, a first interconnect formed on the plurality of first vias, a plurality of second vias formed on the first interconnect, and a second interconnect formed on the plurality of second vias. One of the first vias closest to one end part of the first interconnect and one of the second vias closest to the one end part of the first interconnect at least partially overlap with each other as viewed in the plane, and the first interconnect has a first extension part extending from a position of an end of the first via toward the one end part of the first interconnect and having a length which is more than six times as long as a via width of the first via.

Abstract: A substrate processing apparatus includes a substrate supporting part for supporting a substrate in a horizontal state, an upper nozzle for discharging deionized water as a cleaning solution toward a center portion of an upper surface of the substrate, and a substrate rotating mechanism for rotating the substrate supporting part together with the substrate around a central axis directed in a vertical direction. In the substrate processing apparatus, the plurality of discharge ports are provided in the upper nozzle, and the flow rate of the deionized water to be supplied onto the center portion of the substrate from the upper nozzle can be ensured, with the flow rate of the deionized water from each discharge port reduced. It is thereby possible to perform appropriate cleaning of the upper surface of the substrate while suppressing electrification at the center portion of the substrate.

Abstract: In a substrate processing apparatus, an outer edge portion of a substrate in a horizontal state is supported from below by an annular substrate supporting part, and a lower surface facing part having a facing surface facing a lower surface of the substrate is provided inside the substrate supporting part. A gas ejection nozzle for ejecting heated gas toward the lower surface is provided in the lower surface facing part, and the substrate is heated by the heated gas when an upper surface of the rotating substrate is processed with a processing liquid ejected from an upper nozzle. Further, a lower nozzle is provided in the lower surface facing part, to thereby perform a processing on the lower surface with a processing liquid. Since the gas ejection nozzle protrudes from the facing surface, a flow of the processing liquid into the gas ejection nozzle can be suppressed during the processing.

Abstract: The nuclear fuel storage rack connection structure is used for connecting a plurality of nuclear fuel storage racks which are stored so as to be arrayed and arranged underwater inside a storage pit, with nuclear fuel assemblies being accommodated. The nuclear fuel storage rack connection structure is provided with an engagement receiving portion which is installed on an outer circumference of the nuclear fuel storage rack and which has an engagement hole opened above or an engagement groove. An engagement member is inserted and engaged with the engagement receiving portion in a vertical direction to connect the mutually adjacent nuclear fuel storage racks.

Abstract: A semiconductor device includes: a first insulation film formed over a semiconductor substrate; and a plurality of first interconnects selectively formed in the first insulation film. A plurality of gaps are formed in part of the first insulation film located between adjacent ones of the first interconnects so that each of the gaps has a cylindrical shape extending vertically to a principal surface of the semiconductor substrate. A cap film is formed of metal or a material containing metal in upper part of each of the first interconnects.

Abstract: A semiconductor device includes: a first insulation film formed over a semiconductor substrate; and a plurality of first interconnects selectively formed in the first insulation film. A plurality of gaps are formed in part of the first insulation film located between adjacent ones of the first interconnects so that each of the gaps has a cylindrical shape extending vertically to a principal surface of the semiconductor substrate. A cap film is formed of metal or a material containing metal in upper part of each of the first interconnects.

Abstract: A semiconductor device includes: a first insulation film formed over a semiconductor substrate; and a plurality of first interconnects selectively formed in the first insulation film. A plurality of gaps are formed in part of the first insulation film located between adjacent ones of the first interconnects so that each of the gaps has a cylindrical shape extending vertically to a principal surface of the semiconductor substrate. A cap film is formed of metal or a material containing metal in upper part of each of the first interconnects.

Abstract: First wirings and first dummy wirings are formed in a p-SiOC film formed on a substrate. A p-SiOC film is formed, and a cap film is formed on the p-SiOC film. A dual damascene wiring, including vias connected to the first wirings and the second wirings, is formed in the cap film and the p-SiOC film 22. Dummy vias are formed on the periphery of isolated vias.

Abstract: A semiconductor device includes: a first insulation film formed over a semiconductor substrate; and a plurality of first interconnects selectively formed in the first insulation film. A plurality of gaps are formed in part of the first insulation film located between adjacent ones of the first interconnects so that each of the gaps has a cylindrical shape extending vertically to a principal surface of the semiconductor substrate. A cap film is formed of metal or a material containing metal in upper part of each of the first interconnects.

Abstract: First wirings and first dummy wirings are formed in a p-SiOC film formed on a substrate. A p-SiOC film is formed, and a cap film is formed on the p-SiOC film. A dual damascene wiring, including vias connected to the first wirings and the second wirings, is formed in the cap film and the p-SiOC film 22. Dummy vias are formed on the periphery of isolated vias.

Abstract: A first nitrogen-containing insulating film is formed under a low dielectric constant film, in which a via hole is formed, with a first nitrogen-non-containing insulating film interposed between the first nitrogen-containing insulating film and the low dielectric constant film. A second nitrogen-containing insulating film is formed over the low dielectric constant film with a second nitrogen-non-containing insulating film interposed therebetween.

Abstract: An electronic device includes: a lower interconnect formed to fill a recess of a first insulating film; a barrier film formed at least on the lower interconnect; and a second insulating film formed on the first insulating film and the barrier film. The first and second insulating films are bonded to each other.

Abstract: First wirings and first dummy wirings are in a p-SiOC film on a substrate. A p-SiOC film is formed, and a cap film is formed on the p-SiOC film. A dual damascene wiring, including vias connected to the first wirings and the second wirings, is formed in the cap film and the p-SiOC film 22. Dummy vias are formed on the periphery of isolated vias.